Xilinx Constraints Guide

319 Pages·2017·4.16 MB·English

by  Xilinx, Inc.

Constraints Guide
UG625(v. 14.5)April1,2013
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Revision History
Date Version Revision
04/01/2011 14.5 RemovedVccoSenseMode(VCCOSENSEMODE)constraint
01/18/2012 13.4 • MovedtimingconstraintsmaterialtotheTimingClosureUserGuide(UG612).
• Removedsentence“TNM_NETisapropertynormallyusedinconjunctionwithan
HDLdesigntotagaspecificnet.”
• RemovedreferencetoFSMStyle(FSM_STYLE)constraint. ItiscoveredinXSTUser
GuideforVirtex-6,Spartan-6,and7SeriesDevices(UG687).
• CorrectedsyntaxforTimingGroup(TIMEGRP)constraintunderPatternMatchingUCF
SyntaxExampleTwo.
10/19/2011 13.3 Removedsentence“TheRISINGandFALLINGkeywordsmayalsobeusedwithTNM.”
AddedDIFF_TERMsupportforVirtex®-6devices.
ChangeddefaultunitsforbothINPUT_JITTERandSYSTEM_JITTERconstraintsfromps
tons.
AddedinformationthatOFFSETConstraintsdonotallowpredefinedgroups.
UpdatedPOST_CRCINITFlagforSpartan-6devices.
AddednewVccoSenseMode(VCCOSENSEMODE)constraint.
06/22/2011 13.2 AddedSpartan®-6tolistofsupporteddeviceswhereappropriate.
ForPULLUP(Pullup)constraint,addedinformationthatNGDBuildignoresthefollowing:
•DEFAULTKEEPER=FALSE•DEFAULTPULLUP=FALSE•DEFAULTPULLDOWN
=FALSE
Constraints Guide
2 www.xilinx.com UG625 (v. 14.5) April 1, 2013
Date Version Revision
ForIODELAY_GROUP(IODELAYGroup)constraint,addedinformationunderLimitations
withLOCandArchitectureSupport
ForAreaGroup(AREA_GROUP)constraint,addedNote:Allcomponentscanbeconstrained
bytheCLOCKREGIONrangeexceptIOBandBUF.
ForCONFIG_MODE(ConfigurationMode)constraint,addednewarchitecturesupport
andnewvalues.
ForBEL(BEL)constraint,removedVHDLexample.
03/01/2011 13.1 AddedVCCAUX_IOandMARK_DEBUGconstraints.
ConstraintsGuide
UG625(v. 14.5)April1,2013 www.xilinx.com 3
Table of Contents
RevisionHistory....................................................................................................2
Chapter 1 Constraint Types.........................................................................................9
AttributesandConstraints....................................................................................9
CPLDFitter...........................................................................................................11
LogicalConstraints..............................................................................................12
PhysicalConstraints.............................................................................................13
MappingDirectives.............................................................................................14
PlacementConstraints.........................................................................................15
RoutingDirectives...............................................................................................17
SynthesisConstraints..........................................................................................18
TimingConstraints..............................................................................................19
ConfigurationConstraints...................................................................................20
Chapter 2 Entry Strategies for Xilinx Constraints...................................................21
ConstraintsEntryMethods..................................................................................21
ConstraintsEntryTable.......................................................................................21
SchematicDesign.................................................................................................24
VHDLAttributes..................................................................................................24
VerilogAttributes.................................................................................................25
UserConstraintsFile(UCF).................................................................................27
UCFandNCFFileSyntax....................................................................................28
PhysicalConstraintsFile(PCF)...........................................................................31
NetlistConstraintsFile(NCF).............................................................................33
ConstraintsEditor................................................................................................33
ISEDesignSuite..................................................................................................35
PlanAhead............................................................................................................35
SettingConstraintsinPACE................................................................................39
PartialDesignPinPreassignment.......................................................................39
FPGAEditor.........................................................................................................41
XSTConstraintFile(XCF)...................................................................................43
ConstraintPriority...............................................................................................43
Chapter 3 Xilinx Constraints.....................................................................................45
ConstraintInformation........................................................................................45
AreaGroup...........................................................................................................46
AsynchronousRegister........................................................................................55
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BEL........................................................................................................................57
BlockName..........................................................................................................60
BUFG....................................................................................................................62
ClockDedicatedRoute........................................................................................65
Collapse................................................................................................................67
ComponentGroup...............................................................................................69
ConfigurationMode.............................................................................................70
CoolCLOCK.........................................................................................................73
DataGate..............................................................................................................75
DCICascade.........................................................................................................77
DCIValue.............................................................................................................79
Default..................................................................................................................80
DiffTerm..............................................................................................................83
DirectedRouting..................................................................................................85
Disable..................................................................................................................87
Drive.....................................................................................................................89
Enable...................................................................................................................92
EnableSuspend....................................................................................................94
Fast........................................................................................................................95
Feedback...............................................................................................................97
File.........................................................................................................................99
Float....................................................................................................................101
FromThruTo......................................................................................................103
FromTo...............................................................................................................105
FSMStyle...........................................................................................................108
HierarchicalBlockName...................................................................................109
HIODELAYGroup.............................................................................................111
HierarchicalLookupTableName.....................................................................112
HSet....................................................................................................................114
HUSet.................................................................................................................115
InputBufferDelayValue..................................................................................117
IFDDelayValue.................................................................................................119
InTerm................................................................................................................121
InputRegisters...................................................................................................123
InternalVrefBank..............................................................................................124
IOB......................................................................................................................125
InputOutputBlockDelay.................................................................................128
IODELAYGroup................................................................................................130
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InputOutputStandard......................................................................................132
Keep....................................................................................................................135
KeepHierarchy..................................................................................................137
Keeper.................................................................................................................140
Location(LOC)...................................................................................................142
Locate..................................................................................................................145
LockPins............................................................................................................158
LookupTableName...........................................................................................159
Map.....................................................................................................................162
MarkDebug.......................................................................................................163
MaxFanout.........................................................................................................165
MaximumDelay.................................................................................................168
MaximumProductTerms..................................................................................170
MaximumSkew.................................................................................................171
MCBPerformance..............................................................................................173
MIODELAYGroup............................................................................................175
NoDelay.............................................................................................................176
NoReduce..........................................................................................................178
OffsetIn..............................................................................................................180
OffsetOut...........................................................................................................184
OpenDrain.........................................................................................................188
OutTerm.............................................................................................................190
Period..................................................................................................................192
Pin.......................................................................................................................199
PostCRC.............................................................................................................200
PostCRCAction.................................................................................................201
PostCRCFrequency..........................................................................................203
PostCRCINITFlag............................................................................................204
PostCRCSignal.................................................................................................206
PostCRCSource.................................................................................................207
Priority................................................................................................................208
Prohibit...............................................................................................................209
Pulldown............................................................................................................213
Pullup.................................................................................................................215
PowerMode........................................................................................................217
Registers.............................................................................................................219
RelativeLocation(RLOC)..................................................................................221
RelativeLocationOrigin....................................................................................239
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RelativeLocationRange....................................................................................242
SaveNetFlag......................................................................................................245
SchmittTrigger...................................................................................................247
SIMCollisionCheck..........................................................................................249
Slew....................................................................................................................251
Slow....................................................................................................................254
Stepping..............................................................................................................256
Suspend..............................................................................................................257
SystemJitter.......................................................................................................259
Temperature........................................................................................................261
TimingIgnore.....................................................................................................263
TimingGroup.....................................................................................................266
TimingSpecifications........................................................................................272
TimingName......................................................................................................275
TimingNameNet...............................................................................................281
TimingPointSynchronization..........................................................................285
TimingThruPoints............................................................................................288
TimingSpecificationIdentifier.........................................................................292
USet....................................................................................................................297
UseInternalVREF..............................................................................................299
UseLUTNM.......................................................................................................301
UseRelativeLocation........................................................................................303
UseLowSkewLines..........................................................................................306
VCCAUX.............................................................................................................308
VCCAUX_IO......................................................................................................309
Voltage................................................................................................................311
VREF...................................................................................................................313
WireAnd............................................................................................................315
XBLKNM............................................................................................................316
Appendix Additional Resources.............................................................................319
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Chapter 1
Constraint Types
ThischapterdiscussestheconstrainttypesdocumentedinthisGuide.
Note Fordetailedinformationaboutusingtimingconstraintstoachievetimingclosure,
seetheTimingClosureUserGuide(UG612).
Attributes and Constraints
Somedesignersusethetermsattributeandconstraintinterchangeably. Otherdesigners
givethemdifferentmeanings. Inaddition,certainlanguageconstructsusetheterms
attributeanddirectiveinsimilar,butnotidentical,senses. Xilinx®usesthetermsattributes
andconstraintsasdefinedbelow.
Attributes
Anattributeisapropertyassociatedwithadevicearchitectureprimitivecomponent
thatgenerallyaffectsaninstantiatedcomponentfunctionalityorimplementation.
Attributesarepassedbymeans:
• Genericmaps(VHDL)
• Defparamsorinlineparameterpassedwhileinstantiatingtheprimitivecomponent
(Verilog)
AllattributesaredescribedintheXilinxLibrariesGuidesasapartoftheprimitive
componentdescription.
Attributes Examples
• INITonaLUT4component
• CLKFX_DIVIDEonaDCM
Implementation Constraints
TheConstraintsGuidedocumentsimplementationconstraints.
AnimplementationconstraintisaninstructiongiventotheFPGAimplementationtools
todirectthemapping,placement,timingorotherguidelinestofollowwhileprocessing
anFPGAdesign.
ImplementationconstraintsaregenerallyplacedintheUserConstraintsFile(UCF).
Theymayalsobeplacedin:
• TheHardwareDescriptionLanguage(HDL)code
• Asynthesisconstraintsfile.
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Chapter 1:Constraint Types
Implementation Constraints Examples
• Location(LOC)(placement)
• PERIOD(timing)
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