Table Of ContentLecture Notes in Electrical Engineering 469
Jie Li
A. Ravi Sankar
P. Augusta Sophy Beulet
Editors
VLSI Design:
Circuits,
Systems and
Applications
Select Proceedings of ICNETS2, Volume V
Lecture Notes in Electrical Engineering
Volume 469
Board of Series editors
Leopoldo Angrisani, Napoli, Italy
Marco Arteaga, Coyoacán, México
Samarjit Chakraborty, München, Germany
Jiming Chen, Hangzhou, P.R. China
Tan Kay Chen, Singapore, Singapore
Rüdiger Dillmann, Karlsruhe, Germany
Haibin Duan, Beijing, China
Gianluigi Ferrari, Parma, Italy
Manuel Ferre, Madrid, Spain
Sandra Hirche, München, Germany
Faryar Jabbari, Irvine, USA
Janusz Kacprzyk, Warsaw, Poland
Alaa Khamis, New Cairo City, Egypt
Torsten Kroeger, Stanford, USA
Tan Cher Ming, Singapore, Singapore
Wolfgang Minker, Ulm, Germany
Pradeep Misra, Dayton, USA
Sebastian Möller, Berlin, Germany
Subhas Mukhopadyay, Palmerston, New Zealand
Cun-Zheng Ning, Tempe, USA
Toyoaki Nishida, Sakyo-ku, Japan
Bijaya Ketan Panigrahi, New Delhi, India
Federica Pascucci, Roma, Italy
Tariq Samad, Minneapolis, USA
Gan Woon Seng, Nanyang Avenue, Singapore
Germano Veiga, Porto, Portugal
Haitao Wu, Beijing, China
Junjie James Zhang, Charlotte, USA
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Jie Li A. Ravi Sankar P. Augusta Sophy Beulet
(cid:129) (cid:129)
Editors
VLSI Design: Circuits,
Systems and Applications
Select Proceedings of ICNETS2, Volume V
123
Editors
Jie Li P. AugustaSophyBeulet
Electrical andElectronic Schoolof Electronics Engineering
EngineeringDepartment VIT
University of Melbourne Chennai, Tamil Nadu
Melbourne, VIC India
Australia
A.RaviSankar
Schoolof Electronics Engineering
VIT
Chennai, Tamil Nadu
India
ISSN 1876-1100 ISSN 1876-1119 (electronic)
Lecture Notesin Electrical Engineering
ISBN978-981-10-7250-5 ISBN978-981-10-7251-2 (eBook)
https://doi.org/10.1007/978-981-10-7251-2
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Preface
This volume of the proceedings is the collation of selected papers presented in
‘Symposium E’ in the International Conference on NextGen Electronic
Technologies—Silicon to Software—ICNETS2 conducted from March 23 to 25 at
VIT, Chennai.
The development of microelectronics and VLSI design spans a time period,
which is less than 50 years, but it has seen as many as four generations. Thus
SymposiumE—‘VLSIDesign:Circuits,SystemsandApplications’providedan
international platform for researchers and international speakers to present their
researchfindingsandinnovativemethodologiesinvariousavenuesofVLSIdesign.
The VLSI design symposium of ICNETS2 attracted 98 abstracts from different
countries and also from within India. The full-length papers were reviewed by a
panel of 40 reviewers from reputed technical institutions like Indian Institute of
Technology (IIT), National Institute of Technology (NIT), Anna University; pro-
fessors from abroad; and experts from industries along with the editors of this
volume. After a meticulous review process, 61 papers were selected for oral pre-
sentation in the symposium. These papers were presented in nine parallel sessions
conductedthroughoutthethree-dayconference.Threekeynotetalksweredelivered
in Symposium E on the following topics: radio-frequency integrated circuit design
(Jie Li, University of Melbourne, Australia), an overview on memristor-based
non-volatile LUT of an FPGA (T. Nandha Kumar, University of Nottingham,
Malaysia), rare earth-doped semiconducting thin films for Si-based light-emitting
devices (Christopher Labbé, Normandie University, France). The papers presented
ineachsessionwereevaluatedbytwoexpertsfromacademiaandindustries.Ofthe
61paperspresentedinthesymposium,27manuscriptswereselectedbythesession
chairs for this LNEE proceedings publication.
The selected papers span a wide spectrum of topics on low-power design
techniques, analog and mixed-signal design, RF IC design, testingand verification
of VLSI circuits, high-performance DSP architectures, architectures for hardware
v
vi Preface
security, memristor-based circuit designs, SOC designs, design of ADC, on-chip
memories, etc. We the editors are happy in bringing up this volume which is a
treasure for the budding VLSI researchers.
Melbourne, Australia Jie Li
Chennai, India A. Ravi Sankar
Chennai, India P. Augusta Sophy Beulet
Acknowledgements
These few words of acknowledgment are too little to express our gratitude to the
personnel,whoseconstantinvolvementandsupportmadethisproceedingspossible.
Firstly, we would like to express our profound and heartfelt gratitude to
Dr. G. Viswanathan, respected Chancellor of VIT, for bestowing his invaluable
support in organizing the International Conference on NextGen Electronic
Technologies—Silicon to Software—ICNETS2. We are indebted to the VIT
management—Vice President, Mr. Sankar Viswanathan, and Assistant Vice
President,Ms.Kadhambari,S.Viswanathan—fortheirencouragementandsupport
in conducting the ICNETS2 conference in VIT Chennai, Chennai, India. This
conference and associated symposia would not have been possible without the
unlimited freedom extended by the management of VIT.
We are sincerely thankful to the Vice-Chancellor of VIT and the
Pro-Vice-Chancellor of VIT Chennai for their constant guidance and timely input.
Our special thanks are due to Chairman of ICENT2 Dr. S. R. S. Prabaharan and
Co-chairwomenDr.NadiaMagnenatThalmanandDr.V.S.KanchanaBhaaskaran
fortheirhelpinorganizingthesymposiumonVLSIDesign:Circuits,Systemsand
Applications.
Wewouldlike tothank Dr.AnaniahDurai,Managerofthesymposium,for his
contribution in arranging the invited speakers notonlyfor the symposium butalso
for the Industry-Government-Academia Forum. A special word of thanks to
Dr. Nandhakumar for his technical talk on memristors and his valuable input and
interaction during the technical sessions.
Weoweaspecialgratitudetoalltheacademicandindustrialprofessionalswho
meticulously reviewed the technical manuscripts submitted to the symposium. We
are thankful to the chairs of various technical sessions of the symposium for their
constructive feedback and interaction with the authors of the manuscripts. We are
also thankful to all the faculty members of the School of Electronics Engineering
(SENSE), especially the faculty members related to VLSI and Nanotechnology
group. We would also like to thank the research scholars of SENSE for their
contribution to the symposium.
vii
viii Acknowledgements
We sincerely thank all the committee members of ICNETS2. In particular, we
would like to highlight and acknowledge the contribution of Dr. Mohanaprasad in
bringing out this proceedings.
We are extremely grateful to the staff at Springer, especially Swati Meherishi
and Aparajita Singh, for helping us in bringing out this volume comprising the
selected manuscripts presented in the symposium of VLSI Design: Circuits,
Systems and Applications, ICNETS2.
Contents
Front-End CMOS Circuit for Low Power Consumption . . . . . . . . . . . . 1
K. Dinesh Kumar and K. Ferents Koni Jiavana
A Preliminary Study of Oscillators, Phase and Frequency Detector,
and Charge Pump for Phase-Locked Loop (PLL) Applications . . . . . . . 9
R. Prithiviraj and J. Selvakumar
All-Digital RF Transmitter with Highly Power-Efficient Doherty
Power Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Deepa Pradeep and B. Ananda Venkatesan
Adiabatic Techniques for Energy-Efficient Barrel Shifter Design. . . . . . 27
K. Anantharaman and A. V. M. Manikandan
A 79 GHz CMOS LNA with Adaptive Biasing. . . . . . . . . . . . . . . . . . . . 37
D. Rubeena and J. Manjula
X-band Phased-Array Transmitter in 180-nm SiGe BiCMOS
Technology with Stacked Power Amplifier. . . . . . . . . . . . . . . . . . . . . . . 49
Sijo Thomas and T. Saminathan
Short-Range Low Data Rate Pulsed UWB Transmitter . . . . . . . . . . . . . 59
G. Sarathy and S. Praveen Kumar
A New High-Speed Multiplier Based on Carry-Look-Ahead Adder
and Compressor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
B. Jeevan and K. Sivani
Real-Time Automatic Peaks and Onsets Detection of
Photoplethysmographic Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
P. Madhan Mohan, V. Nagarajan and J. C. Vignesh
Design of Low-Power CMOS Four-Quadrant Analog Multiplier
in Nanometer Scaling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
N. Sharath and S. Suhasini
ix
