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About VLSI
The document provides information on CMOS logic gates and layout. It discusses the schematics of inverters, NAND and NOR gates using CMOS. It then covers basic CMOS layout techniques including placing transistors in series to implement AND and in parallel to implement OR. The document also provides illustrations of layouts for NAND and NOR gates.
Detailed Information
Author: | ['Rishi Kesh'] |
---|---|
Publication Year: | 2013 |
Pages: | 69 |
Language: | English |
Format: | |
Price: | FREE |
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