Turbo Codes: Desirable and Designable

157 Pages·2004·5.772 MB·English

by  Alexandre Giulietti, Bruno Bougard, Liesbet Van der Perre (auth.)

TURBO CODES
Desirable and Designable
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TURBOCODES
Desirable and Designable
by
Alexandre Giulietti
Bruno Bougard
Liesbet Van der Perre
DESICS Division
IMEC
Belgium
SPRINGER SCIENCE+BUSINESS MEDIA, LLC
Library of Congress Cataloging-in-Publication Data
Turbo Codes: Desirable and Designable
Alexandre Giulietti, Bruno Bougard, Liesbet Van der Perre
ISBN 978-1-4613-5096-5 ISBN 978-1-4615-0477-1 (eBook)
DOI 10.1007/978-1-4615-0477-1
Copyright © 2004 by Springer Science+Business Media New York
Originally published by Kluwer Academic Publishers in 2004
Softcover reprint ofthe hardcover lst edition 2004
AlI rights reserved. No part of this work may be reproduced, stored in a retrieval
system, or transmitted in any form or by any means, electronic, mechanical,
photocopying, microfilming, recording, or otherwise, without prior written
permission from the Publisher, with the exception of any material supplied
specificalIy for the purpose of being entered and executed on a computer system,
for exclusive use by the purchaser of the work.
Permission for books published in Europe: [email protected]
Permissions for books published in the United States of America: [email protected]
Printed on acid-free paper.
v
To our scientific and emotional
mothers and fathers,
who showed us the art
of communication.
Table of contents vii
TABLE OF CONTENTS
Chapter 1: TURBO CODES
Introducing the communication problem they solve, and the
implementation problem they create
1.1. A communication and Microelectronics perspective ........................ 1
1.1.1 Scientific fathers recalled: Shannon and Shockley ................... 1
1.1.2 Channel coding: from simple engines to turbo ......................... 2
1.1.3 IC revolution: from transistors to 4G radios ............................. 4
1.1.4 The implementation problem and goals ................................... 5
1.2. Turbo codes: desirable channel coding solutions .............................. 6
1.2.1 Channel coding: an essential ingredient in digital .................... .
communication systems ............................................................ 8
1.2.2 Block and Convolutional Channel Codes: the basics ............... 9
1.2.3 Concatenated codes ................................................................ 15
1.2.4 Parallel concatenated convolutional (turbo) codes ................. 16
1.2.5 Decoding parallel concatenated Turbo codes ......................... 18
1.2.6 Serially concatenated block codes .......................................... 26
1.3. Conclusions ..................................................................................... 27
1.4. References ....................................................................................... 28
Chapter 2: DESIGN METHODOLOGY: THE STRATEGIC
PLAN
Getting turbo-codes implemented at maximum peiformancelcost
2.1. Introduction ..................................................................................... 29
2.2. Algorithmic exploration .................................................................. 31
2.3. Data Transfer and Storage Exploration ........................................... 32
2.4. From architecture to silicon integration .......................................... 33
2.5. Conclusions ..................................................................................... 36
2.6. References ....................................................................................... 37
Chapter 3: CONQUERING THE MAP
Removing the main bottleneck of convolutional turbo decoders
3.1 Introduction ..................................................................................... 39
3.2 The MAP decoding algorithm for convolutional turbo codes ......... 40
3.3 Simplification ofthe MAP algorithm: log-max MAP ..................... 51
3.3.1 The log-max MAP algorithm ............................................... 51
viii
3.4 Trellis termination in convolutional turbo codes ............................ 56
3.4.1 No termination ..................................................................... 57
3.4.2 Single termination ................................................................ 58
3.4.3 Double termination ............................................................... 59
3.5 MAP architecture definition: systematic approach ......................... 60
3.5.1 MAP bottlenecks .................................................................. 61
3.5.2 Data Flow and Loop Transformations .................................. 61
3.5.3 Storage Cycle Budget Distribution ...................................... 68
3.5.4 Memory organization ........................................................... 74
3.6 Conclusions ..................................................................................... 78
3.7 References ....................................................................................... 78
Chapter 4: DEMYSTIFYING THE FANG-BUDA ALGORITHM
Boosting the block turbo decoding
4.1. Introduction ..................................................................................... 81
4.2. Soft decoding of algebraic codes .................................................... 83
4.2.1 Maximum likelihood decoding of block codes .................... 83
4.2.2 The Chase algorithm ............................................................ 86
4.2.3 The Fang-Buda Algorithm (FBA) ........................................ 87
4.3. FBA Optimization and Architecture Derivation ............................. 90
4.3.1 Data Type Refinement ......................................................... 90
4.3.2 Data and control flow transformations ................................. 91
4.3.3 Data Reuse Decision and Storage Cycle ............................... ..
Budget Distribution .............................................................. 93
4.3.4 Memory allocation and assignment.. .................................... 96
4.4. FBA-based BTC decoder performance ........................................... 99
4.5. Conclusions ................................................................................... 103
4.6. References ..................................................................................... 103
Chapter 5: MASTERING THE INTERLEAV ER
Divide and Conquer
5.1. Introduction ................................................................................... 105
5.2. Basic elements of the interleaver .................................................. 107
5.3. Collision-free interleavers ............................................................. 109
5.4. Case study: the 3GPP interleaver and a 3GPP .................................. .
collision-free interleaver ............................................................ 113
5.5. Optimized scheduling for turbo decoding: ........................................ .
collision-free interleaving and deinterleaving ............................ 118
5.6. References ..................................................................................... 120
Table of contents ix
Chapter 6: T@MPO CODEC
From theory to real life silicon
6.1. Introduction ................................................................................... 121
6.2. Positioning oneself in the optimal ..................................................... .
performance-speed-cost space .................................................... 122
6.3. Design flow ................................................................................... 126
6.4. Decoder final architecture ............................................................. 128
6.5. Synthesis results ............................................................................ 131
6.6. Measurements results .................................................................... 133
6.7. T@MPO features .......................................................................... 138
6.8. References ..................................................................................... 139
Abbreviations list ................................................................ 141
Symbol list ........................................................................ 145
Index ...............................................................................1 47
Preface xi
PREFACE
The increasing demand on high data rate and quality of service in
wireless communication has to cope with limited bandwidth and energy
resources. More than 50 years ago, Shannon has paved the way to optimal
usage of bandwidth and energy resources by bounding the spectral efficiency
vs. signal to noise ratio trade-off. However, as any information theorist,
Shannon told us what is the best we can do but not how to do it [1].
In this view, turbo codes are like a dream come true: they allow
approaching the theoretical Shannon capacity limit very closely. However,
for the designer who wants to implement these codes, at first sight they
appear to be a nightmare. We came a huge step closer in striving the
theoretical limit, but see the historical axiom repeated on a different scale:
we know we can achieve excellent performance with turbo codes, but not
how to realize this in real devices.
While this is the point where designers typically start moaning, at IMEC
weird researchers start rubbing their hands: that is meat and drink for us!
Starting by letting some students spend some efforts on seemingly
unsolvable problems, we gradually built up a multi-cultural experts' team,
and later found ourselves on a cold winter day on a sailing boat on the North
Sea, to finally oversee the journey as scientifically rewarding and socially
hart-warming! Of course we are particularly indebted to all those who put
scientific stones building the fundaments of this book, but we want to thank
them even more for the bright and colorful collegiality we could enjoy:
Amout, Curt, Danny, Eric, Erwin, Francien, Francky, Gokhan, Jan-Willem,
Joao Paulo, Jianfeng, Jochen, Kurt, Lieven, Luc, Marc, Marcus, Michael,
Paul, Steven, Veerle. For getting it all in a book, we are obliged to the
publishers for their confidence, Bruno and Alex to get the job done over long
xii Preface
distance when Liesbet's channels were down, and Amout for letting us
benefit from his other book efforts. Also, we want to acknowledge those
people and organizations who played an important role in providing us
literally with the meat and the food: Bert, Jean, Marc, Marius, Rudy,
Vincent, IMEC, University of Sao Paulo, ESA. Virginia, Caroline, Frank,
and our relatives and friends deserve a special reward for not complaining
too much when we spend overtime on writing books and stuff.
This book introduces the basics on turbo codes in their different flavors
(more specifically, parallel concatenated convolutional turbo codes and
block turbo codes) in chapter 1. The 'How?' question being crucial, we
formulate a formal answer based on a systematic design methodology in
chapter 2. We apply these methodologies to propose original solutions to
realize the implementation of turbo codes, featuring attractive performances
in term of throughput, latency and energy consumption. Specifically, the
Maximum a Posteriori SISO decoding module of a convolutional turbo
decoder is tackled in chapter 3, chapter 4 handles block codes SISO, and
chapter 5 cracks the interleaving nut. Finally, chapter 6 presents a real-life
prototype that demonstrates the effectiveness of the original solution
proposed in the case of parallel concatenated CTC.
Liesbet, Alex, Bruno
August 2003, Leuven - Manaus
[1] Benny Nijman, 'Ik weet niet hoe.'