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About System-level Test and Validation of Hardware/Software Systems
"System-level Test and Validation of Hardware/Software Systems provides a state-of-the-art overview of the current validation and test techniques by covering all aspects of the subject including: modeling of bugs and defects; stimulus generation for validation and test purposes (including timing errors); and design for testability. For researchers working on system-level validation and testing, for tool vendors involved in developing hardware-software co-design tools and for graduate students working in embedded systems and SOC design and implementation, System-level Test and Validation of Hardware/Software Systems will be an invaluable source of reference.
Detailed Information
| Author: | Matteo Sonza Reorda, Zebo Peng, Massimo Violante |
|---|---|
| Publication Year: | 2005 |
| ISBN: | 1852338997 |
| Pages: | 187 |
| Language: | English |
| File Size: | 1.727 |
| Format: | |
| Price: | FREE |
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