Table Of ContentApplied Solid State Science
ADVANCES IN
MATERIALS AND DEVICE RESEARCH
Editor: Raymond Wolfe
AT&T BELL LABORATORIES
MURRAY HILL, NEW JERSEY
Supplement 1
Magnetic Domain Walls in Bubble Materials
A. P. Malozemoff and J. C. Slonczewski
Supplement 2 (in three parts)
Silicon Integrated Circuits
Edited by Dawon Kahng
Silicon Integrated Circuits
Parte
Edited by Dawon Kahng
AT&T BELL LABORATORIES
MURRAY HILL, NEW JERSEY
1985
ACADEMIC PRESS, INC.
(Harcourt Brace Jovanovich, Publishers)
Orlando San Diego New York London
Toronto Montreal Sydney Tokyo
COPYRIGHT © 1985, BY ACADEMIC PRESS, INC.
ALL RIGHTS RESERVED.
NO PART OF THIS PUBLICATION MAY BE REPRODUCED OR
TRANSMITTED IN ANY FORM OR BY ANY MEANS, ELECTRONIC
OR MECHANICAL, INCLUDING PHOTOCOPY, RECORDING, OR
ANY INFORMATION STORAGE AND RETRIEVAL SYSTEM, WITHOUT
PERMISSION IN WRITING FROM THE PUBLISHER.
ACADEMIC PRESS, INC.
Orlando, Florida 32887
United Kingdom Edition published by
ACADEMIC PRESS INC. (LONDON) LTD.
24-28 Oval Road, London NW1 7DX
ISSN 0194-2891
ISBN 0-12-002960-X
PRINTDE IN THE UNITDE STATS EOF AMERAI C
85 86 87 88 9 8 7 6 5 4 3 2 1
List of Contributors
Numbers in parentheses indicate the pages on which the authors' contributions begin.
G. K. CELLER, AT&T Bell Laboratories, Murray Hill, New Jersey 07974(1)
W. FICHTNER, AT&T Bell Laboratories, Murray Hill, New Jersey 07974
(119)
SEITARO MATSUO, Atsugi Electrical Communication Laboratory,
Nippon Telegraph and Telephone Public Corporation, Atsugi-shi,
Kanagawa 243-01, Japan (75)
Τ. E. SEIDEL, AT&T Bell Laboratories, Murray Hill, New Jersey 07974 (1)
vii
Preface
It has been twenty years since the first MOS transistors were demonstrated
using the Si0 -Si system. This system is unique in that thermal Si0 films
2 2
possess high dielectric strength and its interfaces contain manageable
amounts of interfacial states, both conditions being essential to a successful
MOS transistor. In conjunction with Si planar technology, the MOS-based
integrated circuits are impacting our daily lives on a scale not encountered
since the Industrial Revolution. The MOS circuit performance has steadily
improved with the advent of fine-line lithography and is expected to surpass
that of bipolar transistor circuits. The Applied Solid State Science serial
publication has followed these exciting developments through judicious
selection of review articles, although they have been somewhat disjoint.
The time is now ripe for presenting a package of reviews, in the form of
supplementary volumes to the publication, on the current status of MOS
device physics, which has shown remarkable maturity during the past five
years, and of device processing technology, which is still undergoing almost
daily improvement.
The first supplementary volume begins with a chapter by John R. Brews.
This chapter develops the most complete theory to date of long-channel
MOS transistors on good physical foundations. Important device parameters
are derived in closed form, mostly compact enough to aid circuit simulations,
based on sound approximations with clearly defined validity. The chapter
closes with an examination of short channel effects that indicate the future
direction in research. The chapter has been written in a tutorial spirit and
should prove an excellent text for students in undergraduate and graduate
school, as well as a guide to practicing scientists and engineers. The first
volume also contains two more chapters designed to introduce readers to
emerging, next-generation integrated circuits. One is a review article by
Yoshio Nishi and Hisakazu Iizuka covering the recent efforts to develop
nonvolatile semiconductor memories. An ideal memory stores data per
manently, yet permits fast access using a minimum of energy, and is physi
cally compact. It appears that silicon technology is evolving to finally create
such an ideal memory. The readers should find this chapter both illuminating
and exciting. The final chapter of the first volume, by Alfred C. Ipri, reviews
ix
χ PREFACE
the current status of silicon-on-sapphire (SOS) technology. This article
assesses the future of SOS technology, which is presently at a crossroad.
Long-held promises of higher circuit performance are being challenged by
the evolving VLSI and non-SOS circuits on the one hand and lingering
materials problems associated with silicon-sapphire interfaces on the other.
Hopefully, this chapter prepares those who wish to work toward resolving
the difficulties and attaining the promised land in the near future.
The main applications of MOS integrated circuits have been in low-power
circuitry (i.e., memories and logic circuits). Recent movements toward high
power integrated circuits promise to carve out another major domain. The
second volume, therefore, deals with the special considerations needed to
achieve high-power Si-integrated circuits. The first chapter of this volume,
by Richard B. Fair, lays foundation for the most important operations
needed for the high-power circuitry, namely, impurity diffusion and oxida
tion. This chapter treats these related phenomena in light of the most recent
understanding of crystal defects under thermal equilibrium in silicon. The
second chapter, by B. Jayant Baliga, systematically develops essential high-
power device physics and associated technology. This chapter should serve
the needs of practicing scientists and engineers for immediate applications.
Again, it is written in a tutorial tone and should be appropriate as a text.
The third volume contains topics on ever-evolving processing technology.
Since Si-integrated circuits are matured commercial entities, new techno
logical innovations rather than new physics tend to play a major role. It is
felt appropriate, therefore, to review in this volume some of the most prom
ising new approaches along with the new understanding of processing-related
areas of physics and chemistry.
The first chapter, by G. K. Celler and Τ. E. Seidel, is on the transient
thermal processing of silicon. The second, by Seitaro Matsuo, is concerned
with the use of electron cyclotron resonance plasmas in two important
materials processing techniques: reactive ion-beam etching and plasma
deposition. The third, by W. Fichtner, deals with the exploding area of VLSI
processing and process simulation.
The Editor wishes to thank the contributing authors for their arduous
efforts and personal sacrifices that made the publishing of this volume
possible. Finally, the Editor acknowledges AT & Τ Bell Laboratories, some
facilities of which were used in editing these volumes, and especially the
editorial skill rendered by Ms. Denise McGrew.
Dawon Kahng
APPLIED SOLID STATE SCIENCE, SUPPLEMENT 2C
Transient Thermal Processing of Silicon
G. Κ. CELLER AND Γ. £. SEIDEL
AT&T BELL LABORATORIES
MURRAY HILL, NEW JERSEY
I. Introduction 2
II. Adiabatic Annealing 4
4
1. Introduction
2. Absorption of Photons and Electrons 4
3. Equipment 10
4. Microstructure and Dopant Incorporation 11
5. Amorphization of Si and Other Rapid Regrowth Phenomena . .. 18
6. Summary 22
III. Thermal Flux Annealing 23
7. Equipment 23
8. Diffusion Profiles 25
9. Defects in Beam-Annealed Si 26
10. SPE Rate Measurements 28
IV. Isothermal Rapid Annealing 32
11. Equipment and General Uses 32
12. Temperature Determination and Stress Effects 35
13. Dopant Activation 40
14. Dopant Diffusion (Boron and Arsenic) 44
15. Defect Removal 53
V. Related Rapid Thermal Processes 55
16. Fast Evaluation of Implantation 55
17. Shallow Junctions for ICs 55
18. Grain Boundary Diffusion 56
19. P-GlassFlow 58
20. Suicide Formation 58
21. Aluminum Contact Sintering 59
22. Recrystallization of Si on Insulator 60
23. Laser Gettering of Impurities 64
VI. Summary 66
References 67
1
Copyright © 1985 by Academic Press, Inc.
All rights of reproduction in any form reserved.
ISBN 0-12-002960-X
2 G. Κ. CELLER AND Τ. Ε. SEIDEL
I. Introduction
Very large scale integration (VLSI) of semiconductor devices has become
a reality. Its needs are the driving force for developing new processing
technologies. Typical processes for fabrication of semiconductor devices
can be grouped into three categories: (1) pattern definition by lithography,
(2) introduction of electrically active impurities (doping) and deposition of
conducting or insulating films, and (3) heat treatments for oxidations, dif
fusions, sintering, reflowing, suicide formation, and for annealing of defects
introduced by any of the preceding processes.
Although great advances have been achieved over the years in the fields of
lithography, doping, and film deposition, the delivery of heat has not changed
significantly since the early days of the semiconductor industry. It usually
involves insertion of a stack of silicon wafers held in a quartz boat into a
resistively heated quartz tube. The heating rates are a function of the inser
tion speed and the number of wafers in the boat. The wafers start heating from
the edges and it takes several minutes to reach the final temperature and even
heat distribution. If wafers were inserted rapidly, the temperature gradients
would be sufficient to cause wafer slip and bow, and boat rollers could scatter
particles onto silicon surfaces. To avoid these problems wafers are heated
and cooled slowly over several minutes and absorb much more thermal
energy than is necessary for annealing. An additional disadvantage of con
ventional heat treatments is the lack of any provision for localized heating
of selected areas or layers. For example, since most semiconductor devices
are formed in the top l-3-μηι surface layer of 500-^m-thick silicon wafers,
it would often suffice to heat this top layer only, something that cannot be
done in a tube furnace.
As devices become smaller, it becomes more important to control precisely
the spatial extent of the electrically active layers. By selecting a suitable
acceleration energy, the stopping range of implanted ions can be controlled
quite accurately. This advantage of depth control is largely compromised
by thermal diffusion of impurities during furnace annealing and during
other high-temperature processing steps. For that reason VLSI devices
necessitate development of "low-temperature" processing. Rapid annealing
encompasses several methods of reducing the heating cycles. They range
from laser annealing with nanosecond pulses of light to rapid isothermal
heating over several seconds.
The rapid annealing processes can be divided into three groups: (1)
adiabatic, (2) thermal flux, and (3) rapid isothermal annealing. This classifica
tion, first proposed by Hill,1 is illustrated in Fig. 1. In adiabatic annealing,
TRANSIENT THERMAL PROCESSING OF SILICON 3
the energy is deposited right at the surface, within the top \-μτη layer, in a
time too short to allow any appreciable heat loss by diffusion into the mate
rial. Consequently, the near-surface layer is melted while the rest of the
sample remains at room temperature. All irradiations with energy beam
pulses shorter than 10" 7 sec fall into this category. In thermal flux annealing,
the thermal diffusion length is comparable to the wafer thickness. Heat is
diffused into the bulk at a substantial rate and temperature gradients span
the wafer thickness. Heating with scanned electron and laser beams falls
into this category and so does flashlamp irradiation. During rapid isothermal
annealing the entire wafer reaches a uniform temperature. This requires a
heating time of at least 1 sec. Conventional furnace heating is of course
isothermal as well. The difference lies in the fact that the entire chamber is
isothermal in a standard furnace, whereas in rapid isothermal heating wafers
absorb most of the radiation and the walls of the enclosure are usually at a
lower temperature.
In this chapter we review annealing with directed-energy beams and rapid
isothermal annealing. Section II is devoted to adiabatic annealing with
laser and electron beams. Pulsed melting provides a unique tool for the
study of very rapid solidification phenomena, some of which are discussed.
Thermal flux annealing is reviewed in Section III. It allows diffusionless
DEPTH
Fig. 1. Definition of three heating regimes—adiabatic, thermal flux, and rapid isothermal.
1
(From Hill. Copyright North-Holland Physics Publishing, Amsterdam, 1981.)
4 G. Κ. CELLER AND Τ. Ε. SEIDEL
solid-phase regrowth of ion-implanted layers. In this section we also present
some novel measurements of solid-phase regrowth rate. Section IV describes
rapid isothermal annealing, from equipment and temperature measurement
considerations to diffusion profiles and defect removal. Section V includes
several applications stemming from rapid annealing and semiconductor
processing with directed-energy beams.
II. Adiabatic Annealing
1. INTRODUCTION
In the mid-1970s Russian scientists were first to report that silicon amorph-
ized by ion implantation recovered its crystallinity when irradiated with a
short, high-intensity pulse from a ruby or Nd:glass laser.2-4 In the process
the implanted impurities were incorporated into silicon lattice and became
electrically active. Since the effect of irradiation was similar to that obtained
in conventional furnace annealing of ion implants, the term laser annealing
was coined. Over the next several years laser annealing has been studied
in great detail and the concept of laser annealing has been broadened to
encompass almost any thermal processing of semiconductors with lasers.5
In this section we primarily consider removing implantation damage and
activating impurities using short laser pulses; we also discuss the limiting
case of an extremely fast solidification. Crystalline recovery with longer,
millisecond irradiation is discussed in Section III.
2. ABSORPTION OF PHOTONS AND ELECTRONS
In adiabatic annealing, a pulse from a Q-switched laser is focused on an
implanted Si target to supply an energy density in excess of 1 J/cm2 to the
surface layer. Since pulses are 10"7-10"9 sec long, the power density has
to be in the 108-W/cm2 range. Lasers with sufficient energy for short-pulse
annealing include ruby, Nd:glass and Nd:YAG, excimer lasers, C0 and
2
alexandrite lasers. For better absorption in silicon, the output of Nd lasers
is often shifted from infrared wavelengths into visible by frequency doubling.
Some representative lasers and their uses are listed in Table I.
The thickness of a heated layer is a function of the optical absorption depth
a-1 and of thermal diffusivity D = K/Cp. The latter determines a charac
v
teristic thermal diffusion length d = (2Di )1/,2 where κ is the thermal con
p
ductivity, C is the specific heat per unit mass (joules per gram per degree
v
