Securing Sdlc & Ntcip Type Messages For Actuated Signal Controllers

101 Pages·2015·1.86 MB·English

by  Timothy Lee Walton

Florida State University Libraries
Electronic Theses, Treatises and Dissertations The Graduate School
2011
Securing SDLC & NTCIP Type Messages
for Actuated Signal Controllers
Timothy L. Walton
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THE FLORIDA STATE UNIVERSITY

COLLEGE OF ENGINEERING

SECURING SDLC & NTCIP TYPE MESSAGES
FOR ACTUATED SIGNAL CONTROLLERS

By

TIMOTHY L. WALTON

A Thesis submitted to the
Department of Electrical & Computer Engineering
in partial fulfillment of the
requirements for the degree of
Master of Science

Degree Awarded:
Fall Semester, 2011
Timothy Lee Walton defended this Thesis on November 1, 2011.
The members of the supervisory committee were:

Dr. Ming Yu
Professor Directing Thesis

Dr. Leonard Tung
Committee Member

Dr. Bruce A. Harvey
Committee Member

The Graduate School has verified and approved the above-named committee members, and
certifies that the Thesis has been approved in accordance with university requirements.
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I dedicate this Thesis Manuscript to my beloved grandmother, Pansy Vera Sapp.

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ACKNOWLEDGEMENTS
I would like to thank the Florida Department of Transportation (FDOT) Traffic Engineering
Research Lab (TERL) personnel for the insight and opportunity to conduct research on traffic
control operations. I extend a special thanks to Carl Morse and Derek Vollmer for answering
and assisting me in finding solutions to many of my technical endeavors.
I would also like to thank Dr. Ming Yu, my Thesis Advisor, for his help and advisement
in constructing my Master Thesis.

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TABLE OF CONTENTS
List of Tables ................................................................................................................................ vii
List of Figures .............................................................................................................................. viii
Abstract ............................................................................................................................................x
1. INTRODUCTION ...................................................................................................................1
1.1 Cabinet Layout ...............................................................................................................2
2. ASC MESSAGING TYPES ....................................................................................................4
2.1 SDLC Messaging and Structure.....................................................................................4
2.2 NTCIP Messaging and Control ......................................................................................6
3. COMMUNICATION SECURITY BACKGROUND ............................................................9
3.1 Link Encryption .............................................................................................................9
3.2 Virtual Private Network (VPN) .....................................................................................9
3.3 Encryption Algorithms.................................................................................................10
3.3.1 Data Encryption Standard (DES). ....................................................................10
3.3.2 Message Digest Algorithm (MD5). .................................................................11
3.3.3 Rivest Shamir and Adlemen (RSA). ................................................................11
4. PROPOSED SECURITY STRATEGY AND ANALYSIS ..................................................13
4.1 Timing and Structure of Message Frame Transmissions .............................................13
4.2 Security Encryption Possibilities .................................................................................16
5. VALIDATIONS ....................................................................................................................18
5.1 Experiment I: Delay Simulations .................................................................................21
5.1.1 Encryption/Decryption Delay times for Command and Response Messages. 24
5.1.2 Combined Delay for Command or Response Messages ..................................26
5.2 Experiment II: DES Encryption Simulations ...............................................................27
5.2.1 DES Encrypted Messaging Between an ASC and a Cabinet Device ..............29
5.2.2 Triple DES Encrypted Messaging Between an ASC and a Cabinet Device....32
5.2.3 Detailed DES Timing Analysis ........................................................................36
6. CONCLUSION .....................................................................................................................42
6.1 Future Work .................................................................................................................42
APPENDICES ...............................................................................................................................43
A. ASC SDLC SPLIT DELAY SECURITY TEST ......................................................................43
B. ASC SDLC COMBINED DELAY SECURITY TEST ............................................................53
C. STOPWATCH TEST ................................................................................................................62
D. 64 BIT KEY DES SEND PROGRAM .....................................................................................63
E. 64 BIT KEY DES RECEIVE PROGRAM ...............................................................................66
F. 128 BIT KEY TRIPLE DES SEND PROGRAM .....................................................................69
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G. 128 BIT KEY TRIPLE DES RECEIVE PROGRAM ..............................................................72
H. 192 BIT KEY TRIPLE DES SEND PROGRAM ....................................................................75
I. 192 BIT KEY TRIPLE DES RECEIVE PROGRAM................................................................78
J. STREAMLINED DES RECEIVE PROGRAM (TIMING) ......................................................81
BIBLIOGRAPHY ..........................................................................................................................89
BIOGRAPHICAL SKETCH .........................................................................................................90

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LIST OF TABLES
2.1 Message format with flags and CRC .......................................................................................4

4.1 Frequency of Transmission for Command Frames ...............................................................13

5.1 25-to-15 Pin Cable Construction ...........................................................................................22

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LIST OF FIGURES
1.1 Flow of TS2 SDLC Message Broadcasts ................................................................................2

1.2 Basic ASC Interface Diagram .................................................................................................3

2.1 Message flow and function of the TF BIUs ............................................................................5

2.2 Message flow and function of the MMU ................................................................................6

2.3 ASC NTCIP Message Frame Format ......................................................................................7

4.1 Timing of Command and Response Frames .........................................................................14

5.1 Hacking Approach of Replicating an Active Cabinet Device ...............................................19

5.2 Hacking Approach of Becoming the ASC ............................................................................20

5.3 Laptop to ASC Interface ........................................................................................................21

5.4 Spliced 25-to-15 Pin SDLC Connection ...............................................................................23

5.5 Split Delay Approach ............................................................................................................24

5.6 ASC Status Displaying All Errors on Enabled Devices ........................................................25

5.7 ASC Status Displaying No Errors on Enabled Devices ........................................................26

5.8 Combined Delay Approach ...................................................................................................27

5.9 Laptop (“ASC”) to Laptop (“Cabinet Device”) Interface .....................................................28

5.10 Gateway’s Stopwatch Performance Metrics .........................................................................28

5.11 Acer’s Stopwatch Performance Metrics ................................................................................29

5.12 DES Encryption Program Flow of Control ...........................................................................30

5.13 DES Send Console Output ....................................................................................................31

5.14 DES Receive Console Output ...............................................................................................32

5.15 DES vs. Triple DES Legal Key and Block Sizes ..................................................................33

5.16 128-bit Triple DES Send Console Output .............................................................................33

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5.17 128-bit Triple DES Receive Console Output ........................................................................34

5.18 192-bit Triple DES Send Console Output .............................................................................35

5.19 192-bit Triple DES Receive Console Output ........................................................................35

5.20 Streamlined 64-bit DES Receive Console Outputs ...............................................................37

5.21 Streamlined 128-bit DES Receive Console Outputs .............................................................38

5.22 Streamlined 192-bit DES Receive Console Outputs .............................................................39

5.23 Encryption Times for the Varied DES Key Sizes .................................................................40

5.24 Decryption Times for the Varied DES Key Sizes .................................................................41

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