Reconfigurable Computing: Architectures, Tools and Applications: 5th International Workshop, ARC 2009, Karlsruhe, Germany, March 16-18, 2009. Proceedings

400 Pages·2009·10.39 MB·English

by  Brent Nelson (auth.)

Lecture Notes in Computer Science 5453
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DavidHutchison
LancasterUniversity,UK
TakeoKanade
CarnegieMellonUniversity,Pittsburgh,PA,USA
JosefKittler
UniversityofSurrey,Guildford,UK
JonM.Kleinberg
CornellUniversity,Ithaca,NY,USA
AlfredKobsa
UniversityofCalifornia,Irvine,CA,USA
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ETHZurich,Switzerland
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StanfordUniversity,CA,USA
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WeizmannInstituteofScience,Rehovot,Israel
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UniversityofBern,Switzerland
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IndianInstituteofTechnology,Madras,India
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UniversityofDortmund,Germany
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MassachusettsInstituteofTechnology,MA,USA
DemetriTerzopoulos
UniversityofCalifornia,LosAngeles,CA,USA
DougTygar
UniversityofCalifornia,Berkeley,CA,USA
GerhardWeikum
Max-PlanckInstituteofComputerScience,Saarbruecken,Germany
Jürgen Becker Roger Woods
Peter Athanas Fearghal Morgan (Eds.)
Reconfigurable Computing:
Architectures, Tools
and Applications
5th International Workshop, ARC 2009
Karlsruhe, Germany, March 16-18, 2009
Proceedings
1 3
VolumeEditors
JürgenBecker
UniversitätKarlsruhe(TH)
InstitutfürTechnikderInformationsverarbeitung(ITIV)
76128Karlsruhe,Germany
E-mail:[email protected]
RogerWoods
Queen’sUniversityBelfast,ECITInstitute
Queen’sRoad,Queen’sIsland,Belfast,BT39DT,UK
E-mail:[email protected]
PeterAthanas
VirginiaTech,BradleyDepartmentofElectricalandElectronicEngineering
302Whittemore(0111),Blacksburg,VA24061,USA
E-mail:[email protected]
FearghalMorgan
NationalUniversityofIreland,DepartmentofElectronicEngineering
Galway,Ireland
E-mail:[email protected]
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ISBN-10 3-642-00640-XSpringerBerlinHeidelbergNewYork
ISBN-13 978-3-642-00640-1SpringerBerlinHeidelbergNewYork
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for ARC 2006 and 2007
Preface
Reconfigurable computing (RC) technologies offer the promise of substantial
performance gains over traditional architectures by customizing, sometimes at
run-time,thetopologyoftheunderlyingarchitecturetomatchthespecificneeds
of a given application. Contemporary configurable architectures allow for the
definitionofarchitectureswithfunctionalandstorageunits thatmatchthe spe-
cific needs of a given computation, in terms of function, bit-width and control
structures. Compared to standard microprocessor architectures, advantages are
possibleintermsofpowerconsumptiononabroadrangeofdifferentapplication
fields.Moreover,the flexibility enabledby reconfigurationis alsoseen asa basic
technique for overcoming transient failures in emerging device structures.
Techniquesforachievingreconfigurablesystemsarenumerousandrequirethe
joint development of reconfigurable hardware systems to support the dynamic
behavior, e.g., suitable programming models, tools and languages, to support
the reconfiguration process during run-time as well as during design-time. This
includesverificationtechniquesthatcandemonstrateformallycorrectreconfigu-
rationsequencesateachstage.Whiletherearemanyproblems,theexistenceand
developmentoftechnologiessuchasrecentmulti-andmany-coreprocessorarchi-
tectures,dynamicallyreconfigurableandmulti-graincomputingarchitectures,as
well as application-specific processors suggest that there is a very strong need
for adaptive and reconfigurable systems.
The International Workshop of Applied Reconfigurable Computing (ARC)
aims to bring together researchers and practitioners of reconfigurable comput-
ingwithanemphasisonpracticalapplicationsofthispromisingtechnology.This
year’sworkshopwasaccompaniedbyselectedinternationalinvitedspeakerswith
strong views on the future of reconfigurable technology. This LNCS volume in-
cludes papers selected for the fifth edition of the workshop (ARC 2009), held
at the Karlsruhe Institute of Technology (KIT), Germany during March 16-18,
2009.The ARC2009workshopattractedalargenumberofhigh-qualitypapers,
describing interesting work on research related to applied reconfigurable com-
puting. A total of 65 papers were submitted to the workshopfrom22 countries:
Japan(9),Germany(8),UK(7),Spain(5),Ireland(4),RepublicofSouthKorea
(3), Italy (3), France (3), The Netherlands (3), Poland (2), USA (2), Republic
of China (2), Portugal (2), Thailand (2), Brazil (2), Mexico (2), Greece (1),
India (1), Iran (1), Romania (1), Pakistan (1), and Finland (1). This distribu-
tion is reflective of the international engagement in the disciplines related to
reconfigurable systems.
In all cases, submitted papers were evaluated by three members of the Pro-
gramCommittee. After carefulselection,21 paperswere acceptedasfull papers
(acceptance rate of 32.3%) and 21 as short papers (global acceptance rate of
64.6%).The acceptedpapers ledto a veryinterestingworkshopprogram,which
VIII Preface
we consider to constitute a representative overview of on-going research efforts
in applied reconfigurable computing, a rapidly evolving and maturing field.
The workshop was distinguished by a strong focus on interdisciplinary ap-
plications of reconfigurable systems. Of the 21 papers selected for presentation,
and of the nine presentation sessions, one-third were directly devoted to recon-
figurable systems applications. Closely related to the application theme, other
sessionsatthe workshopincludedresourceallocationandscheduling,FPGAse-
curity and bitstream analysis, architectures, cryptography, and placement and
routing strategies.As reflected by the diverseprogram,the applicationdomains
thatareimpactedbyreconfigurablecomputingcontinuetoexpand.ARCcontin-
uestoservetheinternationalcommunitybyprovidingaforumfortheintellectual
exchange of technologies, methodologies and thought.
We would like to thank all the authors for submitting their first versions
of the papers and the final versions of the accepted papers. We would like to
acknowledgethesupportofallthemembersofthis year’sSteeringandProgram
Committees in reviewing papers, in helping the paper selection and in giving
valuablesuggestions.WewouldalsoliketothankthemembersoftheOrganizing
Committee for their competent guidance and work in the last month, as well as
Springerfortheircontinuoussupportofthisevent.Specialthanksarededicated
to the distinguished invited speakers and their contribution to the technical
program.
January 2009 Ju¨rgen Becker
Roger Woods
Peter Athanas
Fearghal Morgan
Organization
Organizing Committee
General Chairs Ju¨rgen Becker (Karlsruhe Institute of Technology
(KIT), Germany)
RogerWoods (Queen’sUniversityofBelfast,UK)
ProgramChairs Peter Athanas (Virginia Tech, USA)
Fearghal Morgan (National University of Ireland,
Galway, Ireland)
Proceedings Chair Alastair Smith (Imperial College London, UK)
Local Chair Michael Hu¨bner (Karlsruhe Institute of
Technology (KIT), Germany)
Publicity Pete Sedcole (Imperial College London, UK)
Philip Leong (Chinese University of Hong Kong,
China)
Steering Committee
Hideharu Amano Keio University,Japan
Ju¨rgen Becker Universit¨at Karlsruhe (TH), Germany
Mladen Berekovic Braunschweig University of Technology, Germany
Koen Bertels Delft Universityof Technology, The Netherlands
Joa˜o M.P. Cardoso IST/INESC-ID,Portugal
KatherineCompton University of Wisconsin-Madison, USA
George Constantinides Imperial College London,UK
Pedro C. Diniz Instituto SuperiorT´ecnico, Portugal
Philip H.W. Leong Chinese Universityof Hong Kong, China
Walid Najjar University of California Riverside, USA
Roger Woods Queen’s University of Belfast, UK
Program Committee
Peter Athanas Virginia Tech, USA
Michael Attig Xilinx Research Labs, San Jose, USA
NaderBagherzadeh University of California, Irvine, USA
Ju¨rgen Becker University of Karlsruhe(TH), Germany
Mladen Berekovic Braunschweig University of Technology, Germany
Neil Bergmann University of Queensland,Australia
Koen Bertels Delft Universityof Technology, The Netherlands
Christos-Savvas Bouganis Imperial College London,UK
Mihai Budiu Microsoft Research, USA
X Organization
Joa˜o M.P. Cardoso IST/INESC-ID,Portugal
Mark Chang Olin College, USA
Paul Chow University of Toronto, Canada
KatherineCompton University of Wisconsin-Madison, USA
George Constantinides Imperial College London,UK
OliverDiessel University of NewSouth Wales, Australia
Pedro C. Diniz Instituto SuperiorT´ecnico, Portugal
Tarek El-Ghazawi George Washington University,USA
Robert Esser Xilinx Corp., Ireland
Suhaib Fahmy Trinity College Dublin,Ireland
AntonioFerrari University of Aveiro,Portugal
Guy Gogniat Universit´e deBretagne Sud,France
Jim Harkin University of Ulster, Magee, UK
ReinerHartenstein University of Kaiserslautern, Germany
Christoph Heer Infineon Technologies AG, Germany
Rom´an Hermida Complutense Universityof Madrid, Spain
Michael Hu¨bner Karlsruhe Instituteof Technology (KIT),
Germany
RyanKastner University of California, Santa Barbara, USA
AndreasKoch Darmstadt University of Technology, Germany
Philip Leong Chinese Universityof Hong Kong, China
WayneLuk Imperial College London,UK
Maria-Cristina Marinescu IBM T.J. Watson Research Center, USA
Liam Marnane University College Cork, Ireland
Eduardo Marques University of S˜ao Paulo, Brazil
Konstantinos Masselos University of thePeloponnese, Greece
John McAllister Queen’s University Belfast, UK
SedaO¨. Memik Northwestern University,USA
Fearghal Morgan National University of Ireland, Galway, Ireland
Robert Mullins University of Cambridge, UK
Walid Najjar University of California Riverside, USA
Hora´cio Neto INESC-ID/IST,Portugal
Joon-seok Park Inha University,Seoul, South Korea
AndyPimentel University of Amsterdam, TheNetherlands
Joachim Pistorius Altera Corp., USA
Marco Platzner University of Paderborn, Germany
Bernard Pottier University of Bretagne, France
Tsutomu Sasao KyushuInstituteof Technology, Japan
Pete Sedcole Imperial College London,UK
Lesley Shannon Simon Fraser University,USA
Alastair Smith Imperial College London,UK
HaydenSo Hong Kong University,Hong Kong
Thilo Streichert Daimler AG, Germany
SrikanthanThambipillai NanyangTechnological University,Singapore
Pedro Trancoso University of Cyprus,Cyprus
Ranga Vemuri University of Cincinnati, USA
Markus Weinhardt PACT Informationstechnologie AG,Germany
Stephan Wong Delft Universityof Technology, The Netherlands
Roger Woods Queen’s University Belfast, UK
Table of Contents
Keynotes
FPGA Design Productivity – A Discussion of the State of the Art and
a Research Agenda............................................... 1
Brent Nelson
Resiliency in Elemental Computing................................. 2
Joseph Hassoun
The Colour of Embedded Computation ............................. 3
Ian Phillips
Applications 1
A HyperTransport3 PhysicalLayer Interface for FPGAs.............. 4
Heiner Litz, Holger Froening, and Ulrich Bruening
Parametric Design for Reconfigurable Software-Defined Radio ......... 15
Tobias Becker, Wayne Luk, and Peter Y.K. Cheung
Applications 2
Hardware/SoftwareFPGA Architecture for Robotics Applications...... 27
Juan Carlos Moctezuma Eugenio and Miguel Arias Estrada
Reconfigurable Operator Based Multimedia Embedded Processor ...... 39
Daniel Menard, Emmanuel Casseau, Shafqat Khan, Olivier Sentieys,
St´ephane Chevobbe, St´ephane Guyetant, and Raphael David
FPGA Security and Bitstream Analysis
A Protocolfor Secure Remote Updates of FPGA Configurations ....... 50
Saar Drimer and Markus G. Kuhn
FPGA Analysis Tool: High-Level Flows for Low-Level Design Analysis
in Reconfigurable Computing...................................... 62
Krzysztof Kepa, Fearghal Morgan, Krzysztof Ko´sciuszkiewicz,
(cid:1)
Lars Braun, Michael Hu¨bner, and Ju¨rgen Becker
Fault Tolerant Systems
An Efficient and Low-Cost Design Methodology to Improve
SRAM-Based FPGA Robustness in Space and Avionics Applications ... 74
Marco Lanuzza, Paolo Zicari, Fabio Frustaci, Stefania Perri, and
Pasquale Corsonello
XII Table of Contents
Timing Driven Placement for Fault Tolerant Circuits Implemented on
SRAM-Based FPGAs............................................. 85
Luca Sterpone
Architectures
A Novel Local Interconnect Architecture for Variable Grain Logic
Cell ............................................................ 97
Kazuki Inoue, Motoki Amagasaki, Masahiro Iida, and
Toshinori Sueyoshi
Dynamically Adapted Low Power ASIPs ............................ 110
Mateus B. Rutzig, Antonio Carlos S. Beck, and Luigi Carro
Fast Optical Reconfigurationof a Nine-Context DORGA.............. 123
Mao Nakajima and Minoru Watanabe
Place and Route Techniques
Heterogeneous Architecture Exploration: Analysis vs. Parameter
Sweep .......................................................... 133
Asma Kahoul, George A. Constantinides, Alastair M. Smith, and
Peter Y.K. Cheung
On Simplifying Placement and Routing by Extending Coarse-Grained
Reconfigurable Arrays with Omega Networks ........................ 145
Ricardo Ferreira, Alex Damiany, Julio Vendramini,
Tiago Teixeira, and Jo˜ao M.P. Cardoso
A New Datapath Merging Method for Reconfigurable System.......... 157
Mahmood Fazlali, Mohammad K. Fallah, Mahdy Zolghadr, and
Ali Zakerolhosseini
Cryptography
Optimizing the Control Hierarchy of an ECC Coprocessor Design on
an FPGA Based SoC Platform .................................... 169
Xu Guo and Patrick Schaumont
Fully Pipelined Hardware Implementation of 128-Bit SEED Block
Cipher Algorithm ................................................ 181
Jaeyoung Yi, Karam Park, Joonseok Park, and Won W. Ro
Improving Throughput of AES-GCM with Pipelined Karatsuba
Multipliers on FPGAs ............................................ 193
Gang Zhou, Harald Michalik, and La´szlo´ Hinsenkamp