Radio Frequency Switch-mode Power Amplifiers and Synchronous Rectifiers for Wireless ...

172 Pages·2015·3.15 MB·English

Radio Frequency Switch-mode Power
Amplifiers and Synchronous Rectifiers
for Wireless Applications
by
Sadegh Abbasian
A THESIS SUBMITTED IN PARTIAL FULFILLMENT OF
THE REQUIREMENTS FOR THE DEGREE OF
DOCTOR OF PHILOSOPHY
in
THE COLLEGE OF GRADUATE STUDIES
(Electrical Engineering)
THE UNIVERSITY OF BRITISH COLUMBIA
(Okanagan)
October 2015
c Sadegh Abbasian, 2015
(cid:13)
Abstract
This thesis focuses on identifying and evaluating device, circuit, and system level issues
that affect the power efficiency of class-D and class-F switch-mode amplifiers, and class-
F synchronous rectifiers. The amplifier and rectifier circuits are used to implement pulse
encoded switch-mode power amplifier systems.
A detailed power efficiency analysis of current mode class-D amplifiers is presented for
variable duty cycle pulse trains. A device model with current saturation in the switch is
introduced and gives insight into how to select an appropriate load line for variable duty cycle
switching conditions. Other new results include the effect of capacitive switching losses which
are usually neglected in current mode amplifiers. The analytical results are compared with
simulationresultsandconfirmthatthemodelcanprovidegoodpredictionsofpowerefficiency
for a more general class of pulse encoded signals.
Class-F amplifiers are also investigated in this work. The work investigates how input
harmonic matching impedances at the gate affect amplifier power efficiency. Second harmonic
matchingisveryimportantanddesensitizesthecircuittononlinearcapacitancesinthedevice.
Third harmonic input terminations are much less significant. A comparison of voltage and
current mode circuits is also made and the current mode is better in terms of maximizing
power efficiency. The work is supported by experimental results.
Class-F amplifier circuits are reconfigured into synchronous rectifiers using the theory
of time-reversal duality. Time-reversal duality is usually applied in the context of lossless
circuits and a discussion of how loss impacts the circuit duals is presented. The rectifier dual
always has slightly higher power efficiency and insights into why this occurs are described.
Experimental results are shown for voltage and current mode class-F rectifiers as well as a
wideband current mode class-F rectifier.
The thesis concludes with the analysis and experimental results for an energy recycling
switch-mode power amplifier. A signal splitting network is implemented at the output of the
amplifier and out-of-band power is rectified to enhance the power efficiency of the amplifier.
Experimental results confirm that energy recycling can increase power efficiency. Concluding
remarksbasedonthisresearcharesummarizedinthecontextofhowbesttousethesecircuits
for implementing high efficiency amplifiers and rectifiers for wireless applications.
ii
Preface
Some of the research results presented in this thesis have been published before in con-
ference and journal articles. My co-author for these publications was Dr. Thomas Johnson,
my research supervisor, and the relations between the published work and this thesis are
summarized below.
A part of Chapter 2 has been published as a conference paper.
S. Abbasian and T. Johnson, “RF current mode class-D power amplifiers under periodic
∗
and non-periodic switching conditions,” in IEEE International Symposium on Circuits
and Systems (ISCAS), May 2013, pp. 610-613.
Part of Chapter 3 has been published as a journal paper.
S. Abbasian and T. Johnson, “Effect of second and third harmonic input impedances
∗
in a class-F amplifier,” Progress In Electromagnetics Research C, vol. 56, pp. 39-53,
2015.
Parts of Chapter 4 have been published as a journal paper and a conference paper.
S. Abbasian and T. Johnson, “High efficiency GaN HEMT class-F synchronous rectifier
∗
for wireless applications,” IEICE Electronics Express, vol. 12, no. 1, pp. 1-11, 2015.
S. Abbasian and T. Johnson, “High efficiency and high power GaN HEMT inverse
∗
class-F synchronous rectifier for wireless power applications,” in European Microwave
Conference (EuMC), Paris, France, Sep. 2015, pp. 1-3.
iii
Table of Contents
Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii
Preface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viii
Acknowledgements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiv
Dedication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xv
List of Acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xvi
Chapter 1: Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Architecture of Switch-Mode Power Amplifier Systems . . . . . . . . . . . . . . 6
1.2.1 Bandpass Sigma-delta Modulation . . . . . . . . . . . . . . . . . . . . . 7
1.2.2 Pulse Position Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.3 Switch-mode Power Amplifier Circuits . . . . . . . . . . . . . . . . . . . . . . . 10
1.3.1 Class-D Power Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.3.2 Class-E Power Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . 15
1.3.3 Class-F Power Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . 17
1.3.4 SummaryofAmplifierClassesBasedonHarmonicTerminationImpedances 20
1.4 Power Efficiency and Device Technology . . . . . . . . . . . . . . . . . . . . . . 21
1.5 Literature Review . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
1.5.1 Class-D Power Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . 22
1.5.2 Class-F Power Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . 25
1.5.3 RF Synchronous Rectifiers. . . . . . . . . . . . . . . . . . . . . . . . . . 27
1.6 Research Goals and Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
1.6.1 Predicting the Power Efficiency of CMCD Power Amplifiers for Time
Encoded Input Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
1.6.2 RF Switch-mode Power Amplifiers with Energy Recycling . . . . . . . . 30
1.6.3 RF Rectifier Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
1.6.4 Class-F and Class-F 1 Power Amplifiers . . . . . . . . . . . . . . . . . . 32
−
1.6.5 Supporting Publications . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
iv
TABLE OF CONTENTS
1.7 Thesis Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Chapter 2: Power Efficiency Analysis of RF Current Mode Class-D Amplifiers 34
2.1 The Current Mode Class-D RF Amplifier . . . . . . . . . . . . . . . . . . . . . 35
2.2 Device Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
2.2.1 Level 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2.2.2 Level 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
2.2.3 Level 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
2.3 Power Efficiency Analysis of a CMCD Amplifier with Periodic Switching . . . . 43
2.3.1 Selecting the DC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . 43
2.3.2 Load Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
2.3.3 Power Loss Mechanisms . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
2.3.4 Selecting a Device Load Line . . . . . . . . . . . . . . . . . . . . . . . . 47
2.3.5 Current Saturation Model . . . . . . . . . . . . . . . . . . . . . . . . . . 51
2.3.6 Analytical versus Simulated Results . . . . . . . . . . . . . . . . . . . . 51
2.4 Predicting CMCD Amplifier Power Efficiency for Pulse Encoded Signals . . . . 54
2.4.1 Time Encoded Input Signal . . . . . . . . . . . . . . . . . . . . . . . . . 54
2.4.2 Power Efficiency for 1T Periodic Signals . . . . . . . . . . . . . . . . . . 54
2.4.3 NT Periodic Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
2.4.4 Power Efficiency Analysis for a 2T Periodic Signal . . . . . . . . . . . . 57
2.4.5 Power Efficiency for 6T Periodic Signals . . . . . . . . . . . . . . . . . . 58
2.5 Chapter Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Chapter 3: Class-F RF Power Amplifiers . . . . . . . . . . . . . . . . . . . . . 61
3.1 Level 3 Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
3.1.1 Bare Die Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
3.2 Class-F Amplifier Simulation Experiments . . . . . . . . . . . . . . . . . . . . . 70
3.2.1 Class-F Amplifier Design . . . . . . . . . . . . . . . . . . . . . . . . . . 71
3.2.2 Harmonic Input Impedances and Sensitivity to Device Capacitances . . 73
3.3 Class-F Amplifier Experimental Results . . . . . . . . . . . . . . . . . . . . . . 76
3.3.1 Physical Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
3.3.2 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
3.4 Inverse Class-F Power Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . 84
3.4.1 Design Methodology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
3.4.2 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
3.5 Wideband Inverse Class-F Power Amplifier . . . . . . . . . . . . . . . . . . . . 86
3.5.1 Design Methodology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
3.5.2 Distributed Matching Networks . . . . . . . . . . . . . . . . . . . . . . . 93
3.5.3 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
3.6 Chapter Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Chapter 4: Class-F RF Synchronous Rectifiers . . . . . . . . . . . . . . . . . . 99
4.1 The Principle of Time Reversal Duality . . . . . . . . . . . . . . . . . . . . . . 99
4.2 Definitions of Equivalence for Amplifier and Rectifier Duals . . . . . . . . . . . 102
4.3 High Efficiency GaN HEMT Class-F Synchronous Rectifier . . . . . . . . . . . 105
4.3.1 Rectifier Test Bench and Efficiency Definitions . . . . . . . . . . . . . . 105
4.3.2 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
v
TABLE OF CONTENTS
4.3.3 Class-F Amplifier and Rectifier Power Efficiency Analysis . . . . . . . . 111
4.3.4 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
4.4 High Efficiency GaN HEMT Inverse Class-F Synchronous Rectifier . . . . . . . 122
4.5 High Efficiency GaN HEMT Wideband Inverse Class-F Synchronous Rectifier . 126
4.6 Chapter Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
Chapter 5: Switch-mode Power Amplifier with Energy Recycling. . . . . . . 129
5.1 Energy Recycling in Outphasing Power Amplifiers . . . . . . . . . . . . . . . . 129
5.2 Energy Recycling in RF Switch-mode Amplifiers . . . . . . . . . . . . . . . . . 129
5.3 Spectral Shaping to Enhance Energy Recycling Efficiency . . . . . . . . . . . . 131
5.4 Analysis of Power Efficiency Enhancement using Energy Recycling . . . . . . . 134
5.5 Experimental Implementation of a Switch-mode Power Amplifier with Energy
Recycling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
5.6 Discussion and Chapter Summary . . . . . . . . . . . . . . . . . . . . . . . . . 140
Chapter 6: Conclusions and Future Work . . . . . . . . . . . . . . . . . . . . . 141
6.1 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
6.2 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
Bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
Appendix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
Appendix A: Measurement Results for Another Class-F PA . . . . . . . . . . . . . . 154
vi
List of Tables
Table 1.1 Coefficient values for the noise shaping filter H (s) . . . . . . . . . . . 9
RF
Table 1.2 Some recently published results for class-D power amplifiers. . . . . . . . 24
Table 1.3 Some recently published results for class-F family PAs . . . . . . . . . . 26
Table 1.4 Some recently published results for RF synchronous rectifiers . . . . . . 28
Table 2.1 Summary of level 2 model values for the Cree CGH60015D die. . . . . . 41
Table 2.2 CMCD Design Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 2.3 Duty cycles for generating signals with a period of 6T. . . . . . . . . . . 59
Table 3.1 Level 3 model values for the Cree GaN HEMT (CGH60015D) in the
off-state bias condition. . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table 3.2 Summary of device capacitances for a Cree GaN HEMT (CGH60015D). 66
Table 3.3 Class-F amplifier designs with input harmonic termination networks. . . 71
Table 3.4 IMN transmission line lengths for a device model with linear capaci-
tances. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Table 3.5 Summary of simulation results for a device model with nonlinear capac-
itances. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Table 3.6 Source and load pull harmonic impedances for the class-F amplifier. . . 78
Table 3.7 Transmission line lengths for load and source matching networks. . . . . 79
Table 3.8 Source and load pull harmonic impedances for the class-F 1 amplifier. . 84
−
Table 3.9 Microstrip transmission line lengths for the class-F 1 amplifier. . . . . . 85
−
Table 3.10 Wideband class-F/family amplifier designs comparison. . . . . . . . . . . 87
Table 3.11 Results of the load/source pull simulations for Z and Z . . . . . . 91
Lopt Sopt
Table 3.12 Admittance parameters and extracted values for a third order network.. 91
Table 3.13 Admittance parameters for low-pass network and extracted values for
thefinalband-passstructurecorrespondingtotheinputmatchingnetwork. 93
Table 3.14 Microstrip transmission line lengths and widths for load and source
matching networks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Table 4.1 Time reversal relations for circuit components. . . . . . . . . . . . . . . 101
Table 4.2 Some recently published results for RF synchronous rectifiers . . . . . . 105
Table 4.3 Comparison of class-F amplifier and rectifier experimental results. . . . 108
Table 4.4 Comparison of class-F amplifier and rectifier circuit duals. . . . . . . . . 120
Table 4.5 Comparison of class-F 1 amplifier and rectifier experimental results. . . 123
−
vii
List of Figures
Figure 1.1 RF switch-mode power amplifier architecture with energy recycling.
The figure also serves as a roadmap for this thesis. . . . . . . . . . . . . 2
Figure 1.2 A class-AB power amplifier. . . . . . . . . . . . . . . . . . . . . . . . . 3
Figure 1.3 Efficiency as a function of conduction angle for conventional power
amplifiers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 1.4 Efficiencyandoutputpowerasafunctionofinputpowerforaclass-AB
amplifier with a conduction angle of 244 (θ = 1.36π). . . . . . . . . . . 5
◦
Figure 1.5 Block diagram of a SMPA with encoder and reconstruction filter. . . . 6
Figure 1.6 Block diagram of a bandpass sigma-delta modulator. . . . . . . . . . . 7
Figure 1.7 Power spectrum of a bandpass sigma-delta modulator.. . . . . . . . . . 7
Figure 1.8 A bandpass sigma-delta modulator pulse train in the time domain. . . 8
Figure 1.9 Block diagram of pulse position modulator. . . . . . . . . . . . . . . . . 9
Figure 1.10 A noise shaped PPM pulse train in the time domain. . . . . . . . . . . 9
Figure 1.11 A noise shaped PPM pulse train in the frequency domain. . . . . . . . 10
Figure 1.12 Schematic of a VMCD power amplifier. . . . . . . . . . . . . . . . . . . 11
Figure 1.13 VMCD amplifier voltage and current waveforms for a periodic drive
signal with a duty cycle of 30%. . . . . . . . . . . . . . . . . . . . . . . 12
Figure 1.14 Schematic of a CMCD. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 1.15 CMCD current and voltage waveforms for a periodic input pulse train
with a duty cycle of 30%. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 1.16 Schematic of a class-E power amplifier. . . . . . . . . . . . . . . . . . . 15
Figure 1.17 Class-E voltage and current waveforms for a 30% duty cycle pulse train. 16
Figure 1.18 Normalized voltage across the switch in a class-E PA for three different
duty cycles: 30% (circle), 50% (star) and 70% (square). . . . . . . . . 17
Figure 1.19 A class-F power amplifier circuit. . . . . . . . . . . . . . . . . . . . . . 18
Figure 1.20 Class-F power amplifier voltage and current waveforms. . . . . . . . . . 19
Figure 1.21 Amplifier classes in terms of harmonic load impedances. . . . . . . . . . 20
Figure 1.22 Band gap energy and saturated velocity for Si, GaAs and GaN. . . . . 21
Figure 1.23 GaN HEMT technology: packaged device from Cree (left) and MMIC
(right). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 2.1 A CMCD circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 2.2 Typical DC IV characteristics for a GaN device. . . . . . . . . . . . . 36
Figure 2.3 Schematicforcurrentmodeclass-Dpoweramplifierwithalevel1device
model (ADS schematic). . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 2.4 Level 1 CMCD current and voltage waveforms for a 30% duty cycle
periodic drive signal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
viii
LIST OF FIGURES
Figure 2.5 Transition time (τ = 0.15T) for a CMCD with Cree CGH60015D tran-
sistors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 2.6 Level 2 device model for a CMCD amplifier. . . . . . . . . . . . . . . . 42
Figure 2.7 S-parameters for the on and off state for a Cree CGH60010D device. . 42
Figure 2.8 Signal with period T and variable duty cycle (α). . . . . . . . . . . . . 43
Figure 2.9 Devicecurrentwaveformsatthedrainterminaloftheswitchingdevice.
The ADS simulation results are for a Cree large signal device model. . 45
Figure 2.10 Overlap of drain current and drain voltage waveforms in a CMCD am-
plifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Figure 2.11 DC IV operating region for a CMCD amplifier including margin for
duty cycle variation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Figure 2.12 EfficiencyandoutputpowerofaCMCDasafunctionofloadresistance
(α = 0.5). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 2.13 EfficiencyandoutputpowerofaCMCDasafunctionofloadresistance
(α = 0.3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 2.14 DC device current as a function of sin(απ) (α is duty cycle). . . . . . 51
Figure 2.15 Losses in the CMCD amplifier as a function of duty cycle. The overlap
period τ is 0.1T. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 2.16 Drain efficiency of CMCD amplifier as a function of duty cycle. . . . . 53
Figure 2.17 Signal with period 1T. . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Figure 2.18 Comparison of power efficiency for a CMCD amplifier with a 1T peri-
odic signal and SDM non-periodic signal. . . . . . . . . . . . . . . . . 55
Figure 2.19 Drain efficiency as a function of modulator drive level for SDM and
PPM encoders. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Figure 2.20 Signal with period 2T. . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Figure 2.21 A 6T signal with a zero mean DC component. . . . . . . . . . . . . . . 57
Figure 2.22 Drain efficiency of CMCD amplifier as a function of duty cycle when
driven with a 2T periodic signal. . . . . . . . . . . . . . . . . . . . . . . 58
Figure 2.23 CMCD amplifier power efficiency for periodic (1T, 2T, and 6T) and
non-periodic pulse trains (SDM and PPM). . . . . . . . . . . . . . . . . 59
Figure 3.1 Level 3 equivalent circuit model for GaN HEMT Cree CGH60015D
[reproduced courtesy of The Electromagnetics Academy]. . . . . . . . . 62
Figure 3.2 Equivalent circuit model for off-state bias conditions. . . . . . . . . . . 63
Figure 3.3 Z-parameters for the level 3 device model (symbols) and for the large
signal device model (solid lines) for the off-state bias condition. . . . . 64
Figure 3.4 Y-parameters for the level 3 device model (symbols) and for the large
signal device model (solid lines) for the off-state bias condition. . . . . 65
Figure 3.5 ExtractedintrinsicdevicecapacitancesfortheCreeGaNHEMT(CGH60015D):
(a) drain-source capacitance, (b) gate-source capacitance, (c) gate-
drain capacitance, and (d) gate-source capacitance versus gate-source
voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Figure 3.6 Device model for packaged die [reproduced courtesy of The Electro-
magnetics Academy]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Figure 3.7 ComparisonofY parametersforthelevel3modelincludingthepack-
11
age (symbols) and the GaN HEMT Cree large signal model for the
CGH40010F (solid line). The device bias conditions are in the off-state. 68
ix
LIST OF FIGURES
Figure 3.8 ComparisonofY parametersforthelevel3modelincludingthepack-
12
age (symbols) and the GaN HEMT Cree large signal model for the
CGH40010F (solid line). The device bias conditions are in the off-state. 69
Figure 3.9 ComparisonofY parametersforthelevel3modelincludingthepack-
22
age (symbols) and the GaN HEMT Cree large signal model for the
CGH40010F (solid line). The device bias conditions are in the off-state. 69
Figure 3.10 Schematic for the class-F PA [reproduced courtesy of The Electromag-
netics Academy]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Figure 3.11 Output matching network (OMN) structure [reproduced courtesy of
The Electromagnetics Academy]. . . . . . . . . . . . . . . . . . . . . . . 73
Figure 3.12 Spectrum for the case where C = 0 pF: drain voltage (left) and gate
gd
voltage (right) [reproduced courtesy of The Electromagnetics Academy]. 73
Figure 3.13 Spectrum for the case where C = 0.36 pF: drain voltage (left) and
gd
gatevoltage(right)[reproducedcourtesyofTheElectromagneticsAcademy]. 74
Figure 3.14 Input matching network circuits: (a) Design 1, (b) Design 2 and (c)
Design 3 [reproduced courtesy of The Electromagnetics Academy]. . . . 74
Figure 3.15 Simulated drain efficiency as a function of second harmonic level for
a device model with linear capacitances [reproduced courtesy of The
Electromagnetics Academy]. . . . . . . . . . . . . . . . . . . . . . . . . 77
Figure 3.16 Schematic of the class-F power amplifier with output and input match-
ingcircuitsandbiasnetworks[reproducedcourtesyofTheElectromag-
netics Academy]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Figure 3.17 Simulated drain voltage and drain current waveforms (left) and gate
voltageanddraincurrentwaveforms(right)[reproducedcourtesyofThe
Electromagnetics Academy]. . . . . . . . . . . . . . . . . . . . . . . . . 79
Figure 3.18 Photograph of the 10 W class-F power amplifier. . . . . . . . . . . . . . 80
Figure 3.19 The class-F amplifier test bench. . . . . . . . . . . . . . . . . . . . . . . 80
Figure 3.20 Measured and simulated drain efficiency and output power as a func-
tion of input power for a CW test signal [reproduced courtesy of The
Electromagnetics Academy]. . . . . . . . . . . . . . . . . . . . . . . . . 81
Figure 3.21 Measured and simulated drain efficiency and output power as a func-
tion of frequency for a CW test signal [reproduced courtesy of The
Electromagnetics Academy]. . . . . . . . . . . . . . . . . . . . . . . . . 82
Figure 3.22 Measured output spectrums for a WCDMA signal at three different
output power levels: (a) 35.1 dBm (b) 33.4 dBm and (c) 31.6 dBm
[reproduced courtesy of The Electromagnetics Academy]. . . . . . . . . 82
Figure 3.23 Measured drain efficiency and ACLR as a function of output power
for a WCDMA signal [reproduced courtesy of The Electromagnetics
Academy]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Figure 3.24 Schematicoftheclass-F 1 PAwithoutputandinputmatchingcircuits
−
and bias networks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Figure 3.25 Simulated drain voltage (solid) and drain current (dash) waveforms for
the class-F 1 power amplifier. The waveforms are shown for the drain
−
terminal of the packaged device. . . . . . . . . . . . . . . . . . . . . . . 86
Figure 3.26 Photograph of the class-F 1 power amplifier. . . . . . . . . . . . . . . . 86
−
Figure 3.27 Drain efficiency and output power as a function of input power for the
fabricated class-F 1 PA. . . . . . . . . . . . . . . . . . . . . . . . . . . 87
−
x