Table Of ContentProgrammable Logic
PLDs and FPGAs
Programmable Logic
PLDs and FPGAs
R. C. Seals and G. F. Whapshott
School of Engineering
University of Greenwich
© R. C. Seals and G. F. Whapshott 1997
Softcover reprint of the hardcover 1st edition 1997
All rights reserved. No reproduction, copy or transmission of
this publication may be made without written permission.
No paragraph of this publication may be reproduced, copied or
transmitted save with written permission or in accordance with
the provisions of the Copyright, Designs and Patents Act 1988,
or under the terms of any licence permitting limited copying
issued by the Copyright Licensing Agency, 90 Tottenham Court
Road, London W1P 9HE.
Any person who does any unauthorised act in relation to this
publication may be liable to criminal prosecution and civil
claims for damages.
First published 1997 by
MACMILLAN PRESS LTD
Houndmills, Basingstoke, Hampshire RG21 6XS
and London
Companies and representatives
throughout the world
ISBN 978-1-349-14005-3 ISBN 978-1-349-14003-9 (eBook)
DOI 10.1007/978-1-349-14003-9
A catalogue record for this book is available
from the British Library.
This book is printed on paper suitable for recycling and
made from fully managed and sustained forest sources.
8 7 6 5 4 3 2 1
04 03 02 01 00 99 98 97
Contents
Preface viii
1 Introduction to integrated circuits 1
1.1 What is programmable logic? 1
1.2 Semiconductor technologies 7
1.3 Packaging 12
1.4 The development environment 21
1.5 Case study: Selecting an FPGA development environment 30
1.6 Problems 33
1.7 Further reading 35
2 Programmable technologies 36
2.1 Creating passive circuit components 36
2.2 Active circuit components 38
2.3 Programmable circuit elements 46
2.4 Introduction to JTA G 54
2.5 The main producers 59
2.6 Problems 60
2.7 Further reading 61
3 Programmable logic devices 63
3.1 The basic architecture 63
3.2 Development software 68
3.3 Programming 71
3.4 Standardised file formats for programming PLDs 72
3.5 Designing test vectors 75
3.6 Problems 100
3.7 Further reading 101
4 Field programmable gate arrays (FPGAs) 102
4.1 The basic architectures 102
4.2 Development software 118
4.3 Programming 126
4.4 Exporting and importing of designs 129
4.5 Testing 132
4.6 Problems 135
4.7 Further reading 138
v
vi Contents
5 Benchmarking 140
5.1 The need for differentiation 140
5.2 Components 141
5.3 Additional features not otherwise benchmarked 145
5.4 Comparing development systems 150
5.5 Trends in benchmarking 154
5.6 Case study: Device selection 154
5.7 Problems 159
5.8 Further reading 161
6 Design examples using PLDs 162
6.1 Designing with programmable logic 162
6.2 Programming examples 163
6.3 MACHXL design examples 164
6.4 Logic gate 164
6.5 Full adder 166
6.6 Multiplier 170
6.7 Sequencer 174
6.8 Stepper motor controller 178
6.9 RISC design 181
6.10 Problems 187
6.11 Further reading 188
7 Design examples using FPGAs 189
7.1 A four-to-one multiplexer 189
7.2 A one-to-four demultiplexer 190
7.3 A 4-bit adder with 7 segment output decoder 191
7.4 A 4-bit counter 197
7.5 An 8-bit counter 200
7.6 Step motor controller with position feedback 202
7.7 Sine wave generator 205
7.8 An 8-bit RISC design 209
7.9 Problems 211
7 .l 0 Further reading 212
8 Migration 213
8.1 Migration from discrete logic to PLDs 214
8.2 Migration from PLDs to FPGA devices 218
8.3 Migration to application specific integrated circuits (ASICs) 236
8.4 Good design practice for successful migration 239
8.5 Design for testability before and after migration 240
8.6 Simulation, test vectors and testing 241
8.7 Problems 242
8.8 Further reading 243
Contents vii
Appendix A MACHXL 244
A.l MACHXL user's handbook 244
A.2 Logic specification 250
A.3 High level language constructs 254
A.4 STATE construct 258
A.5 The simulation section 261
A.6 A language reference summary 265
Appendix B VHDL 266
B.l Introduction to VHDL 266
B.2 Data types and signals 267
B.3 Operators 274
B .4 Concurrent constructs 277
B.5 Constructing a complete VHDL program 278
B.6 High level language constructs 280
B. 7 Processes and sequential statements 284
B. 8 Clocked designs 284
B. 9 Other constructs 285
B.lO A complete VHDL program 286
B.ll References 286
Glossary 287
Index 295
Preface
This book has been produced for those people who are interested in Programm
able Logic Devices (PLD) and Field Programmable Gate Arrays (FPGA) and
want to fmd out more about how they are constructed and produced, how their
architectures differ and the various programming methodologies available for
design. The aim of the book is to give a broad sweep of the topic to enable a full
overview to be obtained, with in-depth analysis, case studies and examples at
important strategic points. Each chapter includes a problems section and a list
of further reading. The problems section will require the reader to expend
considerable mental effort to complete; some questions may require additional
reading to obtain satisfactory answers.
Indicative solutions· to the end of chapter problems may be obtained from
[email protected]
The authors would like to thank Holly Richards for all her assistance with the
preparation of the typescript.
R.C. Seals
G.F. Whapshott
School of Engineering
the University of Greenwich
London UK
Disclaimer
The use or discussion of any component, software program or development
system anywhere within this book should not be taken to be an endorsement or
criticism of that product. Discussion, case studies and examples are for
illustration only and may not be appropriate for real-world use. The aim is to
enable readers of this book to make informed decisions of their own, based on
their own particular circumstances.
Readers may obtain the most up to date information on the products
mentioned in this book by contacting the manufacturers directly.
viii
1 Introduction to integrated circuits
Microelectronics has provided an environment where many new and exciting
ideas and concepts can be implemented easily and cheaply, in order to provide
mankind with an improved quality of life. One aspect of microelectronics which
has rapidly gained acceptance and is in widespread use is programmable logic.
1.1 What is programmable logic?
Programmable logic components are devices which are able to implement a wide
variety of logic functions, both combinational and sequential. The actual logic
function implemented is determined by the user, using some form of design
entry software to specify the state of the internal programmable points. The
internal programmable points are effectively switches which can either be
selected (that is, programmed) to be closed (short circuit), or open (open
circuit).
1.1.1 Permanent or reprogrammable internal programmable points
The internal programmable points can be separated into two main categories,
permanent and reprogrammable. The permanent methods are based on a physical
change to the internal connections using semiconductor fuses, described in
chapter 2. Initially, the programmable logic components have all fuses intact:
then, by applying a higher than usual voltage, large currents can be made to
flow, which heat up the fusible connection until it vaporises and forms an open
circuit. There is no method of reconstructing the fuses, so once they are
programmed no further changes can be made. The alternative is to use
reprogrammable points which do not require any permanent physical change, but
use a reversible programming method such as EPROM or EEPROM, again as
explained in chapter 2. The erasure method may require placement of the device
in a special eraser, usually containing ultraviolet light, or it can be accomplished
electronically while the device is still in circuit.
1.1.2 PW or FPGA
The programmable logic components can also be separated into two categories
based on their internal structure:
Programmable logic devices, which have a small gate count, fixed internal
routing, and deterministic propagation delays.
Field programmable gate arrays, which have large numbers of gates, with user
selectable interconnection (that is, routing), where the propagation delay is
1
2 Programmable logic: PWs and FPGAs
determined by the specific design and routing chosen. Varying the routing may
vary the propagation delay.
The most important difference between the two categories is in the routing
strategies.
1.1.3 Programmable logic devices
All programmable logic devices have a similar architecture consisting of a
number of inputs connected to a number of AND gates. The outputs of the AND
gates are connected to the inputs of a number of OR gates, and the outputs of
the OR gates become the outputs of the PLD. The outputs of the OR gates
produce what is called a 'sum-of-products', as the symbols used to represent
logical AND and OR are the same as for arithmetic multiply and addition, as
illustrated in table 1.1.
Table 1.1 Symbol meaning
Symbol logical arithmetic
* AND multiplication
+ OR addition
The architecture of the PLD discussed so far is a simple one which is not
used, as it does not contain the logical NOT function. In most PLDs there will
be the opportunity to have invertors on all the inputs to the AND gates, as well
as the inputs to the OR gates and the outputs of the OR gates. This would allow
outputs such as
X = /(A * /B) + (C * D) + /D
to be generated. Designs such as these are known as combinational outputs, as
the outputs are determined completely by the inputs at any instant.
PLD architectures can become further complicated by adding registers to the
output of the OR gates; these devices are called registered PLDs, which enable
sequential designs to be implemented. With sequential devices the outputs are
determined both by the instantaneous inputs and the past states of the inputs.
Sequential systems effectively have some 'memory'. In addition, the outputs of
registered PLDs have connections back to the input of the AND gates, see figure
1.1, which are called 'buried' inputs (as they cannot physically be accessed) and
provide a feedback path. The registers require the connection of a clock signal
in order to make them operate. The outputs of the registers will now only change
when the clock signal is applied, and between clock pulses the outputs remain
