Processor Description Languages, Volume 1

408 Pages·2008·47.739 MB·

by  Prabhat Mishra, Nikil Dutt

List of Contributors
rupuN ayyrahcattahB swerdnA
acilisneT
Nupur Bhattacharyya Andrews has been a primary developer of the Tensilica
Instruction Extension (TIE) technology for many years. She has extensive experi-
ence in verification of microprocessors and systems atTensilica and Silicon Graphics
and in ADE tool design for DSP systems at Cadence Design Systems. She received
her master of science degree in signal processing from Louisiana State University,
and a bachelor's degree in electrical engineering from Jadavpur University, India.
odiuG ojuarA
University of Campinas, Brazil
Guido Araujo received his Ph.D. degree in electrical engineering from Princeton
University in 1997. He worked as a consultant for Conexant Semiconductor Sys-
tems and Mindspeed Technologies from 1997 to 1999, and is currently a professor
of computer science and engineering at the University of Campinas (UNICAMP), Sao
Paulo, Brazil. His main research interests are code optimization, architecture simula-
tion, and embedded system design. Araujo was corecipient of best paper awards at
the DAC'97, SCOPES'03, and SBAC-PAD'04. He was also awarded the 2002 University
of Campinas Zeferino VazAward for his contributions to computer science research
and teaching.
oflodoR odevezA
University of Campinas, Brazil
Rodolfo Azevedo received his Ph.D. in computer science from University of Camp-
inas (UNICAMP), Brazil, in 2002. He currently works as a professor in the Institute
of Computing at UNICAMP. Azevedo was a corecipient of a best paper award at
SBAC-PAD'04 for his work on the ArchC ADL. His main research interests are com-
puter architecture, embedded systems, code compression, low power, ADLs, and
system-level design, mainly using SystemC.
aylamriN yayhdapoydnaB
University of Florida, ASU
Nirmalya Bandyopadhyayr eceived his bachelor of engineering degree in computer
science and technology from Bengal Engineering and Science University, Shibpur,
India, in 2004. He spent 2 years in industry in the area of networking and ADE
tool development. He was also associated with the Formal Verification group at the
Indian Institute ofTechnology, Kharagpur. Currently, he is pursuing his Ph.D. degree
from Department of Computer and Information Science and Engineering, University
of Florida, Gainesville, USA. His research interest includes application of satisfiability
in test case generation and multicore verification. xvii
xviii tsiL fo srotubirtnoC
danaK usaB
University of Florida, ASU
Kanad Basu received his bachelor of electronics and teleCommunication engineer-
ing degree from Jadavpur University, Kolkata, India, in 2007. He is currently pursuing
Ph.D. degree from the Computer and Information Science and Engineering depart-
ment of the University of Florida. His research interests include embedded systems,
nanosystem design and verification, and code compression. He has 7 publications in
various international conferences in the areas of wireless networks and intelligent
systems.
mapunA yayhdapottahC
RWTHAachen University, Germany
Anupam Chattopadhyay received his bachelor of electronics and teleCommunica-
tion engineering from Jadavpur University, Kolkata, India, in 2000, and after a brief
industrial stint, obtained his degree of master of engineering in embedded systems
design from the University of Lugano, Switzerland, in 2002. He is currently pur-
suing his Ph.D. degree from the Institute for Integrated Signal Processing Systems
(ISS), RWTH Aachen University, Germany. His research interests include automatic
implementation of processors with ,ASIL architecture optimization techniques, and
a toolflow for reconfigurable ASIPs.
Nikil ttuD
University of California, Irvine, ASU
Nikil Dutt is a chancellor's professor of SC and EECS and is with the Center for
Embedded Computer Systems at UC Irvine. He is a fellow of the IEEE and an ACM
distinguished scientist. He has received numerous best paper awards at conferences
and serves on the editorial boards ofACM TODAES (EiC),ACM TECS (AE), and IEEE
ISLV-T (AE). His research interests are in embedded systems design automation,
computer architecture, optimizing compilers, system specification techniques, and
distributed embedded systems.
Daniel Gajski
University of California, Irvine, ASU
Daniel Gajski is the Henry Samueli Endowed Chair in computer system design and
Professor of EECS at UC Irvine. He directs the Center for Embedded Computer
Systems and was instrumental in developing formalisms such as Y-chart numerous
algorithms for high-level synthesis, the definition of CDFG and MSF with data (FSMD),
and system-level languages such as SpecCharts and SpecC. He holds Dipl. Ing. and
M.S. degrees in electrical engineering from the University of Zagreb, Croatia, and
a doctoral degree in computer and information sciences from the University of
Pennsylvania, Philadelphia.
tsiL fo srotubirtnoC xix
Werner strueG
tegraT Compiler seigolonhceT
Werner Geurts is vice president of engineering of Target Compiler Technologies.
Before cofounding Target in 1996, he was a researcher at IMEC, where he has been
working on behavioral synthesis of data-path structures and on retargetable compila-
tion. Werner Geurts has coauthored several papers in electronic design automation.
He received master's degree in electrical engineering from the HogeschoolAntwer-
pen and K.U. Leuven, and a Ph.D. degree from K.U. Leuven, in 1985, 1988, and 1995,
respectively.
Gert snessooG
tegraT Compiler seigolonhceT
Gert Goossens is the CEO and a cofounder of Target Compiler Technologies, a
provider of retargetable tools for the design of application-specific processors.
Before cofounding Target in 1996, Gert Goossens was affiliated with the IMEC
research center, where he headed research groups on behavioral synthesis and soft-
ware compilation. Gert Goossens has authored or coauthored around 40 papers in
electronic design automation. He received a masters and a Ph.D degree in electrical
engineering from K.U. Leuven in 1984 and 1989, respectively.
Bita Gorjiara
University of ,ainrofilaC Irvine, ASU
Bita Gorjiara received her B.S. and M.S. from University of Tehran, and her Ph.D. in
computer science and engineering from University of California, Irvine, in 2007. She
is one of the key developers of NISC Technology, and her Ph.D. thesis focuses on
efficient synthesis of NISC processors. Bita has received HamiAward of Excellence
in Engineering and EECS Best Student Paper Award. Her research interests include
custom processor design, embedded system design, high-level synthesis, and power
optimization.
Frank Hannig
University of ,grebmeruN-negnalrE Germany
Frank Hannig graduated in an interdisciplinary course in SC and EE from Pader-
born University, where he later joined as a Ph.D. student. In 2003, he moved to
the newly founded Department of Hardware/Software Co-Design at the University
of Erlangen-Nuremberg. Here, Frank leads the architecture and compiler design
group. His main research interests are the design of massively parallel architectures
and mapping methodologies for domain-specific computing. Frank is a member of
EEEI and reviewer for multiple journals and conferences including TVLSI, IEEE EEEI
,PST DAC, and .ETAD
xx List of Contributors
urahasaM Imai
Osaka ,ytisrevinU Japan
Dr. Masaharu Imai received his Ph.D. degree in information science from Nagoya
University in 1979. From 1979 through 1996, he has been with the Department of
Information and Computer Sciences,Toyohashi University ofTechnology, Toyohashi,
Japan. From 1996 to till now, he is with Osaka University, Osaka,Japan, where he is a
professor at the Department of Information Systems Engineering, Graduate School
of Information Science and Technology. He is one of the founders and CTO of ASIP
Solutions, Inc.
jrierltsismiDK
University of ,grebmeruN-negnalrE Germany
Dmitrij Kissler received his master of science degree with honors in computer
science from the University of Erlangen-Nuremberg, Germany, in April 2006. Since
May 2006, he is working as a research scientist at the Department of Hardware/
Software Co-Design at the University of Erlangen-Nuremberg. His main research
interests include the design of massively parallel embedded hardware architectures,
architecture/compiler coexploration, and efficient power modeling and estimation
techniques.
ikuY ihsayaboK
Osaka ,ytisrevinU Japan
Yuki Kobayashi received his B.E. and MIST degrees from Osaka University, Japan, in
2003 and 2004, respectively. In 2007, he received his Ph.D. degree in information
science and technology from Osaka University. Since April 2005, he is a research
fellow at JSPS,Japan. He was researching at IMEC vzw, Belgium, for 9 months, from
2004 to 2006. His research interests include processor architecture and compiler
technology. He is a member of .EEEI
Alexey vonayirpuK
University of G,gererbmemruaN-nnegyna lrE
Alexey Kupriyanov received his master's degree in computer engineering from
the Zaporozhye State Engineering Academy, Ukraine, in 2002 (with honors). In
January 2003, he joined the research group of Prof. J/~rgen Teich as a Ph.D.
student in the Department of Hardware/Software Co-Design at the University of
Erlangen-Nuremberg, Germany. His main research interests are the modeling and
efficient simulation of multicore SoC architectures including systematic integration
of application-specific instruction set processors and processor arrays, architecture
description languages, and architecture/compiler codesign.
tsiL srotubirtnoC fo ixx
Dirk Lanneer
Target Compiler Technologies
Dirk Lanneer is the vice president of engineering of Target Compiler Technolo-
gies. Before cofounding Target, an IMEC spin-off, he worked from 1986 to 1996
as a researcher at IMEC, first on the "Cathedral 2nd" behavioural synthesis system,
and later extending techniques from this research to retargetable compilation. Dirk
Lanneer received his master's and Ph.D. degree in electrical engineering from the
Katholieke Universiteit Leuven, Belgium, in 1986 and 1993, respectively.
Rainer Leupers
RWTHAachen University, Germany
Rainer Leupers is a professor of software for systems on silicon at RWTH Aachen
University. His research activities comprise software development tools, processor
architectures, and electronic design automation for embedded systems, with empha-
sis on ASlP and MPSoC design tools. He is a cofounder of ,keTASIL an embedded
processor design tools vendor, acquired by CoWare Inc. in 2003. In 2006, he edited
the Morgan Kaufmann book Customizable Embedded Processors.
Sharad Malik
Princeton University, ASU
Sharad Malik received his B.Tech. degree in electrical engineering from the Indian
Institute of Technology, New Delhi, India in 1985 and M.S. and Ph.D. degrees in
computer science from the University of California, Berkeley, in 1987 and 1990,
respectively. Currently, he is a professor in the Department of Electrical Engineering,
Princeton University. He is a fellow of the IEEE. His research in functional timing
analysis and propositional satisfiability has been widely used in industrial electronic
design automation tools.
Peter Marwedel
Technische Universitg~t Dortmund, Germany
Peter Marwedel was born in Hamburg, Germany. He received his PhD. in physics
from the University of Kiel, Germany, in 1974. From 1974 to 1989, he was a faculty
member of the Institute for Computer Science andApplied Mathematics at the same
university. He has been a professor at the University of Dortmund, Germany, since
1989. He is heading the embedded systems group at the SC department and is
chairing ICD a e.V., local spin-off.
Heinrich Meyr
RWTH Aachen University, Germany
Heinrich Meyr is presently a professor of electrical engineering at RWTH Aachen
University, Germany, and chief scientific officer of CoWare Inc., San Jose. He pursues
iixx tsiL srotubirtno Cfo
a dual career as a researcher and an entrepreneur with over 30 years of professional
experience. He is a fellow of IEEE and has received several best paper and profes-
sional awards. His present research activities include cross-disciplinary analysis and
design of complex signal processing systems for communication applications.
Prabhat Mishra
University of Florida, ASU
Prabhat Mishra is an assistant professor in the Department of Computer and Infor-
mation Science and Engineering at University of Florida. He has a B.E. fromJadavpur
University, M.Tech. from Indian Institute ofTechnology, Kharagpur, and Ph.D. from
University of California, Irvine -- all in computer science. He has published one
book and many conference and journal articles. He has received several reearch
and teaching awards including the NSF CAREER Award, CODES+ISSS Best Paper
Award, EDAA Outstanding DissertationAward, and International Educator of theYear
Award. His research interests include functional verification and design automation
of embedded systems.
Soner rednO==
Michigan University, Technological ASU
Dr. Soner Onder is an associate professor of computer science at Michigan Techno-
logical University. He got his Ph.D. in computer science in 1999 from the University
of Pittsburgh. His main interests are microarchitecture techniques for instruction-
level parallelism, compiler-hardware cooperation, and architecture description
languages. His research has been supported by APRAD and NSE and he is a recipient
of National Science Foundation CAREER award (2004). Dr. Onder is a member of
IEEE and .MCA
naV nahoJ Praet
tegraT Compiler seigolonhceT
JohanVan Praet is the vice president of engineering ofTarget CompilerTechnologies.
Before cofounding Target in 1996, he worked out a processor modelling method-
ology for retargetable compilation and processor design at IMEC. He holds several
patents for this research, and his Ph.D. thesis on this topic was awarded the MBI
Belgium prize for computer science 1998. Johan Van Praet earned his master's and
Ph.D. degree in electrical engineering from the K.U. Leuven in 1990 and 1997,
respectively.
Subramanian Rajagopalan
Synopsys
Subramanian Rajagopalan received his B.Tech. in electrical engineering from Indian
Institute of Technology, Madras, India, in 1998, and the M.A. and Ph.D. in electrical
engineering from Princeton University, Princeton, in 2001 and 2004, respectively.
tsiL fo srotubirtnoC iiixx
Since 2004, he has been with the Advanced Technology Group at Synopsys, India.
His research interests include system-level design, parasitics extraction, low-power
design, and analog/RF design automation.
Mehrdad Reshadi
University of California, Irvine, ASU
Mehrdad Reshadi received his B.S. (Hons.) degree in computer engineering from
Sharif University of Technology, Iran, in 1997, the M.S. degree in computer engi-
neering from University ofTehran, Iran, in 2000, and Ph.D in computer science from
University of California, Irvine, in 2007. His research interests include embedded sys-
tem design automation, microprocessor modeling, and simulation, design synthesis,
and specification-based compilation and simulation. He received the best paper
award at International Conference on Hardware/Software Codesign and System
Synthesis (CODES+ISSS) in 2003.
Sandro ogiR
University of Campinas, Brazil
Sandro Rigo received his Ph.D. in computer science from University of Campinas
0JNICAMP), Brazil, in 2004. He currently works as a professor in the Institute
of Computing at UNICAMP. Rigo was a corecepient a best paper award at -CABS
PAD'04 for his work on the ArchC ADL. He has conducted researches on garbage
collection, code optimization,ADLs, and system-level design, mainly using SystemC.
His current research interests focus on code optimization for parallel and multi-
core architectures, LSE simulation and verification methodologies, and transactional
memories.
uhsnamiH Sanghavi
Tensilica
Himanshu Sanghavi is the director of engineering at Tensilica, working on config-
urable microprocessor cores and tools for microprocessor design. Prior to Tensilica,
he worked at Mediamatics (a division of National Semiconductor) on digital audio
and video products, and at Intel on microprocessor, graphics, and video products. He
holds an SM in electrical and computer engineering from The University of Texas
at Austin, and a B.Tech. in electrical engineering from IIT Bombay, India.
Aviral Shrivastava
Arizona State University, ASU
Aviral Shrivastava is an assistant professor in the Department of Computer Sci-
ence and Engineering at the Arizona State University, where he has established
and heads the Compiler and Microarchitecture Labs (CML). He received his Ph.D.
and master's in information and computer science from University of California,
Irvine. He recieved his bachelor degree in computer science and engineering
vixx tsiL fo srotubirtnoC
from Indian Institute of Technology, Delhi. His research interests are intersection of
compilers and computer architecture, with a particular interest in embedded sys-
tems. Dr. Shrivastava is a lifetime member of ACM, and serves on organizing and
program committees of several premier embedded system conferences, including
CODES+ISSS, ISLPED, ,SESAC and .SETCL
Yoshinori Takeuchi
Osaka University, Japan
Yoshinori Takeuchi received his B.E., M.E., and .rD of Eng. degrees from Tokyo
Institute of Technology in 1987, 1989, and 1992, respectively. From 1992 through
1996, he was a research associate with Department of Engineering,Tokyo University
of Agriculture and Technology. From 1996, he has been with the Osaka University.
He was a visiting professor at the University of California, Irvine, from 2006 to 2007.
He is currently an associate professor of Graduate School of Information Science and
Technology at Osaka University. His research interests include system-level design,
VLSI design, and VLSI CAD. He is a member of IEICE of Japan, IPSJ,ACM, ,PS CAS, and
CSS Society of .EEEI
Jiirgen Teich
University of Erlangen-Nuremberg, Germany
Jiirgen Teich is an appointed full professor in the Department of Computer Sci-
ence of the Friedrich-Mexander University Erlangen-Nuremberg, holding a chair in
hardware/software co-design since 2003. Dr. Teich has been a member of multi-
ple program committees of international conferences and workshops and program
chair for CODES+ISSS 2007. He is a senior member of the IEEE. Since 2004, he acts
also as a reviewer for the German Science Foundation (DFG) for the area of com-
puter architecture and embedded systems. Prof. Teich is supervising more than 20
Ph.D. students currently.
Wei niQ
Boston University, ASU
Wei Qin received his B.S. and M.S. degrees in electronics engineering from
Fudan University in China, and his Ph.D. in electrical engineering from Princeton
University. Since 2004, he has been an assistant professor at the ECE Department
of Boston University. His research interests include modeling, synthesis, and ver-
ification of programmable processors; tools, methodologies, and architectures
for heterogeneous multiprocessor embedded systems; and design languages for
electronic systems. His research is supported by Intel and Freescale Semiconductors.
ecaferP
Today, computing devices are seamlessly weaved into the fabric of our everyday
lives. We encounter two types of such computing devices: desktop-based comput-
ing devices and embedded computer systems. Desktop-based computing systems
encompass traditional computers,including personal computers,notebook comput-
ers, workstations, and servers. Embedded computer systems are ubiquitous--they
run the computing devices hidden inside a vast array of everyday products and appli-
ances such as cell phones, toys, handheld PDAs, cameras, and microwave ovens. Cars
are full of them, as are airplanes, satellites, and advanced military and medical equip-
ments. As applications grow increasingly complex, so do the complexities of the
embedded computing devices. Both types of computing devices use programmable
components such as processors, coprocessors,and memories to execute the applica-
tion programs. The complexity of these components is increasing at an exponential
rate due to technological advances, as well as due to demand for realization of ever
more complex applications in communication, multimedia, networking, and enter-
tainment. Shrinking time-to-market coupled with short product lifetimes creates
a critical need for design automation of increasingly sophisticated and complex
programmable components.
Architecture Description Languages (ADLs), also known as processor description
languages, have been successfully used in industry as well as in academic research
for design and verification of application-specific instruction-set processors (ASIP).
ADLs allow precise modeling and specification of processors. The ADL specifica-
tion can be used to enable various design automation tasks including exploration,
simulation, compilation, synthesis, test generation, and validation of architectures.
Each automation task creates unique opportunities. For example, the exploration
task is used to figure out the best possible processor architecture for the given set
of application programs under various design constraints such as area, power, and
performance. Manual or semi-automatic approaches are time consuming and error
prone. In many realistic scenarios, it is not possible to explore all feasible design
alternatives using manual or semi-automatic approaches. ADL-based specification
and design automation reduces overall design and verification effort, and thereby
enables generation of low-cost, efficient, and reliable systems.
This book presents a comprehensive understanding of ADLs and ADL-driven
design automation methodologies. There has been a plethora of research in this
area in the last 15 years. Unfortunately, there is no comprehensive text available to
help designers and researchers efficiently integrate ADLodriven design automation
steps into their current methodologies. For example, some of the ADLs were devel-
oped 10-15 years ago. They have gone through various transformations to suit the
needs of contemporary design processes, as well as of the processors themselves.
Mthough each ADL or its modification has appeared as a conference or journal
paper, the modified form of the complete ADL or the up-to-date methodologies
are not accessible in a comprehensive and unified format. The reader of this book
V~,X