Power Efficient Digital Decimation Filters for Sigma-Delta ADCs

100 Pages·2009·0.78 MB·English

Institutionen för systemteknik
Department of Electrical Engineering
Master’s Thesis
Power Efficient Digital Decimation Filters for
Σ∆
-ADCs
Master’s Thesis conducted in Electronic Devices at
The Institute of Technology, Linköping University
by
Love Cederström
LiTH-ISY-EX--09/4279--SE
Linköping 2009
Department of Electrical Engineering Linköpings tekniska högskola
Linköpings universitet Linköpings universitet
SE-581 83 Linköping, Sweden 581 83 Linköping

Power Efficient Digital Decimation Filters for
Σ∆
-ADCs
Master’s Thesis conducted in Electronic Devices at
The Institute of Technology, Linköping University
by
Love Cederström
LiTH-ISY-EX--09/4279--SE
Supervisor: Atila Alvandpour
isy, Linköping University
Co-Supervisor: Ali Fazli Yeknami
isy, Linköping University
Examinator: Atila Alvandpour
isy, Linköping University
Linköping, 12 June, 2009

Avdelning, Institution Datum
Division,Department Date
DivisionofElectronicDevices
DepartmentofElectricalEngineering
2009-06-12
Linköpingsuniversitet
SE-58183Linköping,Sweden
Språk Rapporttyp ISBN
Language Reportcategory
—
(cid:3)Svenska/Swedish (cid:3)Licentiatavhandling ISRN
⊠(cid:3)Engelska/English (cid:3)⊠Examensarbete LiTH-ISY-EX--09/4279--SE
(cid:3)C-uppsats
Serietitel och serienummer ISSN
(cid:3)D-uppsats Titleofseries,numbering
—
(cid:3) (cid:3)Övrigrapport
(cid:3)
URL för elektronisk version
http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-51464
Titel EffektsnåladigitaladecimeringsfilterförΣ∆-ADC:er
Title PowerEfficientDigitalDecimationFiltersforΣ∆-ADCs
Författare LoveCederström
Author
Sammanfattning
Abstract
The development of integrated circuit technology seen in the last decades has
enabled a large variety of battery operated equipment to emerge, such as small
sensors and medical implants. These applications often has low requirementson
sampling frequency but require a very low power consumption to achieve a long
batterylife.
This thesis investigates one aspect of implementing a low power and low fre-
quencyanalogtodigitalconverter(ADC)usingatechniquecalledΣ∆-modulation.
TheΣ∆-ADC usesfew analog componentsbut insteadit requiresa digital filter
to extract the wanted resolution. It is this filter which is under investigation in
thiswork.
To investigate the power consumption under the presumption that the filter
would be a custom circuit implemented on-chip, a simplistic approach has been
taken. Based on a high-level algorithmic investigation and the fact that it is
popularlyusedtogetherwithΣ∆-modulatorstheCascadedIntegratorComb(CIC)
filterwaschosenforimplementation.
TheCIC-filterusesonlyaddersanddelayelementswhichisagreatadvantage
when aiming at a low power consumption. The drawback is that this filter has
a poor passband which can introduce distortion within the signal band. Using
the Spectre simulator provided in the Cadence Virtuoso suite the lowest power
consumption achieved was 16 nW, extracting 80 % of the theoretically available
resolution.
Nyckelord
Keywords DecimationFilter,Sigma-Delta,Low-Power,Low-Frequency,CIC

Abstract
The development of integrated circuit technology seen in the last decades has
enabled a large variety of battery operated equipment to emerge, such as small
sensors and medical implants. These applications often has low requirements on
sampling frequency but require a very low power consumption to achieve a long
battery life.
This thesis investigates one aspect of implementing a low power and low fre-
quencyanalogtodigitalconverter(ADC)usingatechniquecalledΣ∆-modulation.
The Σ∆-ADC uses few analog components but instead it requires a digital filter
to extract the wanted resolution. It is this filter which is under investigation in
this work.
To investigate the power consumption under the presumption that the filter
would be a custom circuit implemented on-chip, a simplistic approach has been
taken. Based on a high-level algorithmic investigation and the fact that it is
popularlyusedtogetherwithΣ∆-modulatorstheCascadedIntegratorComb(CIC)
filter was chosen for implementation.
The CIC-filter uses only adders and delay elements which is a great advantage
when aiming at a low power consumption. The drawback is that this filter has
a poor passband which can introduce distortion within the signal band. Using
the Spectre simulator provided in the Cadence Virtuoso suite the lowest power
consumption achieved was 16 nW, extracting 80 % of the theoretically available
resolution.
v

Acknowledgments
I would like to thank Professor Atila Alvandpour for the opportunity to do my
thesis at the Division of Electronic Devices. Further I would like to thank Ali
Fazli Yeknami for all the technical discussions, and not to mention the other PhD
students at the division.
My thoughts also go to my office mates, Fahad and Saeed, thanks for being
there for bouncing ideas, about everything between heaven and earth.
I would also like to thank the annoying people who dragged me away on too
long coffee breaks, you know who you are. Last, but not least, I thank my family
for all the support through the years.
vii