or 2.7-GSPS ADCs With Integrated DDC datasheet

100 Pages·2017·2.45 MB·English

Product Order Technical Tools & Support &
Folder Now Documents Software Community
ADC12J1600,ADC12J2700
SLAS969D–JANUARY2014–REVISEDOCTOBER2017
ADC12Jxx00 12-Bit 1.6- or 2.7-GSPS ADCs With Integrated DDC
1 Features 2 Applications
• ExcellentNoiseandLinearityuptoandbeyond • WirelessInfrastructure
1
FIN =3GHz • RF-SamplingSoftwareDefinedRadio
• ConfigurableDDC • WidebandMicrowaveBackhaul
• DecimationFactorsfrom4to32(Complex • MilitaryCommunications
BasebandOut)
• SIGINT
• BypassModeforFullNyquistOutputBandwidth
• RADARandLIDAR
• UsableOutputBandwidthof540MHzat
• DOCSIS/CableInfrastructure
4xDecimationand2700MSPS
• TestandMeasurement
• UsableOutputBandwidthof320MHzat
4xDecimationand1600MSPS 3 Description
• UsableOutputBandwidthof67.5MHzat
The ADC12J1600 and ADC12J2700 devices are
32xDecimationand2700MSPS wideband sampling and digital tuning devices. Texas
• UsableOutputBandwidthof40MHzat Instruments' giga-sample analog-to-digital converter
32xDecimationand1600MSPS (ADC) technology enables a large block of frequency
spectrum to be sampled directly at RF. An integrated
• LowPin-CountJESD204BSubclass1Interface
DDC(DigitalDownConverter) providesdigitalfiltering
• AutomaticallyOptimizedOutputLaneCount and down-conversion. The selected frequency block
• EmbeddedLowLatencySignalRangeIndication is made available on a JESD204B serial interface.
Data is output as baseband 15-bit complex
• LowPowerConsumption
information for ease of downstream processing.
• KeySpecifications:
Based on the digital down-converter (DDC)
– MaxSamplingRate:1600or2700MSPS decimation and link output rate settings, this data is
– MinSamplingRate:1000MSPS outputon1to5lanesoftheserialinterface.
– DDCOutputWordSize:15-BitComplex(30 A DDC bypass mode allows the full rate 12-bit raw
bitstotal) ADC data to also be output. This mode of operation
requires8lanesofserialoutput.
– BypassOutputWordSize:12-BitOffsetBinary
– NoiseFloor:–147.3dBFS/Hz(ADC12J2700) The ADC12J1600 and ADC12J2700 devices are
available in a 68-pin VQFN package. The device
– NoiseFloor:–145dBFS/Hz(ADC12J1600)
operates over the Industrial (–40°C ≤ T ≤ 85°C)
A
– IMD3: −64dBc(FIN =2140MHz ±30MHzat ambienttemperaturerange.
−13dBFS)
– FPBW(–3dB):3.2GHz DeviceInformation(1)
– PeakNPR:46dB PARTNUMBER PACKAGE BODYSIZE(NOM)
ADC12J1600 VQFN(68) 10.00mm×10.00mm
– SupplyVoltages:1.9Vand1.2V
ADC12J2700 VQFN(68) 10.00mm×10.00mm
– PowerConsumption
(1) For all available packages, see the orderable addendum at
– Bypass(2700MSPS):1.8W
theendofthedatasheet.
– Bypass(1600MSPS):1.6W
– PowerDownMode: <50mW Bypass—SpectralResponse
ƒ =2.7GHz,F =1897MHzat–1dBFS
S IN
0
-20
Amplitude (dBFS) --6400
-80
-100
0 225 450 675 900 1125 1350
Frequency (MHz)
1 C001
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.
ADC12J1600,ADC12J2700
SLAS969D–JANUARY2014–REVISEDOCTOBER2017 www.ti.com
Table of Contents
1 Features.................................................................. 1 7.6 RegisterMap...........................................................57
2 Applications........................................................... 1 8 ApplicationandImplementation........................ 82
3 Description............................................................. 1 8.1 ApplicationInformation............................................82
4 RevisionHistory..................................................... 2 8.2 TypicalApplication .................................................82
8.3 InitializationSet-Up.................................................86
5 PinConfigurationandFunctions......................... 3
8.4 DosandDon'ts........................................................86
6 Specifications......................................................... 8
9 PowerSupplyRecommendations...................... 87
6.1 AbsoluteMaximumRatings......................................8
9.1 SupplyVoltage........................................................87
6.2 ESDRatings..............................................................8
10 Layout................................................................... 87
6.3 RecommendedOperatingConditions.......................9
6.4 ThermalInformation..................................................9 10.1 LayoutGuidelines.................................................87
6.5 ElectricalCharacteristics...........................................9 10.2 LayoutExample....................................................88
6.6 TimingRequirements..............................................16 10.3 ThermalManagement...........................................90
6.7 InternalCharacteristics...........................................18 11 DeviceandDocumentationSupport................. 90
6.8 SwitchingCharacteristics........................................19 11.1 DeviceSupport......................................................90
6.9 TypicalCharacteristics............................................20 11.2 DocumentationSupport........................................92
7 DetailedDescription............................................ 30 11.3 RelatedLinks........................................................92
7.1 Overview.................................................................30 11.4 CommunityResource............................................92
7.2 FunctionalBlockDiagram.......................................30 11.5 Trademarks...........................................................92
7.3 FeatureDescription.................................................31 11.6 ElectrostaticDischargeCaution............................92
7.4 DeviceFunctionalModes........................................49 11.7 Glossary................................................................92
7.5 Programming...........................................................55 12 Mechanical,Packaging,andOrderable
Information........................................................... 92
4 Revision History
ChangesfromRevisionC(July2015)toRevisionD Page
• Changedresetvalueofaddress0x006from0x03to0x13inMemoryMaptable............................................................... 57
• Changedresetvalueofaddress0x006from0x03to0x13inStandardSPI-3.0Registerstable........................................ 60
• Changed0x03to0x13inresetvalueanddescriptionofbits7-0andchanged00000011to00010011inChip
VersionRegistersection....................................................................................................................................................... 61
ChangesfromRevisionB(September2014)toRevisionC Page
• AddedadditionalvoltagedifferenceparameterstotheAbsoluteMaximumRatingstable.................................................... 8
• AddedjunctiontemperaturetotheAbsoluteMaximumRatingstable................................................................................... 8
• AddedcommonmodevoltageparametertotheRecommendedOperatingConditionstable.ChangedCLKto
SYSREF,and~SYNC ........................................................................................................................................................... 9
• Changedsomeofthemaximuminterleavingoffsetvaluesforbothdevicestotightenthelevels ...................................... 10
• DeletedtheDifferentialAnalogInputConnectionimageinTheAnalogInputssection ...................................................... 31
• AddednoteaboutoffsetadjustinBackgroundCalibrationModetotheOffsetAdjustsectionandI/Ooffsetregister
tables.................................................................................................................................................................................... 35
• AddedtheCalibrationCycleTimingforDifferentCalibrationModesandOptionstableintheTimingCalibration
Modesection........................................................................................................................................................................ 50
• Changed0x004-0x005toRESERVEDintheStandardSPI-3.0Registerssummarytable................................................. 60
ChangesfromRevisionA(February2014)toRevisionB Page
• ChangedthedevicestatusfromProductPreviewtoProductionData.................................................................................. 1
2 SubmitDocumentationFeedback Copyright©2014–2017,TexasInstrumentsIncorporated
ProductFolderLinks:ADC12J1600 ADC12J2700
ADC12J1600,ADC12J2700
www.ti.com SLAS969D–JANUARY2014–REVISEDOCTOBER2017
5 Pin Configuration and Functions
NKEPackage
68-PinVQFNWithThermalPad
TopView
O_2b O_2a
BG NC SV A12 diode+ –diode A19 SV2 A19 CSb CLK DI DO D12 S7+/NC S7-/NC D12
V D R V T T V R V S S S S V D D V
8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2
6 6 6 6 6 6 6 6 6 5 5 5 5 5 5 5 5
RBIAS+ 1 51 DS6+/NCO_1b
RBIAS– 2 50 DS6–/NCO_1a
VCMO 3 49 VD12
VA19 4 48 DS5+/NCO_0b
VNEG 5 47 DS5–/NCO_0a
VA12 6 46 VD12
VA19 7 45 DS4+
VIN+ 8 44 DS4–
VIN– 9 43 VD12
VA19 10 42 DS3+
VA12 11 41 DS3–
VNEG 12 40 VD12
VA19 13 39 DS2+
VA12 14 38 DS2–
DEVCLK+ 15 37 VD12
DEVCLK– 16 36 DS1+
VA12 17 35 DS1–
8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4
1 1 2 2 2 2 2 2 2 2 2 2 3 3 3 3 3
2 + – 2 + – 9 0 1 9 2 T ~ 2 – + 2
1 F F 1 T T 1 T T 1 1 U C 1 0 0 1
A E E A S S A _ _ A D O N D S S D
V SR SR V TM TM V OR OR V V G_ SY V D D V
SY SY ~+/ –~/ NE
C C V
N N
Y Y
S S
DNC=Makenoexternalconnection
Copyright©2014–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3
ProductFolderLinks:ADC12J1600 ADC12J2700
ADC12J1600,ADC12J2700
SLAS969D–JANUARY2014–REVISEDOCTOBER2017 www.ti.com
PinFunctions
PIN
EQUIVALENTCIRCUIT TYPE DESCRIPTION
NAME NO.
ANALOG
RBIAS+ 1 VA19
ExternalBiasResistorConnections
Externalbiasresistorterminals.A3.3kΩ(±0.1%)resistorshouldbeconnected
VBIAS I/O betweenRBIAS+andRBIAS–.TheRBIASresistorisusedasareferencefor
RBIAS– 2 internalcircuitswhichaffectthelinearityoftheconverter.Thevalueandprecision
ofthisresistorshouldnotbecompromised.Thesepinsmustbeisolatedfromall
othersignalsandgrounds.
GND
TDIODE– 63 Tdiode+
TemperatureDiode
Thesepinsarethepositive(anode)andnegative(cathode)diodeconnectionsfor
TDIODE+ 64 Tdiode– Passive dietemperaturemeasurements.Leavethesepinsunconnectediftheyarenot
used.SeetheBuilt-InTemperatureMonitorDiodesectionformoredetails.
VA19 BandgapOutputVoltage
Thispiniscapableofsourcingorsinking100μAandcandrivealoadupto80pF.
VBG 68 O
Leavethispinunconnectedifitisnotusedintheapplication.SeetheThe
ReferenceVoltagesectionformoredetails.
VCM CommonModeVoltage
Thevoltageoutputatthispinmustbethecommon-modeinputvoltageattheVIN+
VCMO 3 O andVIN–pinswhenDCcouplingisused.Thispiniscapableofsourcingorsinking
100μAandcandrivealoadupto80pF.Leavethispinunconnectedifitisnot
usedintheapplication.
GND
VIN+ 8 VA19
VIN+ To T&H+
LPEAK
GND
50 (cid:159) 20 k(cid:159) SThigendailffIenrpeunttialfull-scaleinputrangeisdeterminedbythefull-scalevoltageadjust
VCM I
VIN– 9 50 (cid:159) register.Aninternalpeakinginductor(LPEAK)of5nHisincludedforparasitic
compensation.
VA19
LPEAK
VIN– To T&H–
GND
4 SubmitDocumentationFeedback Copyright©2014–2017,TexasInstrumentsIncorporated
ProductFolderLinks:ADC12J1600 ADC12J2700
ADC12J1600,ADC12J2700
www.ti.com SLAS969D–JANUARY2014–REVISEDOCTOBER2017
PinFunctions (continued)
PIN
EQUIVALENTCIRCUIT TYPE DESCRIPTION
NAME NO.
DATA
DS0– 32
VD12 VA19
DS0+ 33
DS1– 35
DS1+ 36 50 (cid:13) +
Data
DS2– 38 CMLThesepinsarethehigh-speedserialized-dataoutputswithuser-configurable
O
DS2+ 39 50 (cid:13) – pre-emphasis.Theseoutputsmustalwaysbeterminatedwitha100-Ωdifferential
resistoratthereceiver.
DS3– 41
DS3+ 42
GND
DS4– 44
DS4+ 45
DS5–/NCO_0 47
DS5+/NCO_0 48 VA19 Data
DS6−/NCO_1 50 VD12 DS5–/NCO_0, DS5+/NCO_0, DS6–/NCO_1, DS6+/NCO_1,
DS7–/NCO_2 and DS7+/NCO_2: When decimation is enabled, these
DS6+/NCO_1 51
50 (cid:13) + pins become LVCMOS inputs and allow the host device to select the
DS7−/NCO_2 53 O/I specificNCOfrequencyorphaseaccumulatorthatisactive.Inthismode
50 (cid:13) – thepositive(+)andnegative(–)pinsshouldbeconnectedtogetherand
OE bothdriven.Anacceptablealternativeistoletoneofthepairfloatwhile
DS7+/NCO_2 54 theotherpinisdriven.ConnecttheseinputstoGNDiftheyarenotused
intheapplication.
GND
GROUND,RESERVED,DNC
DoNotConnect
DNC 67 —
DonotconnectDNCtoanycircuitry,power,orgroundsignals.
VA19 Reserved
ConnecttoGroundorLeaveUnconnected:Thisreservedpinisalogicinputfor
RSV 66 —
possiblefuturedeviceversions.Itisrecommendedtoconnectthispintoground.
Floatingthispinisalsopermissible.
Reserved
RSV2 61 —
ConnecttoGroundConnectthisreservedinputpintogroundforproperoperation.
GND
Ground(GND)
Theexposedpadonthebottomofthepackageisthegroundreturnforallsupplies.
Thispadmustbeconnectedwithmultipleviastotheprintedcircuitboard(PCB)
ThermalPad —
groundplanestoensureproperelectricalandthermalperformance.
Theexposedcenterpadonthebottomofthepackagemustbethermallyand
electricallyconnected(soldered)toagroundplanetoensureratedperformance.
LVCMOS
OR_T0 25 VA19
Over-Range
O Over-rangedetectionstatusforT0andT1thresholds.Leavethesepins
OR_T1 26 unconnectediftheyarenotusedintheapplication.
GND
Copyright©2014–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5
ProductFolderLinks:ADC12J1600 ADC12J2700
ADC12J1600,ADC12J2700
SLAS969D–JANUARY2014–REVISEDOCTOBER2017 www.ti.com
PinFunctions (continued)
PIN
EQUIVALENTCIRCUIT TYPE DESCRIPTION
NAME NO.
SerialInterfaceClock
Thispinfunctionsastheserial-interfaceclockinputwhichclockstheserialdatain
SCLK 58 I
VA19 andout.TheUsingtheSerialInterfacesectiondescribestheserialinterfacein
moredetail.
SerialDataIn
SDI 57 I Thispinfunctionsastheserial-interfacedatainput.TheUsingtheSerialInterface
sectiondescribestheserialinterfaceinmoredetail.
SYNC~
ThispinprovidestheJESD204B-requiredsynchronizingrequestinput.Alogic-low
SYNC~ 30 I appliedtothisinputinitiatesalanealignmentsequence.ThechoiceofLVCMOSor
differentialSYNC~isselectedthroughbit6oftheconfigurationregister0x202h.
ConnectthisinputtoGNDorVA19ifdifferentialSYNC~inputisused.
GND
SerialChipSelect(activelow)
SCS 59 I Thispinfunctionsastheserial-interfacechipselect.TheUsingtheSerialInterface
sectiondescribestheserialinterfaceinmoredetail.
VA19
SerialDataOut
SDO 56 O Thispinfunctionsastheserial-interfacedataoutput.TheUsingtheSerialInterface
sectiondescribestheserialinterfaceinmoredetail.
GND
DIFFERENTIALINPUT
DEVCLK+ 15 DeviceClockInput
I ThedifferentialdeviceclocksignalmustbeACcoupledtothesepins.Theinput
DEVCLK– 16 signalissampledontherisingedgeofCLK.
VA19
SYSREF+ 19 SYSREF
Thedifferentialperiodicwaveformonthesepinssynchronizesthedeviceper
I JESD204B.IfJESD204Bsubclass1synchronizationisnotrequiredandthese
SYSREF– 20 inputsarenotutilizedtheymaybeleftunconnected.Inthatcaseensure
50 (cid:13) SysRef_Rcvr_En=0andSysRef_Pr_En=0.
AGND 1 k(cid:13)
SYNC~+/TMST+ 22 V(CM_CLK) SYNC~/TMST
VA19 ThisdifferentialinputprovidestheJESD204B-requiredsynchronizingrequestinput.
50 (cid:13) Adifferentiallogic-lowappliedtotheseinputsinitiatesalanealignmentsequence.
FordifferentialSYNC~usage,ensurethatSYNC_DIFF_PD=0and
SYNC_DIFFSEL=1.
I WhentheLVCMOSSYNC~isselectedtheseinputscanbeusedasthedifferential
SYNC~-/TMST– 23 TIMESTAMPinput.ForTMSTusage,ensurethatSYNC_DIFF_PD=0,
AGND SYNC_DIFFSEL=0,andTIME_STAMP_EN=1.Foradditionalinformationsee
theTimeStampsection.
TheseinputsmaybeleftunconnectediftheyarenotusedforeithertheSYNC~or
TIMESTAMPfunctions.
6 SubmitDocumentationFeedback Copyright©2014–2017,TexasInstrumentsIncorporated
ProductFolderLinks:ADC12J1600 ADC12J2700
ADC12J1600,ADC12J2700
www.ti.com SLAS969D–JANUARY2014–REVISEDOCTOBER2017
PinFunctions (continued)
PIN
EQUIVALENTCIRCUIT TYPE DESCRIPTION
NAME NO.
POWER
6
11
14
Analog1.2Vpowersupplypins
VA12 17 — Bypassthesepinstogroundusingone10-µFcapacitorandtwo1-µFcapacitorsfor
bulkdecouplingplusone0.1-µFcapacitorperpinforindividualdecoupling.
18
21
65
4
7
10
13 Analog1.9Vpowersupplypins
VA19 — Bypassthesepinstogroundusingone10-µFcapacitorandtwo1-µFcapacitorsfor
24 bulkdecouplingplusone0.1-µFcapacitorperpinforindividualdecoupling.
27
60
62
28
31
34
37
40 Digital1.2Vpowersupplypins
VD12 — Bypassthesepinstogroundusingone10-µFcapacitorandtwo1-µFcapacitorsfor
43 bulkdecouplingplusone0.1-µFcapacitorperpinforindividualdecoupling.
46
49
52
55
5 VNEG
Thesepinsmustbedecoupledtogroundwitha0.1-µFceramiccapacitornear
VNEG I eachpin.ThesepowerinputpinsmustbeconnectedtotheVNEG_OUTpinwitha
12 lowresistancepath.Theconnectionsmustbeisolatedfromanynoisydigital
signalsandmustalsobeisolatedfromtheanaloginputandclockinputpins.
VNEG_OUT
Thevoltageonthisoutputcanrangefrom–1Vto+1V.Thispinmustbedecoupled
VNEG_OUT 29 O togroundwitha4.7-µF,lowESL,lowESRmulti-layerceramicchipcapacitorand
connectedtotheVNEGinputpins.Thisvoltagemustbeisolatedfromanynoisy
digitalsignals,clocks,andtheanaloginput.
Copyright©2014–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7
ProductFolderLinks:ADC12J1600 ADC12J2700
ADC12J1600,ADC12J2700
SLAS969D–JANUARY2014–REVISEDOCTOBER2017 www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
ThesolderingprocessmustcomplywithTI'sReflowTemperatureProfilespecifications.Refertowww.ti.com/packaging.(1)(2)(3)
MIN MAX UNIT
1.2-Vsupply VA12,VD12 1.4
V
Supplyvoltage 1.9-Vsupply VA19 2.2
1.2-VsupplydifferencebetweenVA12andVD12 –200 200 mV
V +
Onanyinputpin(exceptVIN+orVIN–) –0.15 (VA19)
Voltage 0.15 V
OnVIN+orVIN– 0 2
|(VIN+)–(VIN–)|(4) 2
|(DEVCLK+)–(DEVCLK–)| 2
Voltagedifference V
|(SYSREF+)–(SYSREF–)| 2
|(~SYNC+)–(~SYNC–)| 1
OnVIN+,VIN–,withproperinputcommonmodemaintained.F ≥3GHz,
IN 11.07
Z =100Ω,Input_Clamp_EN=0or1
(SOURCE)
OnVIN+,VIN–,withproperinputcommonmodemaintained.F =1GHz,
RFinputpower,P IN 14.95 dBm
I Z =100Ω,Input_Clamp_EN=1
(SOURCE)
OnVIN+,VIN–,withproperinputcommonmodemaintained.F ≤100MHz,
IN 20.97
Z =100Ω,Input_Clamp_EN=1
(SOURCE)
AtanypinotherthanVIN+orVIN–(5) –25 25 mA
VIN+orVIN– –50 50 mADC
Inputcurrent
Package(5)(sumofabsolutevalueofallcurrentsforcedinorout,notincluding
100 mA
powersupplycurrent)
Junction Powerapplied.VerifiedbyHighTemperatureOperationLifetestingto1000
–40 150 °C
temperature,T hours.
J
Storagetemperature,T –65 150 °C
stg
(1) Reflowtemperatureprofilesaredifferentforlead-freeandnon-lead-freepackages.
(2) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings
only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperating
Conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.
(3) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexasInstrumentsSalesOffice/Distributorsforavailabilityand
specifications.
(4) Theanaloginputsareprotectedasinthefollowingcircuit.Input-voltagemagnitudesbeyondtheAbsoluteMaximumRatingsmay
damagethisdevice.
VA19
To Internal
I/O
Circuitry
GND
(5) Whentheinputvoltageatanypin(otherthanVIN+orVIN–)exceedsthepowersupplylimits(thatis,lessthanGNDorgreaterthan
VA19),thecurrentatthatpinmustbelimitedto25mA.The100-mAmaximumpackageinputcurrentratinglimitsthenumberofpins
thatcansafelyexceedthepowersupplies.Thislimitisnotplaceduponthepowerpinsorthermalpad(GND).
6.2 ESD Ratings
VALUE UNIT
Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001,allpins(1) ±2000
V(ESD) Electrostaticdischarge Chargeddevicemodel(CDM),perJEDECspecificationJESD22-C101,all V
pins(2) ±500
(1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess.
(2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess.
8 SubmitDocumentationFeedback Copyright©2014–2017,TexasInstrumentsIncorporated
ProductFolderLinks:ADC12J1600 ADC12J2700
ADC12J1600,ADC12J2700
www.ti.com SLAS969D–JANUARY2014–REVISEDOCTOBER2017
6.3 Recommended Operating Conditions
AllvoltagesaremeasuredwithrespecttoGND=0V,unlessotherwisespecified.
MIN MAX UNIT
1.2-Vsupply:VA12,VD12 1.14 1.26
V Supplyvoltage V
DD
1.9-Vsupply:VA19 1.8 2
1.9supply≥1.2
Supplysequence(power-upandpower-down) V
supply
V Analoginputcommonmodevoltage V –0.15 V +0.15 V
CMI (VCMO) (VCMO)
VIN+,VIN–voltage(maintainingcommonmode) 0 V V
(VA19)
DEVCLK±,SYSREF±,~SYNC±pinvoltagerange 0 V V
(VA19)
V DifferentialDEVCLK±,SYSREF±,~SYNC±amplitude 0.4 2 V
ID(CLK) PP
V SYSREF±,~SYNC±CommonMode 0.64 1.1 V
CM(CLK)
T Ambienttemperature –40 85 °C
A
T Junctiontemperature 135 °C
J
6.4 Thermal Information
ADC12J1x00
THERMALMETRIC(1) NKE(VQFN) UNIT
68PINS
R Thermalresistance,junction-to-ambient 19.8 °C/W
θJA
R Thermalresistance,junction-to-case(bottom) 2.7 °C/W
θJCbot
ψ Characterizationparameter,junction-to-board 9.1 °C/W
JB
(1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication
report.
6.5 Electrical Characteristics
Unlessotherwisenoted,thesespecificationsapplyforV =V =1.2V,V =1.9V,VINfullscalerangeatdefault
(VA12) (VD12) (VA19)
setting(725mV ),VIN=–1dBFS,differentialAC-coupledsinewaveinputclock,ƒ =2.7or1.6GHzat0.5V with
PP (DEVCLK) PP
50%dutycycle,R =3.3kΩ±0.1%,afteraforeground(FG)modecalibrationwithtimingcalibrationenabled.Typical
(RBIAS)
valuesareatT =25°C.(1)(2)
A
PARAMETER TESTCONDITIONS MIN TYP MAX UNIT
DYNAMICPERFORMANCECHARACTERISTICS
RES ADCcoreresolution Resolutionwithnomissingcodes 12 Bits
INL Integralnon-linearity TA=25°C ±2 LSB
TA=TMINtoTMAX ±3
DNL Differentialnon-linearity TA=25°C ±0.25 LSB
TA=TMINtoTMAX ±0.3
PeakNPR Peaknoisepowerratio 500-kHztonespacingfrom1MHztoƒS/2−1MHz,DDCbypassmode 46 dB
25-MHzwidenotchat320MHz
Third-orderintermodulation F1=2110MHzat−13dBFS
IMD3 distortion F2=2170MHzat−13dBFS –64 dBc
(1) Toensureaccuracy,theVA19,VA12,andVD12pinsarerequiredtobewellbypassed.Eachsupplypinmustbedecoupledwithoneor
morebypasscapacitors.
(2) Interleaverelatedfixedfrequencyspursatƒ /4andƒ /2areexcludedfromallSNR,SINAD,ENOBandSFDRspecifications.The
S S
magnitudeofthesespursisprovidedseparately.
Copyright©2014–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9
ProductFolderLinks:ADC12J1600 ADC12J2700
ADC12J1600,ADC12J2700
SLAS969D–JANUARY2014–REVISEDOCTOBER2017 www.ti.com
Electrical Characteristics (continued)
Unlessotherwisenoted,thesespecificationsapplyforV =V =1.2V,V =1.9V,VINfullscalerangeatdefault
(VA12) (VD12) (VA19)
setting(725mV ),VIN=–1dBFS,differentialAC-coupledsinewaveinputclock,ƒ =2.7or1.6GHzat0.5V with
PP (DEVCLK) PP
50%dutycycle,R =3.3kΩ±0.1%,afteraforeground(FG)modecalibrationwithtimingcalibrationenabled.Typical
(RBIAS)
valuesareatT =25°C.(1)(2)
A
PARAMETER TESTCONDITIONS MIN TYP MAX UNIT
DDCBYPASSMODE,ADC12J2700,ƒ(DEVCLK)=2.7GHz
FIN=350MHz,–1dBFS,12-bitDDCbypassmode 55.1
TA=25°C 54.9
Sinitgengaral-tteod-naocisreosrsateion,tire FIN=600MHz,–1dBFS,12-bitDDCbypass TA=TMINtoTMAX 52.5
SNR Nyquistbandwidth mode TA=25°C,calibration=BG 54.8 dBFS
Inputfrequency-dependent
interleavingspursincluded TA=TMINtoTMAX,calibration=BG 52.4
FIN=1500MHz,–1dBFS,12-bitDDCbypassmode 52.5
FIN=2400MHz,–1dBFS,12-bitDDCbypassmode 50
FIN=350MHz,–1dBFS,12-bitDDCbypassmode 55
TA=25°C 54.8
Sraigtion,ailn-ttoe-gnroaitseedaancdrodsisstoernttioirne FIN=600MHz,–1dBFS,12-bitDDCbypass TA=TMINtoTMAX 52.3
SINAD Nyquistbandwidth mode TA=25°C,calibration=BG 54.7 dBFS
Inputfrequency-dependent
interleavingspursincluded TA=TMINtoTMAX,calibration=BG 52.2
FIN=1500MHz,–1dBFS,12-bitDDCbypassmode 52.4
FIN=2400MHz,–1dBFS,12-bitDDCbypassmode 50
FIN=350MHz,–1dBFS,12-bitDDCbypassmode 8.8
TA=25°C 8.8
Einftfeegcrtaivteednuamcrboesrsoefnbtiirtes, FIN=600MHz,–1dBFS,12-bitDDCbypass TA=TMINtoTMAX 8.4
ENOB Nyquistbandwidth mode TA=25°C,calibration=BG 8.8 Bits
Inputfrequency-dependent
interleavingspursincluded TA=TMINtoTMAX,calibration=BG 8.4
FIN=1500MHz,–1dBFS,12-bitDDCbypassmode 8.4
FIN=2400MHz,–1dBFS,12-bitDDCbypassmode 8
FIN=350MHz,–1dBFS,12-bitDDCbypassmode 66.7
TA=25°C 71.6
Spurious-freedynamicrange FIN=600MHz,–1dBFS,12-bitDDCbypass TA=TMINtoTMAX 61
SFDR Inputfrequency-dependent mode TA=25°C,calibration=BG 70 dBFS
interleavingspursincluded
TA=TMINtoTMAX,calibration=BG 59
FIN=1500MHz,–1dBFS,12-bitDDCbypassmode 65.2
FIN=2400MHz,–1dBFS,12-bitDDCbypassmode 58.6
TA=25°C –77
ƒS/2 Isnatmerplelianvginrgatoeffsetspurat½ FmINod=e600MHz,–1dBFS,12-bitDDCbypass TTAA==T25M°INCt,ocTaMlibAXration=BG –74 –59.5 dBFS
TA=TMINtoTMAX,calibration=BG –57.5
TA=25°C –70
ƒS/4 Isnatmerplelianvginrgatoeffsetspurat¼ FmINod=e600MHz,–1dBFS,12-bitDDCbypass TTAA==T25M°INCt,ocTaMlibAXration=BG –68 –54.5 dBFS
TA=TMINtoTMAX,calibration=BG –53
TA=25°C –78
ƒS/2–FIN Isfnraetmeqrupleeliannvcgiynrgatoeff–seintpsupturat½ FmINod=e600MHz,–1dBFS,12-bitDDCbypass TTAA==T25M°INCt,ocTaMlibAXration=BG –76 –62 dBFS
TA=TMINtoTMAX,calibration=BG –61
TA=25°C –76
ƒS/4+FIN Isfnraetmeqrupleeliannvcgiynrgatoeff+seintpsupturat¼ FmINod=e600MHz,–1dBFS,12-bitDDCbypass TTAA==T25M°INCt,ocTaMlibAXration=BG –71 –61 dBFS
TA=TMINtoTMAX,calibration=BG –59
TA=25°C –77
ƒS/4–FIN Isfnraetmeqrupleeliannvcgiynrgatoeff–seintpsupturat¼ FmINod=e600MHz,–1dBFS,12-bitDDCbypass TTAA==T25M°INCt,ocTaMlibAXration=BG –76 –61.4 dBFS
TA=TMINtoTMAX,calibration=BG –61
10 SubmitDocumentationFeedback Copyright©2014–2017,TexasInstrumentsIncorporated
ProductFolderLinks:ADC12J1600 ADC12J2700