On-Chip Networks: Second Edition

210 Pages·2017·4.253 MB·English

by  Natalie Enright Jerger, Tushar Krishna, Li-Shiuan Peh

On-Chip Networks
Second Edition
Synthesis Lectures on
Computer Architecture
Editor
MargaretMartonosi,PrincetonUniversity
FoundingEditorEmeritus
MarkD.Hill,UniversityofWisconsin,Madison
SynthesisLecturesonComputerArchitecturepublishes50-to100-pagepublicationsontopics
pertainingtothescienceandartofdesigning,analyzing,selectingandinterconnectinghardware
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largelyfollowthepurviewofpremiercomputerarchitectureconferences,suchasISCA,HPCA,
MICRO,andASPLOS.
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2017
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Copyright©2017byMorgan&Claypool
Allrightsreserved.Nopartofthispublicationmaybereproduced,storedinaretrievalsystem,ortransmittedin
anyformorbyanymeans—electronic,mechanical,photocopy,recording,oranyotherexceptforbriefquotations
inprintedreviews,withoutthepriorpermissionofthepublisher.
On-ChipNetworks,SecondEdition
NatalieEnrightJerger,TusharKrishna,andLi-ShiuanPeh
www.morganclaypool.com
ISBN:9781627059145 paperback
ISBN:9781627059961 ebook
DOI10.2200/S00772ED1V01Y201704CAC040
APublicationintheMorgan&ClaypoolPublishersseries
SYNTHESISLECTURESONCOMPUTERARCHITECTURE
Lecture#40
SeriesEditor:MargaretMartonosi,PrincetonUniversity
FoundingEditorEmeritus:MarkD.Hill,UniversityofWisconsin,Madison
SeriesISSN
Print1935-3235 Electronic1935-3243
On-Chip Networks
Second Edition
Natalie Enright Jerger
UniversityofToronto
Tushar Krishna
GeorgiaInstituteofTechnology
Li-Shiuan Peh
NationalUniversityofSingapore
SYNTHESISLECTURESONCOMPUTERARCHITECTURE#40
M
&C Morgan&cLaypool publishers
ABSTRACT
Thisbooktargetsengineersandresearchersfamiliarwithbasiccomputerarchitectureconcepts
who are interested in learning about on-chip networks. This work is designed to be a short
synthesis of the most critical concepts in on-chip network design. It is a resource for both un-
derstanding on-chip network basics and for providing an overview of state of-the-art research
inon-chipnetworks.Webelievethatanoverviewthatteachesbothfundamentalconceptsand
highlightsstate-of-the-artdesignswillbeofgreatvaluetobothgraduatestudentsandindustry
engineers. While not an exhaustive text, we hope to illuminate fundamental concepts for the
readeraswellasidentifytrendsandgapsinon-chipnetworkresearch.
Withtherapidadvancesinthisfield,wefeltitwastimelytoupdateandreviewthestate
of the art in this second edition. We introduce two new chapters at the end of the book. We
have updated the latest research of the past years throughout the book and also expanded our
coverage of fundamental concepts to include several research ideas that have now made their
way into products and, in our opinion, should be textbook concepts that all on-chip network
practitioners should know. For example, these fundamental concepts include message passing,
multicastrouting,andbubbleflowcontrolschemes.
KEYWORDS
interconnectionnetworks, topology, routing, flow control, deadlock, computer ar-
chitecture,multiprocessorsystemonchip
ix
To our families
for their encouragement and patience
through the writing of this book.