Table Of ContentCONFIDENTIAL B
MT6359 Design Notice
V0.7
History
Revision Date Author Description
2019/04/01 Mark Initial
Page4 Update Powerplan
Page5 VMODEM buck forVRF09, VPU buck forVDIGRF
Page8 VM18 change to default on 1.8V
Page9 Change VA09/VSARM PROC1/VSRAM PROC2/VSARM Others/VSRAM MD LDO
boot default voltage and application
2019/05/06 Mark Page44 Change decoupling values
Page45 Change Cout and PDN cap values
Page58/59 Change trace width and inductor Itemp./Isat. Max. of Buck
V0.1 Page68 Change LDO application of SRAM_LDOs/VA09
Page80/86 Change VSRAM_xPU to SRAMCORE
Page106 Add UFS2.5/UFS3.0Power configuration
Page3/4 Change IC’s Part number
Page8/9 Update VPA Imax=1000mA(align MT6359 datasheet) and VPU buck Vboot
Page 84/90 add VBBCK_PMU to AP AVDD12_CKBUF_UFS constraint
2019/05/30 Mark Page 48/49 Revise Cout cap range and Capacitance
Page72 Adjust VA09 LDO cap range
Page112 Add “Update Figure forChip Placement Recommendation”
Page16 Add power on/offsequence
CONFIDENTIAL B 1
History
Revision Date Author Description
Page113 Add IC package layout recommendation
Page14 VSRAM_PROC2 boot up voltage change to 0.9V
Page 11/14 VRFCK/VBBCK boot up voltage change to 1.24V
Page64 VGPU forVCORE inductor Itemp. change to 4.7A
Add Notice forinductor selection guide
Page73/74/76/77 VCN13/VXO22/VBBCK cap range update
V0.2 2019/08/01 Mark Page9 Power plan typo update
Page60/62 Update Couts ESL constraint
Page 114 Update MT6359PP/B to MT6359VPP/B
Page 17 Revise Power on/offsequence and add +/-20% tolerance
Page63 Update VDIGRF Trace width
Page5 Update PMIC change comparison table forVXO22/VRFCK/VBBCK
Page11/14 Update VXO22/VRFCK/VBBCK IMAX
Page12 Update VIBR output voltage setting
Page51 Update MT6359P Cin capacitor notice
V0.3 2019/10/22 Mark
Page103 Add MT6359VPP MES layout constraint
Page104 Update VRF18 trace length and Rpcb
Page113 Update MT6359VPP forMT6883 platform
CONFIDENTIAL B 2
Page21~25,30 Redraw the block diagram
History
Revision Date Author Description
Page17 Update some powerrail power offsequence from0.1ms to 0.2ms
Page13 Update VEMC setting for2.5V
V0.4 2020/01/15 Mark
Page111 BATON Short to GND while RU=NC, Pull-Low 10KΩ to GND while RU exist
Page11/63 Update Vs1 IMAX
V0.5 2020/05/08 Mark
Page50 Update VPA cap range
V0.6 2020/05/10 Mark Page50 Update cap range
Page38 Update R4/RNTCselection notice
V0.7 2020/05/20 Mark
Page79/96 Update VRTC selection noted
CONFIDENTIAL B 3
Content
▪ Feature comparison
▪ MT6359 Introduction
▪ Function Description
▪ Reference Design
▪ Function Block Notice
▪ PCB Layout Guideline
CONFIDENTIAL B 4
Power plan comparison
PMIC P90 Helio5G PMIC P90 Helio5G
MT6359 ball MT6359 ball
Power-plan Power-plan Power-plan Power-plan
name name
Buck LDO
VPROC1 CPU-B APU VM18 LP4x_VDD1
VPROC2 CPU-L DLA VCAMIO Camera IO Camera IO
VCORE CORE VRF13 VAUD18 Audio, 1.8V Audio, 1.8V
VPU VPU VDIGRF VA09 AP analog 0.9V VSRAM_DIGRF
MT6359PP/B
VPA VPA VPA VA12 AP analog 1.2V AP analog 1.2V
Buck MT6359PP/B
VS1 VS1 VS1 VCN13 WCN, 1.3V WCN, 1.3V
(PWRAP) LDO
VS2 VS2 VS2 VSRAM_MD VSRAM_MD VSRAM_APU
(PWRAP)
VMODEM MODEM VRF09 VSRAM_PROC1 VSRAM_CPUB VSRAM_CPUB
VGPU11+VGPU12 GPU CORE VSRAM_PROC2 VSRAM_CPUL VSRAM_CPUL
MT6360PP BUCK1 MDLA LP4x_VDD2 VSRAM_Others VSRAM_CORE VSRAM_GPU
Buck (I2C) BUCK2 LP4x_VDD2 LP4x_VDDQ VRF12 RF12 AP analog 1.2V
CH1
MT6315PP/B LDO1 (VFP)
CH2 CPU-B Fingerprint Fingerprint
Buck (150mA)
CH4
(SPMI) LDO2 (VTP)
CH3 CPU-L Touch panel Touch panel
(200mA)
CH1 LDO3 (VMC)
MT6315QP/B AP MSDC AP MSDC
CH2 GPU (200mA)
Buck
CH4 MT6360PP LDO5 (VMCH)
(SPMI) SD card SD card
CH3 VSRAM_CORE LDO (I2C) (800mA)
CH1 LDO6
MT6315RP/B MODEM
CH2 (AP_VMDDR) VMDDR
Buck
CH3 NR (300mA)
(SPMI)
CH4 SRAM_MD LDO7
MT6691SVP/A VMDDR (LP4x_VDDQ) VDDQ VMDDR_EN
MT6691OTP/A USB3.0 1.2V (600mA)
MT6680P/A LP4x_VDD1
CONFIDENTIAL B
PMIC change comparison table
P90 Helio5G
MT6359(MT6359PP/B)
MT6359 (MT6359P/A)
PMICs MT6360 (MT6360PP)
MT6360 (MT6360P)
MT6315*3(MT6315PP/B, MT6315QP/B, MT6315RP/B)
MT6691SVP/A (EMI VMDDR)
Ext. Buck/LDO N/A MT6680P/A (VDD1)
MT6691OTP/A (UFS3.0 1.2V) (Option)
Interface PWRAP+I2C PWRAP+I2C+SPMI
Buck Phase 12 24
UFS Onlysupport UFS2.1 power Support UFS2.1/UFS3.0 power
DRAM power 2×16-bit LPDDR4X at 1866 MHz 4x 16-bit LPDDR4X at 2133 MHz
MT6359 VCORE buck Maxvoltage up to 1.19V Maxvoltage up to 1.3V
MT6359 VA09 LDO Support min.voltage 0.9V Support min.voltage 0.85V
MT6359 VRF12 LDO Defaultoff for RFIC 1.2V power Default on for AP 1.2V analog power
MT6359 VEMC LDO No HW trapping HW trapping 3.0V/2.55V
MT6359 VXO22 IMAX 50mA IMAX 25mA
MT6359 VRFCK Default voltage1.6V, IMAX 40mA Default voltage1.24V, IMAX 10mA
MT6359 VBBCK IMAX 40mA IMAX 10mA
CONFIDENTIAL B 6
PMIC change comparison table
P90 Helio5G
MT6360 HW trapping RG:000, HWtrapping short to VDDA RG:001, HW trapping short 1.8M to gnd
MT6360 Buck1 IMAX 3A 4A
MT6360 Buck1 inductor (Fsw) 0.33uH (2.4Mhz) for VMDLA 0.24uH (2.72Mhz) for VDD2
MT6360 Buck2 inductor (Fsw) 0.33uH (2.4Mhz) for VDD2 0.47uH (2.4Mhz) for VDDQ
MT6360 LDO6 0.75V for VMDDRPHY NC
MT6360 LDO7 0.6V for VDDQ 1.8V for VMDDRPHYEnable
MT6315 N/A MT6315 for CPU/GPU/MDpower
CONFIDENTIAL B 7
Content
▪ Feature comparison
▪ MT6359 Introduction
▪ Function Description
▪ Reference Design
▪ Function Block Notice
▪ PCB Layout Guideline
CONFIDENTIAL B 8
MT6359 – General Description
▪ The MT6359 highly integrated function fulfill all power requirement in smart
phone system
• Buck Converters
MT6359 x 10 (VCORE, APU, DLA, VS1, VS2, RF09, RF13, DIGRF )
• LDOs
▪ Analog LDO * 6
▪ Digital LDO * 25
▪ RTC * 1
• Audio
▪ Audio Codec
▪ Audio Line Out
• RTC Macro
• Fuel Gauge
• XO Control and Output
• Ext. LDOs/Buck
▪ MT6680 (EMI_VDD1)
▪ MT6691 (EMI_VMDDR)
CONFIDENTIAL B 9
