Modern Control of DC-Based Power Systems: A Problem-Based Approach

304 Pages·2018·13.373 MB·English

by  Marco Cupelli, Antonino Riccobono, Markus Mirz, Mohsen Ferdowsi, Antonello Monti

MODERN CONTROL OF
DC-BASED POWER
SYSTEMS
This pageintentionallyleftblank
MODERN CONTROL OF
DC-BASED POWER
SYSTEMS
A Problem-Based Approach
MARCO CUPELLI, ANTONINO RICCOBONO,
MARKUS MIRZ, MOHSEN FERDOWSI AND
ANTONELLO MONTI
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CONTENTS
ListofFigures vii
ListofTables xv
ListofContributors xvii
ListofAcronyms xix
SymbolsUsedinthisWork xxi
Preface xxiii
Introduction xxix
1. Overview—Voltage Stabilization of Constant Power Loads 1
1.1 ConstantPowerLoadConnectedtoaDCBus 1
1.2 CompensatingCPLsbyPassiveComponents 4
1.3 CompensatingCPLsWithLoadSideControl 5
1.4 CompensatingCPLsWithDCBusControl 7
1.5 Summary 9
References 10
FurtherReading 13
2. Small-Signal Analysis of CascadedSystems 15
2.1 MVDCSystemConsiderationsInfluencingVoltageStability 15
2.2 ConverterModel 17
2.3 CascadedSystem(VMC) 26
2.4 LoadModels 28
2.5 LinearControlDesignandValidation 35
2.6 Small-SignalStabilityAnalysisofCascadeSystems 51
2.7 Summary 77
References 79
3. Background 83
3.1 FrequencyResponseApproaches 83
3.2 NyquistStabilityCriterion 84
3.3 BodeDiagrams 84
3.4 LinearState-Space 88
3.5 Observer 93
3.6 Droop 95
References 102
v
vi Contents
4. Generation Side Control 103
4.1 MVDCShipboardPowerSystems 103
4.2 State-SpaceModel 105
References 108
FurtherReading 109
5. ControlApproaches for ParallelSourceConverter Systems 111
5.1 LinearizingStateFeedback 111
5.2 SynergeticControl 123
5.3 ImmersionandInvarianceControl 134
5.4 DecentralizedControls 144
5.5 BacksteppingBasedControl 162
5.6 AdaptiveBacksteppingControl 175
5.7 HNOptimalControl(ContributorSriramKarthikGurumurthy) 186
5.8 SlidingModeControl 199
5.9 Summary 210
References 212
FurtherReading 216
6. Simulation 219
6.1 CascadedSystemEvaluation 220
6.2 ShipboardPowerSystem 229
6.3 Summary 245
References 246
7. Hardware Inthe LoopImplementation andChallenges 249
7.1 Introduction 249
7.2 TheHardwareintheLoop 249
7.3 Discretization 251
7.4 SimulationCaseShipboardPowerSystem 255
References 259
FurtherReading 259
Index 261
LIST OF FIGURES
Figure1 Transition from load side control towards generation xxxi
side control
Figure1.1 Electricalsystem containing anonlinear load 1
Figure1.2 Characteristic I(cid:1)Vcurve of aConstant PowerLoad 2
Figure1.3 Electricalsystem containing aConstantPower Load, 3
equivalent circuitaround operating point
Figure1.4 Addinga parallel RC filter 5
Figure1.5 Load sidestabilizing control 6
Figure1.6 Virtualimpedance 6
Figure1.7 Constant powerload fedbya DC(cid:1)DC converter 8
Figure1.8 Compensating Constant PowerLoads 9
Figure2.1 DC(cid:1)DC voltage regulator system 16
Figure2.2 Canonical small-signal model for a terminated DC(cid:1)DC 18
converter
Figure2.3 Mathematicalrepresentation of small-signal converter 21
Figure2.4 Block diagram of voltagemodecontrol of converter 21
Figure2.5 DC(cid:1)DC converter PCMC structure 24
Figure2.6 Inductorcurrentfor PCM controlled converter with 24
compensation ramp
Figure2.7 Control blockdiagram PCMC 25
Figure2.8 Cascaded canonical model 26
Figure2.9 Cascaded control blocksfor VMC 27
Figure2.10 Simplified model of aCPL 29
Figure2.11 Block diagram of CPL around operating point 31
Figure2.12 Operating limits forconstantpowercharacteristic 32
Figure2.13 Circuitrepresentationof aswitching converter with 36
inner PIcurrentloop and outer PIvoltage loop
Figure2.14 Small-signalblockdiagramrepresentationofaswitching 37
converterwithinnerPIcurrentloopandouterPIvoltageloop
Figure2.15 Small-signal blockdiagram representation of aswitching 38
converter in PICM
Figure2.16 Bode plot of thecontrol-to-outputtransfer function G ðsÞ: 43
vd
Figure2.17 Bode plot of thevoltage controltransfer function GðsÞ: 44
c
Figure2.18 Bode plot of thevoltage loop gain T ðsÞ with Phase Margin 45
VM
50.4 degrees,DelayMaring0.000138s,at f51010Hz,
Closed Loop stable5Yes
Figure2.19 Bode plot of thecontrol-to-inductorcurrenttransfer function 45
G ðsÞ:
iLd
Figure2.20 Bode plot of thecurrent control transfer function GcI:ðsÞ 46
Figure2.21 Bode plot of theinnercurrentloop gain T ðsÞwithPhase 47
PICM
Margin 80 degrees,Delay Maring 0.000111s, at
f52000Hz, ClosedLoop stable5Yes
vii
viii ListofFigures
Figure2.22 Bode plot of the currentcontrol input to outputvoltage 47
G ðsÞ:
vc
Figure2.23 Bode plot of thevoltage controltransfer function G ðsÞ: 48
cv
Figure2.24 Bode plot of the inner voltage loop gain T ðsÞwith 49
PICMFB
PhaseMargin 80 degrees,DelayMaring 0.00222s, at
f5100Hz, Closed Loop stable5No
Figure2.25 Keyfeatures and functions of anetwork analyzer 49
Figure2.26 Typical test setup for measuring G ðsÞwhen theconverter 50
vd
operateswith constant duty cycle
Figure2.27 Typical test setup for measuring T ðsÞwhen the converter 51
VM
operates in VMC
Figure2.28 Equivalent sourcesubsystem interaction with theequivalent 52
load subsystem (A)and equivalent MIMOfeedback block
diagram (B)
Figure2.29 Stability criteria: boundariesbetween forbidden regions and 54
allowableregions
Figure2.30 Averaged model simulation in Simulinkof the cascade 56
of abuckconverterand a VSI
Figure2.31 Bode plot of the OL,PICM,and PICM_FBinput 57
impedances of the VSI
Figure2.32 Bode plot of the OL,PICM,and PICM_FBoutput 58
impedance of the buckconverter with resistive load
Figure2.33 Bode plot of the OL,PICM,and PICM_FBoutput 59
impedance of the buckconverter with resistive load
removed
Figure2.34 Bode plot of the OLand VM_FB outputimpedanceof the 60
buckconverter withresistive load
Figure2.35 Bode plot of the OLand VM_FB outputimpedanceof the 61
buckconverter withresistive load removed
Figure2.36 Nyquist plot of the minor loop gain for the cascade of 62
PICM_FB-controlled buckconverter and PICM_FB-
controlled VSI (stablecase)
Figure2.37 Bus voltage and VSI three-phase output voltagetransient in 62
correspondence of a symmetricVSIload step from 20Ω to
10Ω for thecascade of PICM_FB-controlled buck
converter and PICM_FB-controlled VSI (stablecase)
Figure2.38 Nyquist plot of the minor loop gain for the cascade of 63
VM_FB-controlled buck converter and PICM_FB-
controlled VSI (stablecase)
Figure2.39 Bus voltage and VSI three-phase output voltagetransient in 63
correspondence of a symmetricVSIload step from 20Ω to
10Ω for thecascade of VM_FB-controlled buckconverter
and PICM_FB-controlled VSI(stablecase)
ListofFigures ix
Figure2.40 Nyquist plot of the minor loop gain for the cascade of 64
PICM_FB-controlled buckconverterand PICM_FB-
controlled VSI(unstable case)
Figure2.41 Bus voltage and VSI three-phase output voltagetransient in 64
correspondence of asymmetric VSI load step from 20Ω
to 10Ω for the cascade of PICM_FB-controlled buck
converter and PICM_FB-controlled VSI(unstable case)
Figure2.42 Nyquist plot of the minor loop gain for the cascade of 65
VM_FB-controlled buckconverterand PICM_FB-
controlled VSI(unstable case)
Figure2.43 Bus voltage and VSI three-phase output voltagetransient in 65
correspondence of asymmetric VSI load step from 20Ω to
10Ω for thecascade of VM_FB-controlled buck converter
and PICM_FB-controlled VSI(unstablecase)
Figure2.44 A dynamicsystemunder test to find the input-to-output 66
transfer function G ðsÞ:
uy
Figure2.45 AwidebandPRBSsignal(red (light grayin print version)) 67
and a narrowband sinusoidal signal (blue (dark grayin print
version))in the time domain(top) and in the frequency
domain(bottom)
Figure2.46 Conceptual cascade of converters showing the injectionof 68
PRBS over the load convertercontroland embedded
control platform foronlineidentificationof source
impedance
Figure2.47 Implementationof the routines of the WSI techniquein an 70
embeddedcontroller
Figure2.48 Block diagram of LFSR for PRBS generation 71
Figure2.49 Identification of the output impedance of the source 74
converter withtwotechniques: the digital network
analyzer and the WidebandSystem Identification technique
(WSI)
Figure2.50 Voltageand currentmeasurements atthe impedance 75
measurement point withthe Digital Network Analyzer
technique
Figure2.51 Bode plot of theidentified output impedance of the source 76
convertercompared to the analytic transfer function with
the DigitalNetwork Analyzer technique
Figure2.52 Voltageand currentmeasurements atthe impedance 76
measurement point withthe WidebandSystem
Identification technique
Figure2.53 Bode plot of theidentified output impedance of the source 77
convertercompared to the analytic transfer function with
the WidebandSystem Identification technique
Figure3.1 Bode plot of thesystemunder study 87