Table Of ContentLOGIC FUNCTIONS AND EQUATIONS
Logic Functions and
Equations
Binary Models for Computer Science
by
Christian Posthoff
The University of The West Indies,
Saint Augustine Campus, Trinidad&Tobago
and
Bernd Steinbach
Freiberg University of Technology,
Germany
~ Springer
A c.I.P. Catalogue record for this book is available from the Library of Congress.
TSBN 978-1-4419-5261-5 ISBN 978-1-4020-2938-7 (eBook)
DOI 10.1007/978-1-4020-2938-7
Printed an acid-free paper
springeronline.com
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© 2004 Springer Science+Business Media New York
Originally published by Springer in 2004
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Contents
List of Figures IX
List of Tables xv
Preface XVll
Introduction XXVll
Part I Theoretical Foundations
l. BASIC ALGEBRAIC STRUCTURES 3
1 The Set B 3
2 Boolean Algebras 8
3 The Set Bn 19
2. LOGIC FUNCTIONS 37
1 Logic Functions 37
2 Formulas and Expressions 65
3 Special Logic Functions 69
4 Minimization Problems 80
5 Complete Systems of Functions 84
6 Partially Defined Functions 86
3. LOGIC EQUATIONS 91
1 Basic Problems and Definitions 91
2 Systems of Equations and Inequalities 93
3 Solutions with regard to Variables 94
4 SAT-Problems 98
v
Vl LOGIC FUNCTIONS AND EQUATIONS
4. BOOLEAN DIFFERENTIAL CALCULUS 101
1 The Boolean Differential 101
2 Differentials of Logic Functions 104
3 Partial Differentials 112
4 M -fold Differentials 115
5 Simple Derivatives 122
6 Vectorial Derivatives 127
7 M -fold Derivatives 134
5. THE SOLUTION OF LOGIC EQUATIONS 143
1 Ternary Vectors as the Main Data Structure 144
2 The Solution of Simple Equations 146
3 Operations with Solution Sets 148
4 The SAT-Problem CF=l 155
5 The Parallelization of the Implementation 162
6 Systems of Linear Equations 163
7 The Solution with regard to Variables 170
8 Relations between solution Intervals 181
9 The Inversion of Equation Systems 188
10 Functional Equations 191
11 Boolean Differential Equations 193
Part II Applications
6. LOGICS AND ARITHMETICS 209
1 Propositional Logics 209
2 Binary Arithmetics 221
3 Coding 232
4 Application in Programming Languages 246
5 Complexity of Logic Problems 252
7. COMBINATIONAL CIRCUITS 265
1 The Circuit Model 265
2 Analysis 279
3 Design 293
4 Test 326
Contents vii
8. FINITE-STATE MACHINES 337
1 The Circuit Model 337
2 Analysis 347
3 Design 356
4 Hardware-Software Co-Design 368
Part III Tools
9. XBOOLE 377
List of Figures
1.1 The reflexive and irreflexive order of B 5
1.2 The reflexive partial order :S of B3 21
1.3 The irreflexive partial order < of B3 21
2.1 The root of the decision tree and the first construc-
tion step 61
2.2 Step 2 of the construction of the decision tree 62
2.3 The complete decision tree 63
2.4 The decision tree of the natural order 65
2.5 The decision tree of the inverse order 66
2.6 The graph of a monotone function 74
2.7 Symmetric functions of two variables 79
4.1 Possible changes of the value of the variable Xi 102
4.2 Direction vectors of dB2 embedded in B2 103
4.3 Graph of the equation F(x, dx) = G(x, dx) (nodes
are labelled by (Xl, X2, X3)) 106
4.4 Graph of the differential d(a,b)f(a, b) of the func-
tion f(a, b) = a V b 107
4.5 Graph of the differential expansion F(a, b, da, db)
of the function f = a V b 108
4.6 Graph of the differential minimum Min(a,b)f(a, b)
of the function f(a, b) = a V b 110
4.7 Graph of the differential maximum lVlax(a,b)f(a, b)
of the function f(a, b) = a V b 111
4.8 Graph of d(a,b)i(a, b, c) with f(a, b, c) = a be ffi a b 114
IX
x LOGIC FUNCTIONS AND EQUATIONS
4.9 Graph of the 2-fold differential d(b,c)f(a, b, c) for
f(a,b,c) =abeffiab 116
4.10 Graph of the 2-fold minimum Min(a,b/(a, b) with
f(a,b)=aVb 118
4.11 Graph of the 2-fold maximum Max(a,b/(a, b) with
f(a,b) =aVb 120
4.12 Graph of 'I3(a,b)f(a, b) with f(a, b) = a vb 121
4.13 The Karnaugh-maps of f(a, b, c) = a be ffi a band
all simple derivatives with regard to c 125
4.14 Karnaugh-maps of vectorial derivatives 130
4.15 Karnaugh-maps of 2-fold derivative operations 139
7.1 Physical structure of a NOT-gate in CMOS 267
7.2 Structure and switching model of a NOT-gate 267
7.3 Structure and switching model for a NAND-gate 269
7.4 Structure of a combinational circuit a) diagram b)
system of logic equations c) set of local lists of
phases 271
7.5 Structures of two-level combinational circuits 273
7.6 Programmable logic array: a) structure b) set of
logic functions c) structure TVL of the PLA 276
7.7 Types of function hazards 291
7.8 Check for prime conjunctions 295
7.9 Two-level combinational circuits -minimal disjunc-
tive form 297
7.10 Logic function f(a, b, c, d); a) Karnaugh-map b) all
prime conjunctions 298
7.11 Structures of the designed two-level combinational
circuits 299
7.12 Pipe decompositions of a logic function f(x), sug-
gested by: a) Povarov b) Ashenhorst c) Curtis 302
7.13 Structure of three types of bi-decompositions 304
7.14 Disjoint OR-bi-decomposition 305
7.15 Non-disjoint OR-bi-decomposition 306
7.16 Disjoint AND-bi-decomposition 308
7.17 Non-disjoint EXOR-bi-decomposition 309
7.18 Disjoint EXOR-bi-decomposition 311
7.19 Disjoint OR-bi-decomposition 313
List of Figures Xl
7.20 Non-disjoint AND-bi-decomposition 315
7.21 Non-disjoint EXOR-bi-decomposition 317
7.22 Non-disjoint EXOR-bi-decomposition 319
7.23 Weak OR-bi-decomposition 320
7.24 Structure of weak bi-decompositions 321
7.25 Weak AND-bi-decomposition 323
7.26 Network model: sensible path 328
7.27 Network model: sensible point - internal signal 329
7.28 Network model: sensible point - internal branch 331
7.29 Example of preparing the basic data for the calcu-
lation of test patterns 333
8.1 Basic structures of finite-state machines a) Moore-
type b) Mealy-type 345
8.2 Behaviour of a finite-state machine of Mealy-type
a) list of phases b) graph 347
8.3 Structure of an asynchronous sequential circuit: a)
original circuit b) cut loops 348
8.4 The Karnaugh-maps of a finite-state machine 352
8.5 Behavioural graph of a finite-state machine 353
8.6 Structure of a clocked sequential circuit 354
8.7 Graph of a synchronous finite-state machine 356
8.8 A non-deterministic finite-state machine 361
8.9 Incompletely specified function of the input dl of
the first DV-flip-flop 362
8.10 Incompletely specified function of the input VI of
the first DV-flip-flop 363
8.11 Incompletely specified function of the input d2 of
the second DV-flip-flop 365
8.12 Incompletely specified function of the input V2 of
the second DV-flip-flop 366
8.13 Graph of the designed finite-state machine 367
8.14 Structure of the designed sequential circuit using
two clocked DV-flip-flops 368
8.15 Structure of a finite-state machine based on a 1-
KBit-ROM 370
List of Tables
1.1 Minimum and maximum in B 6
1.2 Conjunction and disjunction in B 6
1.3 Equivalence and antivalence (exclusive-or) in B 7
1.4 Negation in B 7
1.5 Inequality::; and equality in B 8
1.6 Inequality < and equality in B 8
1.7 The first distributive law 10
1.8 The relation between power set and binary vectors 23
1.9 The greatest common divisor as Boolean 1\ 24
1.10 The lowest common multiple as Boolean V 25
1.11 The isomorphism between different structures 25
1.12 The elements of Bn as dual numbers 27
1.13 Powers of 2 29
1.14 Number of bits required 29
1.15 The elements of Bn enumerated by the GRAY code 30
1.16a Dual Code 30
1.16b GRAY Code 30
1.17 The triangular inequality for one component 32
1.18 Arrangement of vectors according to h(x, y) 32
1.19 Arrangement of vectors according to a(x, y) 33
2.1 Functions of one variable 38
2.2 Functions of two variables 38
2.3 The number of logic functions of n variables 40
2.4 The correspondence between binary vectors, ele-
mentary conjunctions and disjunctions 41
Xlll
