Junctionless Field-Effect Transistors - Design, Modeling and Simulation oBook WOL

493 Pages·2019·21.073 MB·English

by  Sahay., M. (IEEE) Hatcher

JUNCTIONLESS
FIELD-EFFECT
TRANSISTORS
IEEEPress
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Piscataway,NJ08854
IEEEPressEditorialBoard
EkramHossain,EditorinChief
GiancarloFortino AndreasMolisch LindaShafer
DavidAlanGrier SaeidNahavandi MohammadShahidehpour
DonaldHeirman RayPerez SarahSpurgeon
XiaoouLi JeffreyReed AhmetMuratTekalp
JUNCTIONLESS
FIELD-EFFECT
TRANSISTORS
Design, Modeling, and
Simulation
SHUBHAMSAHAY
MAMIDALAJAGADESHKUMAR
IEEE Press Series on Microelectronic Systems
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CONTENTS
Preface xi
1 IntroductiontoField-EffectTransistors 1
1.1 TransistorAction, 2
1.2 Metal-Oxide-SemiconductorField-EffectTransistors, 4
1.3 MOSFETCircuits:TheNeedforComplementaryMOS, 9
1.4 TheNeedforCMOSScaling, 11
1.5 Moore’sLaw, 13
1.6 Koomey’sLaw, 13
1.7 ChallengesinScalingtheMOSFET, 13
1.8 Conclusion, 23
References, 23
2 EmergingFETArchitectures 27
2.1 TunnelFETs, 28
2.2 ImpactIonizationMOSFET, 34
2.3 BipolarI-MOS, 39
2.4 NegativeCapacitanceFETs, 41
2.5 Two-DimensionalFETs, 46
2.6 NanowireFETs, 49
2.7 NanotubeFETs, 51
2.8 Conclusion, 57
References, 58
vii
viii CONTENTS
3 FundamentalsofJunctionlessField-EffectTransistors 67
3.1 DeviceStructure, 69
3.2 Operation, 70
3.3 DesignParameters, 80
3.4 ParametersthatAffectthePerformance, 82
3.5 BeyondSiliconJLFETS:OtherMaterials, 100
3.6 Challenges, 103
3.7 Conclusion, 110
References, 111
4 DeviceArchitecturestoMitigateChallengesinJunctionless
Field-EffectTransistors 125
4.1 JunctionlessAccumulation-ModeField-EffectTransistors, 126
4.2 RealizingEfficientVolumeDepletion, 129
4.3 SOIJLFETwithaHigh-𝜅 Box, 131
4.4 BulkPlanarJLFET, 137
4.5 JLFETwithaNonuniformDoping, 140
4.6 JLFETwithaStepDopingProfile, 144
4.7 MultigateJLFET, 149
4.8 JLFETwithaHigh-𝜅 Spacer, 153
4.9 JLFETwithaDualMaterialGate, 157
4.10 Conclusion, 162
References, 162
5 Gate-InducedDrainLeakageinJunctionlessField-Effect
Transistors 173
5.1 HoleAccumulation, 174
5.2 ParasiticBJTAction, 176
5.3 ImpactofBTBT-InducedParasiticBJTActiononScaling, 177
5.4 ImpactofSiliconFilmThicknessonGIDL, 179
5.5 ImpactofDopingonGIDL, 187
5.6 ImpactofSpacerDesignonGIDL, 189
5.7 NatureofGIDLinDifferentNWFETConfigurations, 190
5.8 DeviceArchitecturestoMitigateGIDL, 199
5.9 Conclusion, 248
References, 249
6 ImpactIonizationinJunctionlessField-EffectTransistors 255
6.1 ImpactIonization, 256
6.2 FloatingBodyEffectsinSilicon-on-InsulatorMOSFETs, 256
6.3 NatureofImpactIonizationinJLFETs, 260
CONTENTS ix
6.4 ZeroGateOxideThicknessCoefficient, 263
6.5 SingleTransistorLatch-UpinJLFETs, 266
6.6 ImpactofBodyBiasonImpactIonizationinJLFETs, 267
6.7 SubbandGapImpactIonizationinDGJLFETSwithAsymmetric
Operation, 268
6.8 ImpactofGateMisalignmentonImpactIonizationinDGJLFETs, 270
6.9 SpacerDesignGuidelinefromImpactIonizationPerspective, 272
6.10 HysteresisandSnapbackinJLFETs, 273
6.11 ImpactofHeavy-IonIrradiationonJLFETs, 275
6.12 Conclusions, 276
References, 276
7 JunctionlessDevicesWithoutAnyChemicalDoping 281
7.1 ChargePlasmaDoping, 282
7.2 ChargePlasmaBasedp–nDiode, 283
7.3 JunctionlessI-MOSFET, 288
7.4 JunctionlessTunnelFETs, 290
7.5 JLTFETonaHighlyDopedSiliconFilm, 294
7.6 BipolarEnhancedJLTFET, 294
7.7 JunctionlessFETSWithoutAnyChemicalDoping, 297
7.8 ChallengesforCPJLFETs, 302
7.9 ElectrostaticDopingBasedFETs, 312
7.10 Conclusions, 319
References, 319
8 ModelingJunctionlessField-EffectTransistors 327
8.1 IntroductiontoFETModeling, 328
8.2 SurfacePotentialModelingofJLFETs, 330
8.3 Charge-BasedModelingApproach, 351
8.4 DrainCurrentModelingApproach, 355
8.5 ModelingShort-ChannelJLFETs, 365
8.6 ModelingQuantumConfinement, 372
8.7 Conclusion, 379
References, 379
9 SimulationofJLFETSUsingSentaurusTCAD 385
9.1 IntroductiontoTCAD, 386
9.2 ToolFlow, 387
9.3 SampleInputDeckforLong-ChannelJLFETS, 391
9.4 ModelCalibration, 407
9.5 ModelCalibrationforShort-ChannelJLFETs, 409
9.6 ModelCalibrationforNWFETS, 422
x CONTENTS
9.7 Conclusion, 436
References, 436
10 ConclusionandPerspectives 439
10.1 JLFETSAsaLabel-FreeBiosensor, 441
10.2 JLFETSAsCapacitorlessDRAM, 443
10.3 NanowireJunctionlessNANDFlashMemory, 444
10.4 JunctionlessPolysiliconTFTSwithaHybridChannel, 447
10.5 JLFETSfor3DIntegratedCircuits, 449
10.6 Summary, 450
References, 451
Index 457