Table Of ContentHot Carrier
Design Considerations
for MOS Devices
and Circuits
Hot Carrier
Design Considerations
for MOS Devices
and Circuits
Edited by
Cheng T. Wang, Ph.D.
~ VAN NOSTRAND REINHOLD
~ _ _ _N ewYork
Copyright © 1992 by Van Nostrand Reinhold
Softcover reprint of the hardcover 1s t edition 1992
Library of Congress Catalog Card Number 91-42917
ISBN 978-1-4684-8549-3 ISBN 978-1-4684-8547-9 (eBook)
DOl 10.1007/978-1-4684-8547-9
All rights reserved. No part of this work covered by the
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Library of Congress Cataloging-in-Publication Data
Hot carrier design considerations for MOS devices and circuits /
edited by Cheng T. Wang.
p. cm.
Includes bibliographical references and index.
I. Metal oxide semiconductors-Design and construction. 2. Metal
oxide semiconductors-Reliability. I. Wang, Cheng T.
TK7871.99.M44H68 1992
62l.3815'2-dc20 91-42917
CIP
To the memory of
my mother, Liu Chi
Preface
As device dimensions decrease, hot-carrier effects, which are due mainly
to the presence of a high electric field inside the device, are becoming a
major design concern. On the one hand, the detrimental effects-such as
transconductance degradation and threshold shift-need to be minimized
or, if possible, avoided altogether. On the other hand, performance
such as the programming efficiency of nonvolatile memories or the carrier
velocity inside the devices-need to be maintained or improved through
the use of submicron technologies, even in the presence of a reduced
power supply.
As a result, one of the major challenges facing MOS design engineers
today is to harness the hot-carrier effects so that, without sacrificing
product performance, degradation can be kept to a minimum and a reli
able design obtained. To accomplish this, the physical mechanisms re
sponsible for the degradations should first be experimentally identified
and characterized. With adequate models thus obtained, steps can be
taken to optimize the design, so that an adequate level of quality assur
ance in device or circuit performance can be achieved. This book ad
dresses these hot-carrier design issues for MOS devices and circuits, and
is used primarily as a professional guide for process development engi
neers, device engineers, and circuit designers who are interested in the
latest developments in hot-carrier degradation modeling and hot-carrier
reliability design techniques. It may also be considered as a reference
book for graduate students who have some research interests in this excit
ing, yet sometime controversial, field.
The book starts with an introduction to basic hot-carrier degradation
mechanisms in MOSFETs by Dr. Herman Maes and his colleagues at
IMEC, Belgium. In the chapter, Dr. Maes discusses experimental pro
cedures, such as the charge-pumping technique for studying hot-carrier
Vll
viii Preface
injection and interface trap generation mechanisms in MOSFETs. Models
are derived for characterizing the degradation mechanisms in both
n-channel and p-channel MOSFETs.
Dr. Charvaka Duvvury and Dr. Shian Aur of Texas Instruments fol
low, with a discussion of the impact of hot-carrier effects on DRAM
circuit operations, and present certain simple, yet practical ways to incor
porate the hot-carrier models into typical circuit simulation to perform
reliable design on DRAM circuits. Electrostatic discharge (ESD) latent
damage is also compared with hot-carrier reliability in this chapter. Even
though the focus is on the DRAM circuits, the procedure and the under
lined principles could equally apply to some other circuit designs.
Dr. Yoshiaki Kamigaki and Dr. Eiji Takeda of Hitachi, Japan then
provide a comprehensive overview of the development and design consid
erations of nonvolatile memories. Memory design issues for EPROMs,
flash EEPROMs, floating-gate EEPROMs, and MNOS EEPROMs are
presented, with special emphasis on cell reliability and scaling guidelines.
These discussions should be of considerable help to students and profes
sionals alike.
Dr. Werner Weber and his colleagues at Siemens AG, Germany
present some useful discussions on transient hot-carrier effects, such as
the detrapping mechanism for AC degradation stressing. Dynamic degra
dation in CMOS logic circuits, such as inverters, transmission gates, and
ring oscillators is presented. In some simple cases, the hot-carrier-related
duty cycle is defined and employed to link the static lifetime to the dy
namic lifetime for the circuit reliability evaluation. The AC degradation
effects, however, are (at the present time) still focuses of some active
research or heated debates. The discussions here are, therefore, at best
preliminary, and more work is needed before we can fully understand and
characterize the effects.
In appendices, the possible velocity degradation effects in deep-submi
cron devices due to the nonlocal field effects are discussed, and possible
ways to attack the problem are presented. The reason for the success of
exponential models, i.e., lucky electron model or the like, in evaluating
the hot-carrier currents in semiconductor devices is also discussed here,
and is found to be primarily due to the statistical nature of the summation
process of all of the physical mechanisms, rather than to the exact nature
of the physical mechanisms themselves. Again, as in the field of AC
degradation effects, the work is preliminary and more research is needed
before we can fully understand and characterize the effects.
Cheng T. Wang
Torrance, California
Acknowledgments
I would like to thank the following reviewers who provided useful insights
and suggestions on the presentation ofthe materials: Greg Atwood, Intel;
Chi Chang, AMD; Brian Doyle, Digital; Cheming Hu, University of
California; Tiao- Yuan Huang, Xerox PARC; Tak Ning, IBM; and Don
Redwine, TI. Next, I would like to thank Steve Chapman of VNR, who
realized the importance of this subject and helped bring about this book.
Finally, special thanks are due to my father Yu-Chu Wang, my brother
Kems-Gwor Wang, and his family, who made this task possible in the last
two years.
ix
Contents
Dedication v
Preface vii
Acknowledgments IX
Chapter 1 The Mechanisms of Hot Carrier Degradation 1
P. Heremans, R. Bellens, G. Groeseneken,
A. v. Schwerin, W. Weber, M. Brox, and H. E. Maes
1.1 Introduction
1.2 Injection of Channel Hot Carriers in MOSFETs 3
1. 3 Characterization Techniques 21
1.4 Charge Trapping and Dit-Generation Under Uniform
Hot-Carrier Injection in MOSFETs 42
1.5 Charge Trapping and Dit-Generation Under
Nonuniform Hot-Carrier Injection in MOSFETs 58
1.6 Conclusions 111
1.7 Acknowledgments 113
References 113
Chapter 2 Hot-Carrier Degradation Effects for DRAM
Circuits 120
Charvaka Duvvury and Shian AlIr
2.1 Introduction 120
2.2 Hot-Carrier Degradation in MOSFETs 121
2.3 Hot Carrier Impact on Circuit Operation 126
2.4 Circuit Hot-Electron Effect Simulation 143
2.5 ESD Latent Damage and Hot-Electron Reliability 164
xi
xii Contents
2.6 Future Issues 167
2.7 Conclusions 168
2.8 Acknowledgments 169
References 169
Chapter 3 Hot Carrier Design Considerations in MOS
Nonvolatile Memories 172
Yoshiaki Kamigaki and Eiji Takeda
3.1 Introduction 172
3.2 Hot Carriers and EPROM 173
3.3 Hot Carriers and Flash Memory 197
3.4 Hot Carriers and Floating-Gate-Type EEPROMs 209
3.5 Hot Carriers and MNOS-Type EEPROMs 219
3.6 Conclusions 244
3.7 Acknowledgments 244
References 245
Chapter 4 Hot-Carrier Degradation During Dynamic
Stress 250
W. Weber, M. Brox, R. Bellens, P. Heremans,
G. Groeseneken, A. v. Schwerin, and H. E. Maes
4. I The Problem of AC Hot-Carrier Degradation 250
4.2 Discussion of Transient Effects 258
4.3 Dynamic Degradation in Circuits 279
4.4 Conclusions 308
References 309
Appendices 311
Appendix I On the Mathematical Formalism of the
Hot-Carrier Currents in Semiconductor Devices 312
Cheng T. Wang
A 1.1 Introduction 312
Al.2 Mathematical Formalism 313
A l. 3 Conclusion 317
References 317
Appendix II Non-Local Field Effects on Carrier Transport
in Ultra-Small-Size Devices 318
Chen!? T. Wan!?
A2.1 Introduction 318
Contents xiii
A2.2 Derivation of the Distribution Function f(c;,x) 319
A2.3 Drift Velocity as a Function of Distance 321
A2.4 A Comparative Study of Field Effect on Drift
Velocity 325
A2.5 Conclusion 328
A2.6 Acknowledgments 328
References 329
Index 331
