High-Level VLSI Synthesis

394 Pages·1991·17.29 MB·English

by  Daniel D. Gajski (auth.), Raul Camposano, Wayne Wolf (eds.)

HIGH-LEVEL
VLSI SYNTHESIS
THE KLUWER INTERNATIONAL SERIES
IN ENGINEERING AND COMPUTER SCIENCE
VLSI, COMPUTER ARClllTECfURE AND
DIGITAL SIGNAL PROCESSING
Consulting Editor
Jonathan Allen
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HIGH-LEVEL
VLSI SYNTHESIS
edited by
Raul Camposano
IBM
and
Wayne Wolf
Princeton University
~.
"
Springer-Science+Business Media, LLC
Library of Congress Cataloging-in-PubUcation Data
High-level VLSI synthesis I edited by Raul Camposano and Wayne Wolf.
p. cm. - (The Kluwer international series in engineering and
computer science. VLSI, computer architecture, and digital signal
processing)
Includes bibliographical references and index.
ISBN 978-1-4613-6771-0 ISBN 978-1-4615-3966-7 (eBook)
DOI 10.1007/978-1-4615-3966-7
1. Integrated circuits-Very large scale integration-Design and
construction-Data processing. 2. Computer-aided design.
I. Camposano, Rau!. 11. Wolf, Wayne Hendrix. III. Series.
TK7874.HS243 1991
621.39'S-dc20 91-12890
CIP
Copyright © 1991 by Springer Science+B usiness Media New Y ork
Originally published by Kluwer Academic Publishers in 1991
Softcover reprint of the hardcover 1s t edition 1991
All rights reserved. No part of this publication may be reproduced, stored in a retrieval
system or transmi tted in any form or by any means, mechanical, photo-copying, recording,
or otherwise, without the prior written permission of the publisher, Springer-Science+
Business Media, LLC.
Printed on acid-free paper.
Contents
Contributors vii
Preface ix
Raul Camposano, Wayne Wolf
1. Essential Issues and Possible Solutions in High-Level Synthesis 1
Daniel D. Gajski
2. Architectural Synthesis for Medium and High Throughput 27
Signal Processing with the new CATHEDRAL environment
Dirk Lanneer, Stefaan Note, Francis Depuydt, Marc Pauwels,
Francky Cat/hoor, Gert Goossens, Hugo De Man
3. PYSIN - High-Level Synthesis of Application Specific 55
Pipelioed Hardware
Albert E. Casavant, Ki Soo Hwang, Kristen N. McNall
4. The IBM High-Level Synthesis System 79
R. Camposano, R.A. Bergamaschi, C.E. Haynes,
M. Payer, S.M. Wu
5. MICON: Automated Design of Computer Systems 105
William P. Birmingham, Anurag P. Gupta, Daniel P. Siewiorek
6. Cyber: High Level Synthesis System from Software into ASIC 127
Kazutoshi Wakabayashi
7. Specification and Synthesis of Interface Logic 153
Gaetano Borriello
8. Synthesis of ASICs with Hercules and Hebe 177
David C. Ku, Giovanni De Micheli
9. Synthesis from Pure Behavioral Descriptions 205
Yukihiro Nakamura, Kiyoshi Oguri, Akira Nagoya
10. Architectural Optimization Methods for 231
Control-Dominated Machines
Wayne Wolf, Andres Takach, Tien-Chien Lee
v
vi
11. Global Scheduling and Allocation Algorithms 255
in the HAL System
Pierre G. Paulin
12. High-Level Synthesis in the THEDA System 283
Yu-Chin Hsu, Youn-Long Lin
13. Industrial Uses of the System Architect's Workbench 307
D.E. Thomas, T.E. Fuhrman
14. Unified System Construction (USC) 331
Alice C. Parker, Kayhan Kucukcakar,
Shiv Prakash, Jen-Pin Weng
15. Scheduling and Assignment in High Level Synthesis 355
Wolfgang Rosenstiel, Heinrich Kramer
Index 383
Contributors
Reinaldo A. Bergamaschi William P. Birmingham
IBM T.J. Watson Research Center University of Michigan
Yorktown Heights, NY Ann Arbor, MI
Gaetano BorrieUo Raul Camposano
University of Washington IBM T.J. Watson Research Center
Seattle, WA Yorktown Heights, NY
Albert E. Casavant Francky Catthoor
NEC Research Institute Inc. IMEC
Princeton, NJ Leuven, Belgium
Hugo DeMan Giovanni De Micheli
IMEC Stanford University
Leuven, Belgium Stanford, CA
Francis Depuydt Thomas E. Fuhrman
IMEC General Motors Research Laboratories
Leuven, Belgium Warren, MI
Daniel D. Gajski Gert Goossens
University of California IMEC
Irvine, CA Leuven, Belgium
Anurag P. Gupta Charles E. Haynes
Carnegie Mellon University IBMABS
Pittsburgh, P A Rochester, MN
Yu-Chin Hso Ki SooHwang
Tsing Hua University Hyundai Electronics Company
Hsin-Chu, Taiwan, R.O.C. Korea
Heinrich Kramer David C. Ku
Forschungszentrum Informatik Stanford University
Karlsruhe, Germany Stanford, CA
Kayhan Kucukcakar Dirk Lanneer
University of Southern California IMEC
Los Angeles, CA Leuven, Belgium
Tien-Chien Lee Youn-Long Lin
Princeton University Tsing Hua University
Princeton, NJ Hsin-Chu, Taiwan, R.O.C.
vii
viii
Kristen N. McNall Akira Nagoya
Synopsys Inc. NTT
Mountain View, CA Kanagawa, Japan
Yukihiro Nakamura Stefaan Note
NTT IMEC
Kanagawa, Japan Leuven, Belgium
Kiyoshi Oguri Alice C. Parker
NTT University of Southern California
Kanagawa,J apan Los Angeles, CA
Pierre G. Paulin Marc Pauwels
BNR IMEC
Ottawa, Canada Leuven, Belgium
Michael Payer Shiv Prakash
IBM T.J. Watson Research Center University of Southern California
Yorktown Heights, NY Los Angeles, CA
Wolfgang Rosenstiel Daniel P. Siewiorek
Forschungszentrum Informatik Carnegie Mellon University
Karlsruhe, Germany Pittsburgh, PA
Andres Takach Donald E. Thomas
Princeton University Carnegie Mellon University
Princeton, NJ Pittsburgh, PA
Kazutoshi Wakabayashi Jen-Pin Weng
NEC Corporation University of Southern California
Kawasaki, Japan Los Angeles, CA
Wayne Wolf Sau-MouWu
Princeton University IBMEDSDAI
Princeton, NJ Poughkeepsie, NY
Preface
The time has come for high-level synthesis.
When research into synthesizing hardware from abstract, program-like de
scriptions started in the early 1970' s, there was no automated path from the register
transfer design produced by high-level synthesis to a complete hardware imple
mentation. As a result, it was very difficult to measure the effectiveness of high
level synthesis methods; it was also hard to justify to users the need to automate
architecture design when low-level design had to be completed manually.
Today's more mature CAD techniques help close the gap between an automat
ically synthesized design and a manufacturable design. Market pressures encour
age designers to make use of any and all automated tools. Layout synthesis, logic
synthesis, and specialized datapath generators make it feasible to quickly imple
ment a register-transfer design in silicon,leaving designers more time to consider
architectural improvements. As IC design becomes more automated, customers
are increasing their demands; today's leading edge designers using logic synthesis
systems are training themselves to be tomorrow's consumers of high-level synthe
sis systems.
The need for very fast turnaround, a competitive fabrication market WhlCh
makes small-quantity ASIC manufacturing possible, and the ever growing co:n
plexity of the systems being designed, all make higher-level design automaton
inevitable.
This book gives a snapshot of today's research in high-level synthesis. Sir.ce
ihe number of groups contributing to the field has become quite large in rec~nt
years, covering all the important work is no easy task. Given the limited space
available, the editors necessarily had to omit important work. Furthermore, tinle
liness is extremely important in a fast-moving field. Thus, deadlines were quite
strict and prevented the inclusion of good work which required a little more time
to be written up, but we hope and believe this work is representative.
Mainstream, general purpose high-level synthesis systems are described in
the chapters by Rosenstiel and Kramer (U. Karlsruhe), Ku and De Micheli (Stan
ford), Hsu and Lin (Tsin Hua University), Nakamura, Oguri, and Nagoya (NTT),
and Wakabayashi (NEC). The chapter by Parker, Kucukcakar, Prakash, and Weng
(USC) also describes such a system, but focuses on more specialized tasks such as
performance prediction. Paulin's (BNR) and Borriello's (U. Washington) articles
also fall in this category, emphasizing their specific techniques, i.e., force directed
scheduling and the use of timing constraints. The paper by Thomas and Fuhrman
(CMU and GM Research Labs) describes their extensive experiments with with
ASIC synthesis using the System Architect's Workbench. Slightly more special-
ix
x
ized systems are IBM's HIS (Camposano, Bergamaschi, Haynes, Payer, Wu) and
Princeton's PUBSS (Wolf, Takach, Lee) geared towards control intensive appli
cations, in the first case processor-like designs, in the second case collections of
small, communicating finite state machines. Birmingham, Gupta, and Siewiorek
(U. Michigan and CMU) concentrate exclusively on processor boards to be build
from a catalog of existing chip-level components. Digital signal processing ap
plications are dealt with in articles by the IMEC group (Lanneer, Note, Depuydt,
Pauwels, Catthoor, Goossens, De Man) and by Casavant, Hwang, and McNall.
Last but not least, Gajski (UC Irvine) writes about essential issues in high-level
synthesis and some solutions stressing practicality. Many of the chapters in this
book describe the results of experiments with large, realistic examples, illustrating
how much the field has matured in the past few years.
In each chapter, the reader will find the description of the work of a group
that has contributed in some substantial way to the progress of high-level synthe
sis. Chapters (which are arranged in no special order) are broader in scope than a
typical conference paper. They emphasize major concepts and strategies. On the
other hand, they include reasonably detailed descriptions of important topics, giv
ing the reader an appreciation of the depth of the work. The articles focus on the
present status of the research, including a system description of the tools that have
been developed along with the key technical contributions and results. A novice
to the field thus will find a comprehensible introduction to the work being done.
The active researcher may use the book as a reference for the state-of-the-art in
high-level synthesis.
The book should be useful for two audiences: researchers who want to ana
lyze, compare, and contrast the latest work in high-level synthesis; and potential
users, both design tool developers and designers, who want to evaluate the possi
ble usefulness of the research efforts described.
Acknowledgements
The idea of this book was born at the 27th Design Automation Conference, in June
of 1990. Our major goal for this book was a timely presentation of the latest work
in the field, which put unusual demands on both the contributors and publisher.
We would like to express our sincere gratitude to the authors for their formidable
effort of preparing the material in such a short time. We also thank Carl Harris for
his constant support and the staff at Kluwer for their hard work.
Raul Camposano Wayne Wolf
Yorktown Heights, New York Princeton, New Jersey