High Frequency GaN Drain Supply Modulators for Radio-Frequency Power Amplifiers

205 Pages·2017·10.86 MB·English

University of Colorado, Boulder
CU Scholar
Electrical, Computer & Energy Engineering
Electrical, Computer & Energy Engineering
Graduate Theses & Dissertations
Spring 4-1-2015
High Frequency GaN Drain Supply Modulators for
Radio-Frequency Power Amplifiers
Yuanzhe Zhang
University of Colorado Boulder, [email protected]
Follow this and additional works at:https://scholar.colorado.edu/ecen_gradetds
Part of theElectromagnetics and Photonics Commons, and thePower and Energy Commons
Recommended Citation
Zhang, Yuanzhe, "High Frequency GaN Drain Supply Modulators for Radio-Frequency Power Amplifiers" (2015).Electrical,
Computer & Energy Engineering Graduate Theses & Dissertations. 128.
https://scholar.colorado.edu/ecen_gradetds/128
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High Frequency GaN Drain Supply Modulators for
Radio-Frequency Power Amplifiers
by
Yuanzhe Zhang
B.S., Zhejiang University, 2012
M.S., University of Colorado, 2014
A thesis submitted to the
Faculty of the Graduate School of the
University of Colorado in partial fulfillment
of the requirements for the degree of
Doctor of Philosophy
Department of Electrical, Computer and Energy Enineering
2016
This thesis entitled:
High Frequency GaN Drain Supply Modulators for Radio-Frequency Power Amplifiers
written by Yuanzhe Zhang
has been approved for the Department of Electrical, Computer and Energy Enineering
Dragan Maksimović
Zoya Popović
Date
The final copy of this thesis has been examined by the signatories, and we find that both the
content and the form meet acceptable presentation standards of scholarly work in the above
mentioned discipline.
iii
Zhang, Yuanzhe (Ph.D., Electrical Engineering)
High Frequency GaN Drain Supply Modulators for Radio-Frequency Power Amplifiers
Thesis directed by Professor Dragan Maksimović
Supply modulation, or envelope tracking (ET), is a system efficiency improvement technique
in radio-frequency (RF) transmitters where a power converter operating as drain supply modulator
(DSM)providesanRFpoweramplifier(RFPA)withtime-varyingenvelopewaveforms. DSMsneed
to have high bandwidth, low tracking error and high efficiency.
This thesis focuses on the design of the DSM using GaN-on-SiC technology for a 20 V ET
systemwithX-bandRFtransmitter. Thesignalsconsideredare20MHzOFDMand20MHzQPSK
with10Wpeakoutputpower. Thetopologychosenisamulti-phasepulse-widthmodulated(PWM)
buckconverter. Zero-voltageswitching(ZVS)techniqueisusedforhighefficiencyoperationathigh
switching frequencies. A fourth order output filter design method that supports ZVS operation is
proposed to accommodate both high bandwidth and high efficiency.
Monolithicgatedriverandhalf-bridgepower-stageintegrationisakeystepinaddressingchal-
lenges in 50-100 MHz buck converter design. An analytical loss model is developed and used to op-
timize the monolithic GaN chips, which are then used to construct high-efficiency, wide-bandwidth
synchronousbuckconverterprototypesimplementedasDSMs. Theconverterprototypesaretested
at various duty cycles and output power levels. The loss model and the design optimization results
are verified by experimental results. The tradeoffs in multi-phase converter design is also discussed
based on a total efficiency optimization method. Several multi-phase converter prototypes are
tested, analyzed and compared.
The resulting design shows record 97% efficiency at 10 MHz and 91% efficiency at 100 MHz.
Accurate tracking of a 20 MHz LTE (100RB) envelope signal is demonstrated with 89.7% power
stage efficiency and 83.3% total efficiency. Successful operation of the complete ET transmitter
system is demonstrated.
Dedication
To my beloved family.
Acknowledgments
I am deeply indebted to my advisor Prof. Dragan Maksimović. Every bit of his guidance
and support has become the fundamental of this work. He has also made tremendous effort in
organizing research projects and collaborations, providing funding and internship opportunities. I
appreciate all his contributions of time, expertise, ideas, feedback and encouragement to make my
Ph.D. experience productive and enjoyable. It is an honor to have studied with him.
I would like to thank the members of my thesis committee: Prof. Dragan Maksimović,
Prof. Zoya Popović, Prof. Robert Erickson, Prof. Khurram Afridi, and Dr. Miguel Rodríguez who
took time to read, evaluate and make valuable suggestions.
I am sincerely grateful to Dr. Miguel Rodríguez who has significantly contributed to the
work presented in this thesis. He also helped me start my research and offered valuable assistance
and inspiration along the way.
Research on envelope tracking would have been impossible without Prof. Zoya Popović,
Dr. David Sardin, Dr. Scott Schafer and other outstanding RF experts from the Microwave and
RF research group: Dr. Andrew Zai, Dr. Michael Litchfield, Dr. Leonardo Ranzani, Dr. Tibault
Reveyrand, Dr. Gregor Lasser, Mike Coffey, Ignacio Ramos, Tommaso Cappello, and Parisa Mo-
menroodaki. I especially appreciate the effort and time that Dr. David Sardin has shared during
the co-design and system evaluation phase.
Prof. Edward Kuester and Prof. Zoya Popović have greatly helped with my training in
microwave/RF.
Prior research on power amplifiers and supply modulators by Dr. John Hoversten and Dr.
vi
Mark Norris has helped a lot in this work.
Members of the research group–Alihossein Sepahvand, Dongxue Li, and Fan Zhang–must be
acknowledged for all the help in designing and testing MMIC chips and switchers.
Jarka Hladisova, Adam Sadoff, Laramie Rose, and Andrew Kuklinski have professionally and
efficiently handled many of the administrative and logistic aspects of the research and my graduate
education.
Dr. Chuck Campbell, John Hitt, Dr. Vipan Kumar, Maureen Kalinski, Cathy Lee, and
Dr. David Fanning at Qorvo (formerly TriQuint Semiconductor) have offered valuable technical
support, and helped with fabricating and packaging of the integrated circuits.
The work presented in this thesis is supported by the DARPA Micro-Power Conversion
(MPC) program.
The Department of Electrical, Computer, and Energy Engineering has also provided funding
in my first year of graduate research.
Dr. JohanStrydom,Dr. JohnGlaserandDr. AlexanderLidowofEfficientPowerConversion
Corporation (EPC) have created my exciting and valuable internship experiences with real-world
perspective.
It has been such a great pleasure to share the graduate education experience with past and
present members of Colorado Power Electronics Center. For their kind assistance in both academic
and life, I extend my sincere thanks to Kamal Sabi, Daniel Clement, Dr. Hien Hguyen, Dr. Daniel
Costinett, Dr. Alexander Brissette, Dr. Joshua Traube, Dr. Daniel Seltzer, Dr. Beom Seok Choi,
Dr.ScottJensen, Dr.HuaChen, FenglongLu, JieLu, YushiLiu, HyeokjinKim, PrasantaAchanta,
Saad Pervaiz, Ashish Kumar, Brandon Regensburger, Prof. Rui Ling, Dr. Aitor Vázquez, Xiaodong
Lu, Dr. Sutej Reddy, Luca Scandola, Friedrich Schultheiss, and Beatrix Weiss.
I would also like to thank my family for their support and love in every moment of my
life.
CONTENTS
CHAPTER
1 Introduction 1
1.1 Envelope Tracking Transmitter System . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Test Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 Thesis Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2 Drain Supply Modulator Design Theory 9
2.1 Basic DSM topologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Switching Converter as DSM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.2.1 Multi-Phase Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.2.2 Multi-Level Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.3 Switching Converter Output Filter Design . . . . . . . . . . . . . . . . . . . . . . . . 16
2.3.1 Solution Based on Approximation . . . . . . . . . . . . . . . . . . . . . . . . 19
2.3.2 Solution Based on Characteristic Function . . . . . . . . . . . . . . . . . . . . 21
2.3.3 Linearity Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3 Switching Converter Design Using GaN Power Devices 29
3.1 Device Technology Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.2 Device Size optimization for Synchronous Buck Converter . . . . . . . . . . . . . . . 36
3.2.1 Simple Loss Analysis in the Synchronous Buck Converter . . . . . . . . . . . 36
3.2.2 Optimum Device Size for Maximum Efficiency . . . . . . . . . . . . . . . . . 40
viii
3.2.3 Discrete Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
3.2.4 Power Stage Integrated Devices . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3.3 Synchronous Buck Converter Design Guidelines and Prototype Results . . . . . . . . 46
3.3.1 Control Signal Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.3.2 Discrete Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.3.3 PCB Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
3.3.4 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
3.4 Converter as Drain Supply Modulator . . . . . . . . . . . . . . . . . . . . . . . . . . 58
3.4.1 WCDMA Envelope with L-Filter . . . . . . . . . . . . . . . . . . . . . . . . . 59
3.4.2 LTE-12RB Envelope with ZVS Filter. . . . . . . . . . . . . . . . . . . . . . . 61
3.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
4 Monolithic Gate Driver Integrated Converter Design 66
4.1 GaN Analog IC Basics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
4.2 Three Half-Bridge Gate Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
4.2.1 Active Pull-Up Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
4.2.2 Bootstrapped Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
4.2.3 Modified Active Pull-Up Driver . . . . . . . . . . . . . . . . . . . . . . . . . . 78
4.2.4 Comparison of Integrated Gate Drivers . . . . . . . . . . . . . . . . . . . . . 81
4.3 Loss Modeling and Design Optimization . . . . . . . . . . . . . . . . . . . . . . . . . 82
4.3.1 Loss Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
4.3.2 Efficiency Optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
4.3.3 Efficiency Performance as a Function of Switching Frequency . . . . . . . . . 93
4.4 Integrated Level Translator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
4.5 Experimental Results. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
4.5.1 Chips with Integrated Gate Drivers . . . . . . . . . . . . . . . . . . . . . . . 100
4.5.2 Chip with Integrated Level Translator and Gate Drivers . . . . . . . . . . . . 107
ix
4.6 Converter as Supply Modulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
4.6.1 Integrated DSM Using Modified Active Pull-Up Driver . . . . . . . . . . . . . 113
4.6.2 DSM with Integrated Level Translator . . . . . . . . . . . . . . . . . . . . . . 117
5 Multi-Phase Design Tradeoffs 120
5.1 Ripple Cancellation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
5.2 Bandwidth Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
5.2.1 Sampling Theorem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
5.2.2 Switching Ripple Attenuation . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
5.3 Optimization of Multi-Phase DSM . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
5.3.1 Complete Design Optimization . . . . . . . . . . . . . . . . . . . . . . . . . . 127
5.3.2 Choice of Number of Phases for Existing GaN Chip . . . . . . . . . . . . . . 130
5.3.3 Simulation Verification of Multi-Phase DSMs . . . . . . . . . . . . . . . . . . 131
5.4 Prototypes and Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . 137
5.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
6 System Integration and Evaluation 150
6.1 Signal Split and Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
6.2 Updated Filter Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . 153
6.2.1 Issue with Fourth-Order Filter . . . . . . . . . . . . . . . . . . . . . . . . . . 153
6.2.2 Filter Output Impedance and PA . . . . . . . . . . . . . . . . . . . . . . . . . 157
6.2.3 Damped Second Order Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
6.2.4 Multi-phase Output Filter Impedance Considerations . . . . . . . . . . . . . 161
6.3 Demonstration of ET system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
7 Conclusion 168
7.1 Summary of Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
7.2 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173