Embedded System Design

174 Pages·09.475 MB·English

by  Frank Vahid, Tony Givargis

Embedded System Desig~
A Unified Hardware/Software Introduction
· Frank Vahid
Dep~ent ~f Corrtpuu{Scfon~ an4 Engineering
University of California, Riverside ·
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..; . Tony
Givargis
Depanmentof Infonnation and Computer Scien~
. . . Ulli".~ity <>f California, Irvine . .
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John \Viley & Sons, Inc.
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l To my world: Amy. Eric, Kelsi and Maya, and to the memory ofo ur
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sixth member, VahidAminian. --'- FV ·
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I To my family: Neli, Fredrick, Odet,.a nd Edvin. - TG
Copyright © 2002, 2003, 2004, 2005 Exclusive rights by John Wiley & Sons
(Asia) Pte. Ltd,, Singapore·f or manufa9t11re, anp e)!.119_rt,. This book cannot be re
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Copyright © 2002 by John Wiley & So. n$; Inc. All.. rights rese~ed. I
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Library of c_ongress Catawging-in Publication Data !
Vahid, Frank , ·' r ,
H4ra.W~/
Embedded System Design:: i.. Unified Software
.::-.:~.<
introduction I Frank Vahid, Tony Givargis
ISBN 9971-51-405~2 .
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Printed and bound in India by Replika Press Pvt: Ltd. Kuridli 13 l 028
109876
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:\ Preface
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,l Purpose
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Embedded computing systems have gr<>wn tremendously recent years, not only in their
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popularity, but also in'. their complexity: This coniple,ufydemands a new type cif designer, one
.i . who can easily cross the traditional borderbetw<ien' hardwaredesign and software design.
i ·After fuvestig~ting the availability' of:courses'lllld textbooks, we felt a new course .and
~ . accompanying textbook were necessary· tifintioduce.e mbedded coniputing system design
•.,1 using a lliiified view of software and hard\\'lire; This textbook portrays hardware and software
..1 not as different domains,· but :·rather as two mlplementation ·o ptions along a continuum of
l options varying ui thefrdesign metricsflike cost;:peiformance; power, size, and flexibility.
~ · · Three important treridS have 'riiade such a· uhified view posmble. First, integrated circuit
~ (IC) capacities rui:ve increased to the point ~t both software processors and custom hardware
a
;! ' processors now ~rnnionly cod:ist on smg!e'It:'Second,quality compilers and-program size
\l. increases have led to the conunon use ofprocciisor~independent C, C++; and Java compilers
and ··integrated idesign ' eilWoiurients · 1(Il)Es) in' embedded system ' design, significantly
/j decreasing the importance of the· focus.o n microprocessor internals· and assembly language
~stem courses
:1 programming that dominate most existing embc;dded and textbooks: Third,
r1 ·syn*eSiS . teclmology has ~an~ ;JC) ;the,, ip!)iilt: $at synthesis .( OOlS . have ·b ecome
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!1 ·. c ommonpla~ in the d~ign :~f .d,igitalJ1iµd~iµ-e:_; SyrithesiJ; tools achieve nearly the same for
i\ .• hardware de~ign 'as co~il~rfacbJey~.J~:~flw~:des~gn;)'hey allow the designer to describe
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desireit fwtcµ<>.naijty in',. a-Wih~1~e1, pi::<1gram.miijg.~ g\lage; and they .t hen automatica11y
k,1 .gel:!:€rate ~ effi~ie,qt -~~~to,Jn~),la¢wiµ-e. pr~r -implementation. The firsttrend inakes the
J · past,separation ofs<>ftw~e: 3114, har,4~M,e;!f~gr,;neaI'ly)ntpossibk Fortunately; tbe second
~ ' ancf third trends enable tbeir ,lJJJ.ifi¢ d"'5igP,; bY.-l!lrnil!g embedded system design. atits highest
·~ . Jevel; into.t he probl ent ofs e,lectj11.g _lµld pn;igraimning (for so,ftware), designing (for hardware),
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Preface
(software). custom single-pw-pose processors (hardware), standard single:purpose processors
(peripherals). and so on. But nevertheless, they are all just processors, differing in their cost,
Introduction to Logic/Digital
po:wer.perl'ormance. design time, flexibility, and so on; but-essentially doing the same thing. PJ:Qgramming ~ign
Chapter I provides an overview of embedded systems and their design challenges. We .,, ....
introduce custom single-purpose processors in Chapter 2, emphasizing a top-down technique
to digital design amenable to synthesis, picking up where many textbooks <?PAi~~I deliil:lll
leave off. We introduce general-pw-pose processors and their use in Chapter 3; expecting this
chapter to· be mostly review for many readers, and ending by showing how to design a
general-purpose processor using the techniques of Chapter 2. Chapter 4 describes numerous
s(?,!IQi!!d sin.gle-pµrp<1se processors (peripherals) common in embedded systems. Chapters 5
and 6_ introduce memories and interfacing concepts; respectively, .to complete the fundamental
knowledge necessary to build basic embedded systems. Chapter 7 provides a digital camera
example. showing how we can trade off among hardware, software, and peripherals to
achieve implementations that vary in their power, perl'ormance, and size: 'These seven
. chaptei:sJonn the core. oft his book. _ .
·:·,.··. .f r~/ ~r9!ll. the: necessity 9f c:o".ering ,the,. ajtty,~gritty detail~, of. a particular
'-.~n \icropJ'~s~or; ~ in,te~s and assembly langua.ge pr.9gra,numng, .tltis bQQ~ includes coverage .,·.i: ..: . .... '. /'.·
fuodem
.. ,,.,· . ;.9f.;~09,i~,'.a~diti_qrui!, eipqedded systems,t 9pic;s. _Chapter 8 _<!~~bes: a$i~ced state· machine ' those courses shift away from assembly-level programming to the use ofmore tools
; computiltion,models,that,are becoming popular when descn~.mgc:omple;ic·emlx:dded system . and to tlie 'mtegration ·of. microprocessors and, custc,m: hardWate"'(e:g:?FPGAs)_ In other
.··,·:·:~-~ha~ior:·:fai~\ ntrod~ces the concurrent process model and real-time sysJems. Chapter 9 curtic:ula; :a new :course on embedded,· systems may. be necessarf;' we 'obsetve:tiiat numerous
. ' ,_.gh;~s a :b~ic' introduction to control systems, enough to make.stuck;nts aware that a rich universities areiii!foduCing such courses, often convertiiig'a second coufse in digital design to
·- ·· ";, ifie9cy,e ,.:fsis ro r s.ontrol system~, and_t o enable ,stµdents ~Q. determiAe. when an:e mbedded . a oourse 9n einbedd¢d systems (as We ;did at UC::R); The book'coulahlso be used in a capstone
.. ,--~;:sfomis' a1i,exampfoofa qmtrol system. Chi!Pter \0,-intr<>d\l~~ a variety,of popular IC senipr,design·to~·as a text that brings tqgether and; organizeii'niucb ·of whafmidents may
. . techrihlogies.'fron{ which adesigner may ch9ose for systemjmplementation. Finally, Chapter have beyn'exposed ,lo:already -such courses ·often do not:evetiiliave;~;textbocik: The book
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1. .h ighlights sarious design technologies for. buil_ding, ernbe4ged ,.systems, including should ·atso be use,W at the graduate level for an introductory embedded systems course.
. ·. . •· . :,iji;c~~sion pf )lar~ware/soft~~~ codesign, a user's introductjo(!. tQ:syµJhesis (from behavioral . ·-. 'i ' : ·. .. ;:,.' .:_\;'" :,:{::(.-<:, ~\:.;·[·;(.-:\ ·,-.:"°';._
,. . \ciqi:ni ciJogic level.s), and the major trend to.ward de!i/gn. based Qn il}teilectuaJ property (IP). l..~bon!!<>iY. .; / ,.;, -,
~ •·,. - .... ,· :-.:-. . • .:...s,: .. · • • ' - . . ' • i
Jdeajly; :a:touise using this book ·should have :ari accompanyibglaboratofy)'.Jkideal lab setup
•· I · would1iriCludi:°boih:software development.o n an embedded miciopro&ss'ot or inicrocootroller
. , ·.r <We use tliis bookafthe _U ni\'ersity .of California;;Riverside; in-ii_~rie~uarter course called I1. . 'platform aruf hardware''development on · ari' FPGA platfomi,r(ot 'even: 'in a 'simulation
·i'lritrodiiCtiori to-Embedded Svstems: wliich follciws'our"iritroductory course •ciri: logic design,
... ,,,,,, ,;::;--;',; <:]iid' 'i\'hicli ·,f a takeri·bFa ll tontpUler sdence;·:c:omputer 'engineering, :'arid iielitrical engineering j . ·.t~~;::~~oiially ¢reated this book to be_·_: mdepe:~~:t.~o;;; :y· .~~:~·~or.
<'- :'.,:. ear~y
!0St uaents>al'roughly the sopliomore JeveL This 1>lace1I1ent,'ofthe;oouise'in o~r'clllrictilum •i ::one reason is·because 'embedded system: tools and:p~oc1ucts hl'e evo1viligTc11>idlFiJci;;;w e
· ':t sdrc:prcscnts"'ciiir :belief'tha[ an earl}' unified Niew "ofh aidwarc 'antl i software 'can. be very ;j •;··-considet':the.abilityXto_•change'·lab· eqvironinerits,\Vi.thout:baviiigi:to>cbangettextbooks an
.·,··. , ..•.; .·tx:·iie!icial,toa,student's •mindset' when··tafor takingimofe" specializecfcburses:-;The'suggested ,j •impo,rtimf biie.•Asecond reason is because the embedded system field has'evolved ·sufficiently
·~ '.,.cdplace~cnF'6I the course: in' a.it ilildetgraduafoturriciullim 'isI~tio'\VrViriiFigureP. l: C>ur one-· 1 '.;:·\t_o warrant_.r>a 1.f>o_'-o·k1'based ,on ',principles. How_· ever, !a;;-cours_e _ .;Withca_·,cfunds.io' o<_ lab may
_: ,,quarter)c;oursc covers, Chapters: 1-,,7.' Wdiave a•:s&orid quarter oourse'oi{embeddedsystems ~;~ ' 'Silpplemerit this:oookwith a ,processor.:specifo:·databook; :whi.cli is typically low cost or eveil
that covers -~hapters -·s -12. supplemented with a . textboolc ron: · reati.time ··systems. A ·! ··, ,, _•· free;,, or -witfr orte 'of. ,many ,c ommonly available, ,i•extendoo->datatxx,lt)pfuces'Sor-specific
·one0scmester course might cover Chapters l-7 plus two or three additional chaptt;rs of the. ;j
1, instructor's choice.· · {'1i}f,!o;;}.'> · ' ·:,'1:;'.:. . :: •.._ ,'_t~~~t~'t .: ~~:bt~:·;n~epend~~t··-~f-·:~y··'~~;.~W'•~on-·•'Ianguage,
:1II·i :::~i1UI~iri~!~l~!-iS:~J1=~tiE9:l~::; •• . synthesis tool, simulator, •of: FPGA. .. Supplements that. desctibc:Y,the•-·pamcwar·:bardware
;J environment, again usually available fot free or at low cost, may be useful_
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•'Pr~tice . Preface
About the Authors
At UCR,. our labs are based on the 805 L microcontroller.and Xilinx FPGAs. We use the
Keil C compiler for the microcontrollei", Xilinx f'.oiirii:fatioit·Ejq>ress synthesis software for the I Frank Vilhid is an Associate Professor in the Department of Computer Science and
FPGA, and a~~elopm.ent board from·Xess Co.· iwfatfo." rifofpfotdtyping-the board ~o. ntains Engineering at the University of California, Rivenside, which he joined in 1994. He is also a
both an 805Land lilt FPGA. We also use an 8051.einulator and stand-alone 8051 chips from .··Ii f?Culty member of the Center for Embedded .Computer Systems at the University of·
Philips . . . . .. . California,· Irvine. He received his B.S. in Computer Engineering from the University of
We have provided extensive information onour lab setup and assignments on the book's l Illinoi~, UrQana/Champaign, and his MS. and Ph.D. degrees in Computer Science from the
Web page: Thus, while the book's microprocei,sor independence enables instructors to choose University of <;alifotnia, Irvine, where he was recipient of the Semiconductor Research
any lab environment, we have sti_ll prciv/4¢ instructors the option of obtaining extensive Corpcrat.ion Graduate Fellowship. He was an engineer at Hewlett Packard and has consulted
an
Online assi~s--t-a---n·· cejn developing accompanyi~g laboratory, for nUmerous companies,.i ncluding NEC -~d Mot!-)rola. He is co-author of the ~uate-level
. . . ' :· ;., textbookSpec{fication and Design of Embedded Sy_stems (Prentice-Hall, 1994). He has been
...• Adtti"iio11a1Matena1s
1.:' •. ... · program chair and general chair for both the Inteniafional Symposium on System Synthesis
A.; cl> 'Jage has been established to 'tie used' dn )~onjunction · with the book: and for the International Symposium on Hardware/Software O;xlesign. He has been an active
·'tittp:liwww.cs.ucr.edu/esd. This Web page contains supplementary maierialand links for researcher in.embedded system design since 1988, with more than 50 publications and several
best papei-\awards, including an IEEE Transactions on VLSI best paper award in 2000. His
eac;h c:bilpter. It also contains a setof1~1Jre sl\4es inf\1ic:wspf(PowerPoint fofillllt; because · .
the book itself was done entirely in Microsoft Word," the 1'gures in the PowerPoint slides are research .interests are in einbedded system architectures, low-power design, and design
I methods for syste111-on-a-chip.
. ~owerPoint drawings (rather than imported gnlphics), and .thtis can be modified as desired by
-mstructors-:,· ...·, . •, ·- . ·· -·., -.,.. ·.-.···.··· ..... ,.. .. . ,.,. ...· ,··. .. ... , .. ·. ··· .,. ,
., · :: . f ~~~6r~, the .W ~b page c~~t.tin~ an•i xttn~iveJab0;rri~,um. to accompany this I Tony Givargis is.a n Assistant Professor in the Department of Infonnatiqn and Computer
, Science and a member cif the Center for Embedded Computer Systems at the University of -
.text.b :__:o _9k, ~e_I"_ 30 _la b e_xercises_,_ 1_·n du4_i:,n_ig ,de.Jail_~,. 4e_s·c. . _.n_ · p tion__.. ~ ;,S..C h eQta. tics, and co~plete.o r .,
pru:(lil,I soh1t19ns, ·c an be fo.und there ..1 1i.e ewfqses.i~e prgaiµzed by· c~pter,.s tartrng with . California,.l rvit!e;He.received his B.S. and Ph.D ..d egrees .from the Univ~ ofCalifomia,
Riverside; where-he received the Department of Computer Science Best Thesis award and the
2v_'e,srye._ x~ejn~.: P:__1 1 ~e__ • ,_sext_ae,.rrc·tiw.~1t.. han a_d s ~u-·en apdlineg bt_honl cpi:irJ__o_. ggf.·-l~i.gss\l-kjv;~.,m!rc,Jm, _.e_._ Pn _.• !_ i~,_,~~.1:,9t~.-hm. P..a. '_. .s.. e xo_·d . __Qa.n ._c ~m-acF.·l o_u._nree_ ~_cpo.llel_tr.o_l' leCrh aanpdte ar •·1 UCR~le_g~ofEn~(;¢ring Outstanding Student award, and where he was recipient of the
· calculator: Appendix A provides fuJ1her information on.our Web page ..· ' II · GAANN Grad11ate .fellowship, a MICRO fellowship, and a Design Automation Conference
.. Ack~Jtv,~d~~ents' •. .· . ...•..• . ' .. ' ' .. . .. .• .· . .. . •.· . scholarsliip. As a consultant, he has developed numerous embedded systems for several
companies; ranging !from an irrigation management system to a GPS-guided, self-navigating
· automobile. He h~'published more than 20 research.papers in the embedded systems field.
We ar~ g~tetul to nu~~rous indfviduals ~or their ~si~ce in _developirif ~1s book. Shar~n ., His research interests include embedded and real-time system design, low power design, and
·... · f·lµr,o (;~Notre E.Pame,t.N;il<l~l Put~t o(lJ~G lryldlle;,M~4 $111=J.t11.,.l;!=~bi o;f U=C ·Pav;isr anud Syn,ph:c1:ty J .. proce5$or/system'-on-a-chip architectures.
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~~~t:f!~~~~%:tt!~i!::i::~:~~a~it;;~~r~:a~tJ ·
.._ J9yer~~4e (;()ntributed mu~h ·q f thed~pter .o!),<;011trol sy$tem,s., Karen Jicl;iechter,< ;onyerted our ·• ·
WP
.. ·. ·\.',Oyeraes/~ jd~ t,.11e irtiJ.i;tl 3_.,D scepe; ~ e,.gepei_o~;4W¥1ti.QttS'..9f ~Q5 L~uip!);lent from .
... Pamti~ ,..Seijucondµctors. and of FPOA <;quip,roent,Jro01 .Xiliilx,-were ;a big assistance-".
. Lilcewjse/ a National Science. Fqund!ltio11 CAR.E;iiR .fiWar,d. supppn,ed •some· of tl.lis book's :I
J
.. ,cJeve!9p1lle11t.,We thank Caroline Sieg .at Wj,ley,: f<>r,over~ipg ,$<; .·l)wk 's -pro<luction and
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··••·. M adel.y.1n Le;sur:e =for o~verse:ei:ngr thi~ tco~ver d;~i~gn. ;Fiil-@..Y:; ,t'\Y:.!'u:~u;e id~_pl;y(gr:at·:€fu~l- .t·o·f-~ail'l. i·
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"THIS .BOOK IS FOR SA.LE: ONLY IN THE COUNTRY TO WHICH IT IS FIRST CONSIGNED .
BY JOHN WILE"'.,& SONS (ASIA) PTE LTD AND MAY NOT BE RE-EXPORTED" .
Contents
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Contents
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. ''· :\is0enfi~~tio/ !1: ·. \
9 Superscalar and VLIW Architectures
More Productivity Improvers 61
3.4 Programmer's View
Trends· j . 61
19 Instruction Set
1.6 Trade-offs J, . :,;··· 62
Program and Data.Memory Space
Design Productivity Gap _27. 64
Registers
L 7 Summary and Book Outlin~ .• 24 I/0 , 64
j
I. 8 Re rences and Further Reading · 25 65
Interrupts
25 a 65
J Ex.ample~ Assembly-Language Programming ofDevice·Drivers
. . --~ -Single=-Purpose Processors:Hardware ·29 · 66
~~ Operating System · · ·
29 i 67
~ I 3. 5 · Development Environment
· .2 Co mational Logic 30 Il 69
Design Flow arid Tools
Tran . tors andLogic Gates ··,.;,. 30 ' 69
£~ample: Instruction-Set Simulator for a Simple Proces'sor
B 1c Combinational Logic Design 32 J 71
Testing and Debug}iing, .. ·
. T-LeveLCombin~tional Components .. ,,.,. 33 l 71
2.3 · 1 :sequential Logic .3 4 l1 3.6 · Application-Specific Instruction-Set Processors (ASIPs) 74
Microcontrollers ·
· 34 i 74
Flip~flops,/ .' , . .. . .
35 I Digital Signal Processors (DSP)
'"RT~te:vel,'Sequential Components 75
Less-General ASIP Environments
75,
:__--~-,.Js~e·q;·~u·.ien~t~ia·~.1~L~o~~ic·~D~e~s~i~n~.·;~·..i -;;~:·;·.···;·.'·.~·.··~~/~·,~~:"~·)>;:•::::-~ ~;36 , 3. 7 ~?'·--selecting a~Microprocessor ····· ··
- ~ Custom Single-Purpose Processor De~rgn ··.'"· ·· ·, , ··' 38 ,!. 75
j 3. 8 .. General~Pu~~b-se Processor Des1g°*
2.5 RT-Level Custom Single;.Pu ose,Proce . . 44 77
.. ttmtzmg ·nstom Singl¢"'Prirpose Processors :.<-. · 4 7 i 3.9 Sumrhary•:0 • • - : · 80
Optimizing·the Origina!)Prograh1''' · · . • . 4 7 ! 3. JO Refer~nces and Further Reading · . 80
_ 3) I Exefdises ·. :- >. -~ >':. ·· · . . . •.· .
Optintizirig the FS~ . . . . . .. . . :~ !_· 4:,·' 81.-
_91APTER Stand~rfSirigle~Purpose Processors: Periph~rals
Optimjzingthe Datapath 83
.r-;'.,i•'. 4. I Introduction· · ·. · ··
Optimii:jpg tge FSM 'Y:' ·· 83
42 Timers, C::ou~ , and Watchdog 'I;'imers
2.7 -Suttimary 84
Timers and
2.8 'References and Further Reading•, . 84
87
. ·~TE:;~t~i]i~iieral~;~~bii;f:~i~~:;;~s:>~oft:~~~,-;~:, .._, ,h;i; ,.· 88
3.1 Introduction · ·· ·' ·· ., · · · ·· . . . .. 89,
3. 2 ·c Architecture . . ·-' i -1 90
D ath .. Pulse Width Modulators· 92
i1t;ol Ulli(f/ '.· t~n~·: ,. ,:"~·- i-· 92
~;;;C ontrolling a D~-~otorUsinga PWM~- , ,· ,:·
Memory 94
4.5 LCDControllers .. .
·. 3.3 · 0 ration . 95
Overview 95
Inst ction Exe.cution
Example: LCD,lnitializafiori'';;'
~ipeliriirig - · · · . 9977
4. 6 Keypad Controllers
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~nterits Conteni!: .
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4.7 Stepper Motor Contro.Uers .:. 9988 The Basic DRAM 130
Overview . l.,, : Fast Page Mode DRAM(FPMDRAM) 131
Example: Using a Stepper Motor Driver . 99 Extended Data Out DRAM (EDO DRAM) · 132
Example: Controlling a Steppe~MotorDirectly 1.01 J Synchronous (S) and Enhanced Synchronous (ES) DRAM ~ -----r32
4.8 Analog-to-DigitalOmverters 110023 ; · Rambus DRAM (RDRAM) ' · 133
Example: Successive Approximation j1 • DRAM Integration Problem lJ3
4.9 Real-Time Clocks · · · l 05 Memory Management Unit (MMU) 134.
4,10 :~ummary . . ,, . . \'. ,;,. ·< 106 ~ 5.7 Summary · · · 134
4. 11 References and Further Readirtg 106 ·! · 5.8 References and Further Reading . 135 .
~T:.J.'.
4.12 Exercises ... 107 Exercises 135
109 _•.!,;_, : _
~TER 5: . _M~n10ry. y1'!_~TER 6: Interfacing .· 137
5. l Jntroduction ..•• !1!0 !9 · ~-,: · 6.1 , Introduction . . . 137
J
5 .2 Memory Write Ability and·S torage,Rermanence. 6.2 Communication Basics 138
Write AbHity _,. · >' . . , . . ,J Basic Terminology 138
Storage Perni;mence 112' ii Basic Protocol Concepts . . . 140
Trade-offs ,·. ... ' 112 ~ -· · Example: The ISA Bus Protocol_;M~mory Access . . 141
on 1' \ ,-,.,,. ~·-
5.3 · C9 Memory'Type( ,, ,,-'.t ,: "· 11. 1122 1:'1 ; •• · 6.3 Microprocessor Interfacing: 1/0 Addressing .. . 144
Intro ction to "Read-Only" M~mqcy;'""; ROM 11 Port and Bus-Based 1/0 144
\I
sk-Programmed . . . _. .. . . .. 114 Memory-Mapped 1/0 and Standard 1/0 145
i ·
TP ROM - 0 . -Tiµie P~ogr~able ROM 114 Exaip.ple: 'the ISA Bus Protocol -Standard 1/0 14T
EPROM ~ . sabfe Prqgi~ab.!iJ.lOM. 115 lJ · · · Example: A Basic Memory Protocol 147
. EEPRO Electrically Erasable Programmable ROM . 1 J6 iJ .··. Example: A Complex Memory Protocol· 148
Flash.;.:.; e,:nt>ry .. _~l> _·;, --~-..~ ·-,·-;· 117 j 6.4 Microprocessorfnterfacing: Interrupts . 148
1 •
In du'ctiontoRead-WriteMemory-RAM .. 118 J · 6.5 Microprocessor Interfacing: ])i{ectMemory Access 153
i
-'-Static' R,.. AM _.- . · 119 Example: DMA 1/0 and the lSABus Protocol 158
DRAM - Dynamic llAM.. .·. 120 ; . 6.6 · Arbitration · 159
n
PSRAM ~Pseudo~StatfoRAM · •:: ., . 120 Priority Arbite~ . : ; 160
- ------,- ..... NVRAM ~ .:t{onv.:olat~~~.-,: . _. . _ . 120J -·· ·_· · · Daisy.;Chain .Arbitration 160
-·- .. Example: ·fil4p+64 ~d. ~?C~~B."R.::1\W~PM D~v1ces.· 120 li. .•..· Network-Oriented Arbitration Methods' · 162 .
\ Example: TC55V~}25FF~l00 Memory Device !;~ :~·~ :-.- ~ 6-~-fx=a1~:~~5·t~~z~:m=~l=~~iiiMti1: ~li~5!s~ga~n -1~·01~.:Fu~pt~tab~le =_= ~~~!:~;~~-~~'.~
SA Composing Me~ory · · ,;;,:::•\; , ·
· 55 Me_mory llierarchy and Cache· 125 ~ 6.8 · Advanced ConimunicationPrinciples 166
·, Cc1che MapPing:Techniqu.es .. :,_;,·. :; ., , , 126 l .· · Parallel Communication. 166
Cach¢.:Replacement Policy ·. '' , 128 ·,:_;_· ·-:;_<.;. .· Serial Commi,mication 166
Cache:Write Techniques · .-,·> 128,; ·•·' Wireless Communication 167
Cliche lmpacton System PerfornHW.~ :,fo:i,: · 128 .ti ,;,: :, Layering 16~
S.6 •·.· J\dvanc~d RAM. · ;.,~;nc,n,\· '' · · 130 Error Detection and Correction I 68
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l
6. 9 Serial Protocols 169 l .. · ·,.
I2c ! 8.J An Introductory Examp e .. _ .· .· . . .· 2Hf
169 ,1 , 8.4 A Basic State N.f"achfoe Mo'del:;·Finite:State Machines 211'
CAN 171 .,l 8.5 Finite-State Machine' With 'Datapath M6dei:.F SMI) 213·· ..·
s. /· ·. FireWire · 172; 8.6 · Using State Machines .. .· · · ·
USB 172; · · · 213
6.10 Parallel Protocols 173 i · DCoesmcpriabriinngg aS tSaytest Meina cahsi na eS atantde SMeqauch~innteia l Program M.o .d e.l s . 221144
PCIBus
173 ; Capturing State Machines in Sequentfal Progra.·m .. ming Language 215
· ARMI3us 173• · ·
8. 7 HCFSM and the Statech__ a rts Lan81_Jage ·· 217
6.11 Wireless Protocols 174
8.8 Program-State Machine Model'&,SM) .• . 220
IrDA 174' . 8.9 The Role ofan AppropriateModehmd Language · · 221 ·
Bluetooth lMJ · ·
. IE~2.ll . 174. .. 8.10 Concurrent Process Moqel .222
· 8.11 1 Concurrent Processes 225
~ . Summary . .. . , .. 176. Process Create and Terminate 226 ·
6.13 References and Further Readmg 76
1 ·• Process 'Suspend and Resume · · 227
~A6.P 14T ~REx 7e:r ci·sPe!sg italCamera Example 117769 ;_aI Process Join 227 ·
8~"12 Communication among Processes 227
7.1 Introduct1cm .. .. .. • . , ·' .· . · . · 179 • S_hared Memonr . · · ..
227
7.2 Introduction to a Simple Digital .Camera 118709 i: Message Passi'nJg 231 ·
User's Perspective .
8.13 Synchi.onization among Processes·- . 232
Designer'sPei"spectiv~. 18.0 ·.
· Condition Variables 233
7.3 Requirements Specification 18.5 '
Monitors 235
~ . Nonfunctional Requireroents 186. ,
8.14 Implementation . . .. . . 236
Inf~rmal Functional Specification · 187 · _Creatin·g· a.nd Terminating Proce.sses 236
· Refined Functional Specifica!ion ·· 187'
'1111·111 . 7.4I mpleDmeesnigtant ion 1: Microcontroller Alone 119954;:_. . JSouisnp_in engd ai: nPgr oacneds sR esu·. min_··· _g 9 Process.e.s · ., 223389 ·.
1,! · Scheduling Processes . 239
Ii . . Implementatjon 2: Microcontroller and CCDP:P . . 195 i . :/. 8.15 Dataflow Model 241
Implementation 3:Micro.conttoller ancJ GCDPP/F1xed".'Pomt DCT
I - ...- ---·-:--: Implementation 4: MicrocontmllerandCCpPP!DCT 240030;i -·~, c · 8.16_ Real-Time Systems 242
. 7.5 Summary:· ,.· · . \:- . . 205; Windows CE 242
1·.
i ·_· __ . :~::.x~ .. .7 . 6 References and Further Reading 2osi QNX 243
!I . 205. ! 8.17 Summary . . . 241
i ~~TEi~~rcis~;~te' Madhine and ConcurrentPmcess MCldels .. 207 i. ' ,, 8':'18 · 'I{efererices and FurtherReadirig 244
; '°~.19 Exercises i44
8.1 Introduction · · ·.. . · . . , ·· . · · 2°0....7 i · ·,:~.:,. CRAPTER 9: Control Systems 245
·8 .2¥ od·e Miso vdse:l sL ·~a_ns.g Luaagneg~u a, g· es;T. ex.t vs.. ,Graphics :22099;·:.:. '.'\~ 9.1 · Introduction . · ··:;,.o · ~/!/;.s rst~ts:·,·.··· . ·224465 .·
. t'e'>ctual Languages vi{ Graphical Languages 21o 1 u2:: · 92CNe~~z;i~~op and ,~iosed-1:°oP,1
246
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. -S-f:in-'-,,!t..:..T-'--i-•. :_._. :.. .- _:.___ ____- --,---------':-::-:--:--::-:---:-------:----,----,---'----- 1
I
A First Example: An Open-LooRA.utom.opi!~.~rµi~ ~pntroller 248 · ..· Temporal and Spatial Thinking
3A S..e. ~nd Example: A Clo~~L,Qqlp?.AIPu t9mobite(:ruise_Controller 251 ~ 11.3 Verification: I:Iardware/Software Co-Simulation 229956
.9 . General Cp_ntrol •S yst~mf~d. ~,opfrq~lers .· :.: ' 256 •· · Formal Verification· and Simulation
Control Objectives ... . . . . . _-·,i< . 256 Simulation Speed 296
298
· Modeling Real Physical Systerµs. : 257 Hardware-Software Co-Simulation
299
ControHerDesign . ,. ; , , _., _..· .. : •< 258 ; Emulators
301
9A .. SQftwwe Coding ofa PII) Co11troller 261 11 .4 Reuse: Iittelle·ctual Property Cti>res
.301
<{5 ' PIO Tuning ,' , _. , : , , _ ·.. .> i ,. . .. . 262 . Hard, soft and firm cores . . 302
9.6 Practical Issu~sJlel,a(~,t.<> 9>ffiP!lter~B~ C9ntrol 263 ·_ New Challenges Posed by Cores to Processor Providers 302
QAuliaanstii:nzga tion a· nd ·O. ·· v· er·f l·o ~-·E · f· fe· ~s ·, . .. ·· · ·· 263 New Challenges Posed by Cores to Processor Users 303
264 11. 5 · Design Process Models
304
Computation Delay .. _ . _ , . 265 11.61 · S.ummary 306
9.7 Benefits of Computer-Bas~ (:~nt~ol ,Illplement~tions 265 r I, 7 Book Summary
307
Repeatability, Reproducability, ,11~:~!lpi.l~ty," · 266 , 11.8 References and Further Reading
307
Programmability 266 11.9 Exercises ·
308
9.8 Summary .· .._ ._ , .. , . 266 APPENDIX A: Online Resources
311
9.9 References and Further Reading 266 A. l -Introduction 311 .
9.10 Exercises 267 , A.2 Summary of the ESD Web Page 312
-CHAPTER 10: lC Techtio~o,gy , .·· 269 A.3--- Lab Resources
<f' 312
10.1 ·. Introduction 269 Chapter 2 j - 312
10.2 Full~Custom (VLSI) IC Technology 273 I Chapter 3. 314
10.3 Semi-Custom (ASIC) I(; Technology , , 276 Chapter4: _ 314
I
Gate Array Semi-Custom ICTe~hno!9gy . , 216 Chapter 5/ 315
Standard Cell Semic.CustorncJ¢ Ti_~[lQl<>gy~, : .,·, .... ',, 276. i Chapter6 315
i
. 10.4 . Programmable Logic Device (PLO) IC J~il[lology;.;,:;;. 277_ Chapter7
I 315
10.5 Summary . . 280 I · A.4 ·AbouttheBook Cover 315-
'I 0.6 References and Further Reading 2so , Outdoors . . 1 _315
· 10.7 Ex~rcises ·-- _____.. : . .... · - ··· ·Indoors
.316
CHAPTER 1 L Design Technology .:,· · · Index ·319
11.l Introduction ·
~.ff.1•·..··• ·· .
ll.2 Automation: Synthesis .··,,:-•·. -; . . 282 .•
''Going up": The Parallel .E:vgJµ_tiorl,of(;.o_mp,il;tiiov,an4 -Sfnthesis 282 ·
. S}'nthesis.Levels . .:::_~;·i.>~..: ' /:·! ·0- '- ;2:8{5 i:·
. Logic Synthesis -~= ..:.:-: ,· •· · \"
Register-Transfer Synthesis ,;:\·;::.··: ·::,.: ·
·. · Behavioral$yQtgesi$.,., . ·; ,,,:·.. (i)e:,,•.,_,L; ;:,o,i'., ,.;-'; .... vsr;\'.:C . : .
293
System Synth~sis· a~d H~rdia~~/Software Cociesignv<; ),,c ,J: 2941:_-.i_
i•
Embedded System Design ...x xr ... ,-·. ...
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