Early Verification of the Power Delivery Network in Integrated Circuits by Nahi Abdul Ghani A thesis

137 Pages·2011·5.73 MB·English

Early Verification of the Power Delivery Network in
Integrated Circuits
by
Nahi Abdul Ghani
A thesis submitted in conformity with the requirements
for the degree of Doctor of Philosophy
Graduate Department of Electrical and Computer Engineering
University of Toronto
Copyright c 2011 by Nahi Abdul Ghani
(cid:13)
Abstract
Early Verification of the Power Delivery Network in Integrated Circuits
Nahi Abdul Ghani
Doctor of Philosophy
Graduate Department of Electrical and Computer Engineering
University of Toronto
2011
The verification of power grids in modern integrated circuits must start early in the de-
sign process when adjustments can be most easily incorporated. We adopt an existing
early verification framework. The framework is vectorless, i.e., it does not require input
test patterns and does not rely on simulating the power grid subject to these patterns.
In this framework, circuit uncertainty is captured via a set of current constraints that
capture what may be known or specified from circuit behavior. Grid verification becomes
a question of finding the worst-case grid behavior which, in turn, entails the solution of
linear programs (LPs) whose size and number is proportional to the size of the grids. The
thesis builds on this systematic framework for dealing with circuit uncertainty with the
aim of improving efficiency and expanding the capabilities handled within. One contri-
bution introduces an efficient method based on a sparse approximate inverse technique
to greatly reduce the size of the required linear programs while ensuring a user-specified
over-estimation margin on the exact solution. The application of the method is exhibited
under both R and RC grid models. Another contribution first extends grid verification
under RC grid models to also check for the worst-case branch currents. This would re-
quire as many LPs as there are branches. Then, it shows how to adapt the approximate
inverse technique to speed up the branch current verification process. A third contri-
bution proposes a novel approach to reduce the number of LPs in the voltage drop and
branch current verification problems. This is achieved by examining dominance relations
ii
among node voltage drops and among branch currents. This allows us to replace a group
of LPs by one conservative and tight LP. A fourth contribution proposes an efficient
verification technique under RLC models. The proposed approach provides tight conser-
vative bounds on the maximum and minimum worst-case voltage drops at every node on
the grid.
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Acknowledgements
First and foremost, I am greatly thankful to Professor Farid N. Najm, the best advisor
one could have ever hoped for. Without his enthusiasm and continuous guidance and
support, thedevelopmentofthisworkwouldnothavebeenpossible. Hissuperbtechnical
leadership and mentorship is something I aspire to achieve, and his great efforts has made
me a better researcher and a better person overall.
Thank you Professor for pushing me and thank you for providing me with such a
unique experience that I will always cherish.
I would also like to thank Professors Jason Anderson, Tony Chan Carusone, Andreas
Veneris, and Jianwen Zhu from the ECE department at the University of Toronto, as
well as Dr. Sani R. Nassif from International Business Machines (IBM) for reviewing
this work and for providing me with constructive comments.
Sari Onaissi, my colleague and one of my best friends, deserves a special mention. I
thank him for all the good times we had inside as well outside the lab. I also want to
thank him for the long but fruitful discussions we had, particularly in regard to the work
presented in Chapter 5.
I am also grateful to Imad Ferzli for his friendship and support. Thank you Imad for
giving me pointers that helped me grasp various problems in better ways. Thank you for
all the long hours of discussions and all the wise words. I will never forget that. I will
also never forget our numerous Toronto adventures.
Many thanks go to Khaled Heloue for his advice and assistance, and his many at-
tempts to help me crack the most difficult research problems. Also, I would like to thank
Hratch Mangassarian for all the funny moments we had.
Of my friends at the University of Toronto, I would like to thank Mehmet, Ankit,
Maryam, Meric¸, Imad Azzam, Chady, Abhishek as well as my office mates in Pratt
building, room 392, for contributing to a great and pleasant work place. I wish you all
the best.
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The road to my graduate degree have been long and tough and would not have been
possible without the support of my father Hayel, and mother Amn´e. Thank you for all
the support and patience and I hope I made you proud. I am forever indebted to you.
And to Golnaz, I say thank you for you patience and love, and above all for always being
there for me during this journey. You are my best friend and companion, and I would
not be the same without you.
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Contents
List of Tables ix
List of Figures xi
1 Introduction 1
1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.3 Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2 Power Grid Model and Background 9
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 The Power Grid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2.1 R and RC Power Grid Models . . . . . . . . . . . . . . . . . . . . 11
Time Discretization . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2.2 RLC Power Grid Model . . . . . . . . . . . . . . . . . . . . . . . 13
Time Discretization . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.2.3 Choice of Time Step . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.3 Power Grid Verification . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.3.1 Vector-Based Power Grid Verification . . . . . . . . . . . . . . . . 18
2.3.2 Vectorless Power Grid Verification . . . . . . . . . . . . . . . . . . 24
2.3.3 The Constraints-Based Vectorless Framework . . . . . . . . . . . 26
vi
Current Constraints Overview . . . . . . . . . . . . . . . . . . . . 26
Arriving at the Constraints . . . . . . . . . . . . . . . . . . . . . 29
Previous Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3 Grid Verification Using an Approximate Inverse Technique 33
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.2 Problem Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
3.3 Checking the Node Voltages . . . . . . . . . . . . . . . . . . . . . . . . . 38
3.3.1 Inverse Approximation Method (SPAI) . . . . . . . . . . . . . . . 40
3.3.2 An Upper Bound Vector . . . . . . . . . . . . . . . . . . . . . . . 41
Stopping criterion . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Upper bound . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.4 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
3.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
4 Branch Current Verification 57
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
4.2 Problem Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
4.3 Checking the Branch Currents . . . . . . . . . . . . . . . . . . . . . . . . 61
4.3.1 Upper and Lower Bounds . . . . . . . . . . . . . . . . . . . . . . 61
4.3.2 Efficient Current Bounds Computation . . . . . . . . . . . . . . . 63
4.4 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
4.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
5 Grid Verification Using Node and Branch Dominance 75
5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
5.2 Using Dominance Relationships . . . . . . . . . . . . . . . . . . . . . . . 76
5.2.1 Hyperplane Dominance and Alignment . . . . . . . . . . . . . . . 76
5.2.2 Overview of Approach . . . . . . . . . . . . . . . . . . . . . . . . 80
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5.2.3 Computing Normalized Dot Products . . . . . . . . . . . . . . . . 81
5.2.4 The Dominance Algorithm . . . . . . . . . . . . . . . . . . . . . . 83
5.3 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
5.4 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
6 Power Grid Verification Under an RLC model 90
6.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
6.2 Problem Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
6.2.1 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
6.3 Checking the Node Voltages . . . . . . . . . . . . . . . . . . . . . . . . . 96
6.3.1 Grid Transformation . . . . . . . . . . . . . . . . . . . . . . . . . 96
6.3.2 Upper and Lower Bounds . . . . . . . . . . . . . . . . . . . . . . 98
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Bounds on Voltage Drops that are r∆t Steps Apart . . . . . . . . 99
Bounds in the Steady State . . . . . . . . . . . . . . . . . . . . . 103
Convergence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
6.3.3 The Upper and Lower Bound Algorithm . . . . . . . . . . . . . . 108
6.4 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
6.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
7 Conclusion and Future Work 118
Bibliography 121
viii
List of Tables
3.1 Speed comparisons of modified SPAI with the exact approach (R grids) . 52
3.2 Speed comparisons of modified SPAI with the exact approach (RC grids) 54
4.1 Speed and accuracy comparisons of branch current verification using mod-
ified SPAI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
5.1 Speed and accuracy Using Node Dominance . . . . . . . . . . . . . . . . 87
5.2 Speed and accuracy Using Branch Dominance . . . . . . . . . . . . . . . 88
6.1 Speed comparison of the proposed RLC approach with the exact approaches111
6.2 Accuracy comparisons of the proposed RLC approach with the exact ap-
proaches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
6.3 Runtime breakdown of the proposed RLC approach . . . . . . . . . . . . 113
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List of Figures
1.1 A simple RLC power grid . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Currentswitching patternsleading to 50mV drop and to a voltage overshoot. 4
1.3 Current switching patterns leading to 60mV drop and to no voltage over-
shoot. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 The RC grid model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2 The RLC grid model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.3 Hierarchical power network analysis . . . . . . . . . . . . . . . . . . . . . 20
2.4 Flow diagram of a vectorless stochastic approach . . . . . . . . . . . . . . 25
2.5 Simplified flow of power grid verification based on timing windows . . . . 26
3.1 Structure of G−1 for a 100-node power grid . . . . . . . . . . . . . . . . . 39
ˆ
3.2 Q for the 100-node power grid . . . . . . . . . . . . . . . . . . . . . . . . 50
3.3 Accuracy of modified SPAI on a 21,099-node R power grid . . . . . . . . 51
3.4 CPU time of modified SPAI versus the number of grid nodes (R grids) . 53
3.5 Accuracy of modified SPAI on a 21,099-node RC power grid . . . . . . . 53
3.6 CPU time of modified SPAI versus the number of grid nodes (RC grids) . 55
4.1 An example current waveform . . . . . . . . . . . . . . . . . . . . . . . . 59
4.2 A sample row in matrix D . . . . . . . . . . . . . . . . . . . . . . . . . . 64
4.3 CPU time of modified SPAI versus the number of grid branches (RC grids) 72
x