Dual, 1MSPS, 16-/14-/12-Bit, 4x2 or 2x2 Channel, Simultaneous Sampling ADCs

51 Pages·2016·1.35 MB·English

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ADS8363,ADS7263,ADS7223
SBAS523D–OCTOBER2010–REVISEDSEPTEMBER2017
ADSxxx3 Dual, 1-MSPS, 16-, 14-, and 12-Bit, 4×2 or 2×2 Channel, Simultaneous Sampling
Analog-to-Digital Converter
1 Features 3 Description
• EightPseudo-orFourFully-DifferentialInputs The ADS8363 is a dual, 16-bit, 1-MSPS analog-to-
1 digital converter (ADC) with eight pseudo- or four
• SimultaneousSamplingofTwoChannels
fully-differential input channels grouped into two pairs
• ExcellentACPerformance: for simultaneous signal acquisition. The analog inputs
– SNR: are maintained differentially to the input of the ADC.
93dB(ADS8363) The input multiplexer can be used in either pseudo-
differential mode, supporting up to four channels per
85dB(ADS7263)
ADC (4x2), or in fully-differential mode that allows to
73dB(ADS7223)
convert up to two inputs per ADC (2x2). The
– THD: ADS7263 is a 14-bit version and the ADS7223 is a
–98dB(ADS8363) 12-bitversionoftheADS8363.
–92dB(ADS7263)
The ADS8363, ADS7263, and ADS7223 offer two
–86dB(ADS7223)
programmable reference outputs, flexible supply
• DualProgrammableandBuffered2.5-V voltage ranges, a programmable auto-sequencer,
ReferenceAllows: data storage of up to four conversion results per
– TwoDifferentInputVoltageRangeSettings channel, andseveralpower-downfeatures.
– Two-LevelPGAImplementation All devices are offered in a 5-mm x 5-mm, 32-pin
• ProgrammableAuto-Sequencer VQFNpackage.
• IntegratedDataStorage(upto4perchannel)for
DeviceInformation(1)
Oversampling Applications
PARTNUMBER PACKAGE BODYSIZE(NOM)
• 2-BitCounterforSafetyApplications
ADSxxx3 VQFN(32) 5.00mmx5.00mm
• FullySpecifiedOvertheExtendedIndustrial
(1) Forallavailablepackages,seethepackageoptionaddendum
TemperatureRange:–40°Cto+125°C
attheendofthedatasheet.
2 Applications
FunctionalBlockDiagram
• MotorControl:CurrentandPositionMeasurement
AVDD DVDD
includingSafetyApplications
• PowerQualityMeasurement
CHA1P/CHA3
• Three-PhasePowerControl CHA1N/CHA2
Input
CHA0P/CHA1 SAR ADC CS
• ProgrammableLogicControllers CHA0N/CHA0 Mux CLOCK
• IndustrialAutomation CMA REF1 InSteerrfiaacle BUSY
SDI
• ProtectionRelays REF2 and
CHB1P/CHB3 FIFO RD
CHB1N/CHB2 SDOA
Input
CHB0P/CHB1 SAR ADC SDOB
Mux
CHB0N/CHB0
CMB
REF1
M0
String 2.5V Control
REFIO1 M1
DAC REF Logic
REF2 CONVST
String
REFIO2
DAC
RGND AGND DGND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.
ADS8363,ADS7263,ADS7223
SBAS523D–OCTOBER2010–REVISEDSEPTEMBER2017 www.ti.com
Table of Contents
1 Features.................................................................. 1 8.3 FeatureDescription.................................................19
2 Applications........................................................... 1 8.4 DeviceFunctionalModes........................................24
3 Description............................................................. 1 8.5 Programming...........................................................26
8.6 RegisterMaps.........................................................34
4 RevisionHistory..................................................... 2
9 ApplicationandImplementation........................ 42
5 DeviceComparisonTable..................................... 4
9.1 ApplicationInformation............................................42
6 PinConfigurationandFunctions......................... 4
10 PowerSupplyRecommendations..................... 45
7 Specifications......................................................... 6
11 Layout................................................................... 46
7.1 AbsoluteMaximumRatings......................................6
11.1 LayoutGuidelines.................................................46
7.2 ESDRatings..............................................................6
11.2 LayoutExample....................................................47
7.3 RecommendedOperatingConditions.......................6
12 DeviceandDocumentationSupport................. 48
7.4 ThermalInformation..................................................6
7.5 ElectricalCharacteristics:General............................7 12.1 DocumentationSupport........................................48
7.6 ElectricalCharacteristics:ADS8363.........................9 12.2 RelatedLinks........................................................48
7.7 ElectricalCharacteristics:ADS7263.........................9 12.3 ReceivingNotificationofDocumentationUpdates48
7.8 ElectricalCharacteristics:ADS7223.......................10 12.4 CommunityResources..........................................48
7.9 SwitchingCharacteristics........................................11 12.5 Trademarks...........................................................48
7.10 TypicalCharacteristics..........................................14 12.6 ElectrostaticDischargeCaution............................48
12.7 Glossary................................................................48
8 DetailedDescription............................................ 18
13 Mechanical,Packaging,andOrderable
8.1 Overview.................................................................18
Information........................................................... 49
8.2 FunctionalBlockDiagram.......................................18
4 Revision History
ChangesfromRevisionC(January2017)toRevisionD Page
• Changedoperatingtemperaturefrom85°Cto125°CinRecommendedOperatingConditionstable................................... 6
ChangesfromRevisionB(January2011)toRevisionC Page
• AddedDeviceInformationtable,ESDRatingstable,RecommendedOperatingConditionstable,Feature
Descriptionsection,DeviceFunctionalModessection,ApplicationandImplementationsection,PowerSupply
Recommendationssection,Layoutsection,DeviceandDocumentationSupportsection,andMechanical,
Packaging,andOrderableInformationsection...................................................................................................................... 1
• ChangedADS8363/7263/7223toADS8363,ADS7263,andADS7223throughoutdocument............................................. 1
• ChangedDescriptionsection:changedlastsentenceoffirstparagraphandlastparagraph ............................................... 1
• ChangedDeviceComparisonTabletitle................................................................................................................................ 4
• ChangedPinConfigurationandFunctionssectiontitle.......................................................................................................... 4
• ChangedfootnoteofFigure1andforclarity........................................................................................................................ 12
• ChangedsecondandthirdcolumnsofMidscale–1LSBrowinOutputDataFormattable:changed–V to–2V
REF REF
incolumn2,changedlasttwovoltagevaluesincolumn3.................................................................................................. 26
• ChangedfootnoteofFigure31............................................................................................................................................ 27
• ChangedfootnoteofFigure32............................................................................................................................................ 28
• ChangedfootnoteofFigure33............................................................................................................................................ 29
• ChangedfootnoteofFigure34............................................................................................................................................ 30
• ChangedfootnoteofFigure35............................................................................................................................................ 31
• ChangedfootnoteofFigure36............................................................................................................................................ 32
• ChangedfootnoteofFigure38............................................................................................................................................ 34
• ChangedfootnoteofFigure40............................................................................................................................................ 36
• Changed1FFhto3FFhinbits9-0descriptionofREFDAC1ControlRegisterandREFDAC2ControlRegister................37
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ChangesfromRevisionA(December,2010)toRevisionB Page
• Revisedtestconditionsforgainerrorparameter................................................................................................................... 9
• Revisedtestconditionsforgainerrorparameter................................................................................................................... 9
• Revisedtestconditionsforgainerrorparameter................................................................................................................. 10
• UpdatedCONVSThightimespecification............................................................................................................................ 11
• RevisedCONVSTsection.................................................................................................................................................... 20
• RevisedModeIIsection....................................................................................................................................................... 28
• RevisedSpecialReadModeIIsection................................................................................................................................. 29
• RevisedFully-DifferentialModeIVsection........................................................................................................................... 31
• RevisedSpecialModeIVsection......................................................................................................................................... 32
• AddedCONVSTsectioninADS8361Compatibility............................................................................................................. 43
ChangesfromOriginal(October,2010)toRevisionA Page
• AddedRDhightime(t )parametertoTimingCharacteristicstable.................................................................................... 11
3
• UpdatedFigure1.................................................................................................................................................................. 12
• RevisedRDsectioninADS8361Compatibility.................................................................................................................... 43
• Addedt timingtracetoFigure48........................................................................................................................................ 45
3
• DeletedFour-WireApplicationTimingRequirementstable................................................................................................. 45
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5 Device Comparison Table
PRODUCT RESOLUTION NMC INL SNR THD
ADS8363 16bits 16or15bits(1) ±3or±4LSB(1) 93dB(typ) –98dB(typ)
ADS7263 14bits 14bits ±1LSB 85dB(typ) –92dB(typ)
ADS7223 12bits 12bits ±0.5LSB 73dB(typ) –86dB(typ)
(1) SeetheElectricalCharacteristicstable.
6 Pin Configuration and Functions
RHBPackage
32-PinVQFN
TopView
D D D D A
B A N D N D O
M M G V G V C D
C C A A D D N S
2 1 0 9 8 7 6 5
3 3 3 2 2 2 2 2
CHB1P/CHB3 1 24 SDOB
CHB1N/CHB2 2 23 BUSY
CHB0P/CHB1 3 22 CLOCK
CHB0N/CHB0 4 21 CS
Thermal
CHA1P/CHA3 5 Pad 20 RD
CHA1N/CHA2 6 19 CONVST
CHA0P/CHA1 7 18 SDI
CHA0N/CHA0 8 17 M0
0 1 2 3 4 5 6
9 1 1 1 1 1 1 1
1 2 D D D C C 1
O O N N D N N M
FI FI G G V Not to scale
E E R A A
R R
PinFunctions
PIN
NAME NO. TYPE(1) DESCRIPTION
AGND 12,30 P Analogground.Connecttoanaloggroundplane.
AVDD 13,29 P Analogpowersupply,2.7Vto5.5V.DecoupletoAGNDwitha1-μFceramiccapacitor.
Converterbusyindicator.BUSYgoeshighwhentheinputsareinholdmodeandreturnstolowafterthe
BUSY 23 DO
conversioniscomplete.
CHA0N/CHA0 8 AI Fully-differentialinvertinganaloginputchannelA1orpseudo-differentialinputA0
CHA0P/CHA1 7 AI Fully-differentialnoninvertinganaloginputchannelA1orpseudo-differentialinputA1
CHA1N/CHA2 6 AI Fully-differentialinvertinganaloginputchannelA1orpseudo-differentialinputA2
CHA1P/CHA3 5 AI Fully-differentialnoninvertinganaloginputchannelA1orpseudo-differentialinputA3
CHB0N/CHB0 4 AI Fully-differentialinvertinganaloginputchannelB0orpseudo-differentialinputB0
CHB0P/CHB1 3 AI Fully-differentialnoninvertinganaloginputchannelB0orpseudo-differentialinputB1
CHB1N/CHB2 2 AI Fully-differentialinvertinganaloginputchannelB1orpseudo-differentialinputB2
CHB1P/CHB3 1 AI Fully-differentialnoninvertinganaloginputchannelB1orpseudo-differentialinputB3
(1) AI=analoginput,AIO=analoginput/output,DI=digitalinput,DO=digitaloutput,DIO=digitalinput/output,P=powersupply,NC=
notconnected.
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PinFunctions (continued)
PIN
NAME NO. TYPE(1) DESCRIPTION
Externalclockinput.Therangeis0.5MHzto20MHzinhalf-clockmode,or1MHzto40MHzinfull-clock
CLOCK 22 DI
mode.
CMA 31 AI Common-modevoltageinputforchannelsAx(inpseudo-differentialmodeonly).
CMB 32 AI Common-modevoltageinputforchannelsBx(inpseudo-differentialmodeonly).
Conversionstart.TheADCswitchesfromsampleintoholdmodeontherisingedgeofCONVST.Thereafter,
CONVST 19 DI
theconversionstartswiththenextrisingedgeoftheCLOCKpin.
Chipselect.Whenthispinislow,theSDOx,SDI,andRDpinsareactive;whenthispinishigh,theSDOx
CS 21 DI
outputsare3-stated,andtheSDIandRDinputsareignored.
DGND 28 P Digitalground.Connecttodigitalgroundplane.
DVDD 27 P Digitalsupply,2.3Vto5.5V.DecoupletoDGNDwitha1-μFceramiccapacitor.
M0 17 DI Modepin0.Selectsanaloginputchannelmode(seeTable5).
M1 16 DI Modepin1.Selectsthedigitaloutputmode(seeTable5).
NC 14,15,26 NC Thispinisnotinternallyconnected.
RD 20 DI Readdata.SynchronizationpulsefortheSDOxoutputsandSDIinput.RDonlytriggerswhenCSislow.
REFIO1 9 AIO Referencevoltageinput/output1.Aceramiccapacitorof22µFconnectedtoRGNDisrequired.
REFIO2 10 AIO Referencevoltageinput/output2.Aceramiccapacitorof22µFconnectedtoRGNDisrequired.
RGND 11 P Referenceground.Connecttoanaloggroundplanewithadedicatedvia.
Serialdatainput.Thispinisusedtosetupoftheinternalregisters,andcanalsobeusedinADS8361-
SDI 18 DI
compatiblemanner.ThedataonSDIareignoredwhenCSishigh.
SDOA 25 DO SerialdataoutputforconverterA.3-statewhenCSishigh.
SDOB 24 DO SerialdataoutputforconverterB.ActiveonlyifM1islow.3-statewhenCSishigh.
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7 Specifications
7.1 Absolute Maximum Ratings
overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1)
MIN MAX UNIT
Supplyvoltage,AVDDtoAGNDorDVDDtoDGND –0.3 6 V
Supplyvoltage,DVDDtoAVDD 1.2×AVDD(2) V
AnalogandreferenceinputvoltagewithrespecttoAGND AGND–0.3 AVDD+0.3 V
DigitalinputvoltagewithrespecttoDGND DGND–0.3 DVDD+0.3 V
Groundvoltagedifference|AGND-DGND| 0.3 V
Inputcurrenttoanypinexceptsupplypins –10 10 mA
Maximumvirtualjunctiontemperature,T 150 °C
J
Storagetemperature,T –65 150 °C
stg
(1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings
only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended
OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.
(2) ExceedingthespecifiedlimitcausesanincreaseoftheDVDDleakagecurrentandleadstomalfunctionofthedevice.
7.2 ESD Ratings
VALUE UNIT
Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±2000
V Electrostaticdischarge V
(ESD) Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±500
(1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess.
(2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess.
7.3 Recommended Operating Conditions
overoperatingfree-airtemperaturerange(unlessotherwisenoted)
MIN NOM MAX UNIT
AVDD Analogsupplyvoltage 5 V
DVDD Digitalsupplyvoltage 3.3 V
Operatingtemperature –40 125 °C
7.4 Thermal Information
ADS8363,ADS7263,ADS7223
THERMALMETRIC(1) RHB(VQFN) UNIT
32PINS
R Junction-to-ambientthermalresistance 33.3 °C/W
θJA
R Junction-to-case(top)thermalresistance 29.5 °C/W
θJC(top)
R Junction-to-boardthermalresistance 7.3 °C/W
θJB
ψ Junction-to-topcharacterizationparameter 0.2 °C/W
JT
ψ Junction-to-boardcharacterizationparameter 7.4 °C/W
JB
R Junction-to-case(bottom)thermalresistance 0.9 °C/W
θJC(bot)
(1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication
report.
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7.5 Electrical Characteristics: General
AllminimumandmaximumspecificationsatT =–40°Cto+125°C,specifiedsupplyvoltagerange,VREF=2.5V(int),and
A
t =1MSPS(unlessotherwisenoted).TypicalvaluesareatT =+25°C,AVDD=5V,andDVDD=3.3V.
DATA A
PARAMETER TESTCONDITIONS MIN TYP MAX UNIT
ANALOGINPUT
(CHxxP–CHxxN)orCHxxto
FSR Full-scaleinputrange –V +V V
CMx REF REF
V Absoluteinputvoltage CHxxxtoAGND –0.1 AVDD+0.1 V
IN
C Inputcapacitance CHxxxtoAGND 45 pF
IN
C Differentialinputcapacitance 22.5 pF
ID
I Inputleakagecurrent –16 16 nA
IL
PSRR Power-supplyrejectionratio AVDD=5.5V 75 dB
SAMPLINGDYNAMICS
Half-clockmode 17.5
t ConversiontimeperADC t
CONV CLK
Full-clockmode 35
Half-clockmode 2
t Acquisitiontime t
ACQ CLK
Full-clockMode 4
f Datarate 25 1000 kSPS
DATA
t Aperturedelay 6 ns
A
t match ADCtoADC 50 ps
A
t Aperturejitter 50 ps
AJIT
Half-clockmode 0.5 20
f Clockfrequency MHz
CLK
Full-clockmode 1 40
Half-clockmode 50 2000
t Clockperiod ns
CLK
Full-clockmode 25 1000
INTERNALVOLTAGEREFERENCE
Resolution ReferenceoutputDACresolution 10 Bits
Over20%to100%DACrange 0.2V V
REFOUT REFOUT
V Referenceoutputvoltage REFIO1,DAC=3FFh 2.485 2.500 2.515 V
REFOUT
REFIO2,DAC=3FFh 2.480 2.500 2.520
dV /dT Referencevoltagedrift ±10 ppm/°C
REFOUT
DNL DACdifferentiallinearityerror –4 ±1 4 LSB
DAC
INL DACintegrallinearityerror –4 ±0.5 4 LSB
DAC
V DACoffseterror V =0.5V –4 ±1 4 LSB
OSDAC REFOUT
PSRR Power-supplyrejectionratio 73 dB
I Referenceoutputdccurrent –2 +2 mA
REFOUT
Referenceoutputshort-circuit
IREFSC current(1) 50 mA
t Referenceoutputsettlingtime C =22μF 8 ms
REFON REF
VOLTAGEREFERENCEINPUT
V Referenceinputvoltagerange 0.5 2.5 2.525 V
REF
I Referenceinputcurrent 50 μA
REF
Externalceramicreference
C 22 μF
REF capacitance
(1) Referenceoutputcurrentisnotinternallylimited.
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Electrical Characteristics: General (continued)
AllminimumandmaximumspecificationsatT =–40°Cto+125°C,specifiedsupplyvoltagerange,VREF=2.5V(int),and
A
t =1MSPS(unlessotherwisenoted).TypicalvaluesareatT =+25°C,AVDD=5V,andDVDD=3.3V.
DATA A
PARAMETER TESTCONDITIONS MIN TYP MAX UNIT
DIGITALINPUTS(2)
I Inputcurrent V =DVDDtoDGND –50 +50 nA
IN IN
C Inputcapacitance 5 pF
IN
Logicfamily CMOSwithSchmitt-Trigger
V High-levelinputvoltage DVDD=4.5Vto5.5V 0.7DVDD DVDD+0.3 V
IH
V Low-levelinputvoltage DVDD=4.5Vto5.5V –0.3 0.3DVDD V
IL
Logicfamily LVCMOS
V High-levelinputvoltage DVDD=2.3Vto3.6V 2 DVDD+0.3 V
IH
V Low-levelinputvoltage DVDD=2.3Vto3.6V –0.3 0.8 V
IL
DIGITALOUTPUTS(2)
C Outputcapacitance 5 pF
OUT
C Loadcapacitance 30 pF
LOAD
Logicfamily CMOS
V High-leveloutputvoltage DVDD=4.5V,I =–100µA 4.44 V
OH OH
V Low-leveloutputvoltage DVDD=4.5V,I =+100µA 0.5 V
OL OH
Logicfamily LVCMOS
V High-leveloutputvoltage DVDD=2.3V,I =–100µA DVDD–0.2 V
OH OH
V Low-leveloutputvoltage DVDD=2.3V,I =+100µA 0.2 V
OL OH
POWERSUPPLY
AVDDtoAGND,half-clockmode 2.7 5.0 5.5
AVDD Analogsupplyvoltage V
AVDDtoAGND,full-clockmode 4.5 5.0 5.5
3-Vand3.3-Vlevels 2.3 2.5 3.6
DVDD Digitalsupplyvoltage V
5-Vlevels,half-clockmodeonly 4.5 5.0 5.5
AVDD=3.6V 12.0 16.0
AVDD=5.5V 15.0 20.0
AVDD=3.6V,sleepandauto-
0.8 1.2
AIDD Analogsupplycurrent sleepmodes mA
AVDD=5.5V,sleepandauto-
0.9 1.4
sleepmodes
Power-downmode 0.005
DVDD=3.6V,C =10pF 1.1 2.5
LOAD
DIDD Digitalsupplycurrent mA
DVDD=5.5V,C =10pF 3 6
LOAD
Powerdissipation(normal AVDD=DVDD=3.6V 47.2 66.6
P mW
D operation) AVDD=5.5V,DVDD=3.6V 86.5 117.0
(2) Specifiedbydesign;notproductiontested.
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7.6 Electrical Characteristics: ADS8363
AllminimumandmaximumspecificationsatT =–40°Cto+125°C,specifiedsupplyvoltagerange,VREF=2.5V(int),and
A
t =1MSPS(unlessotherwisenoted).TypicalvaluesareatT =+25°C,AVDD=5V,andDVDD=3.3V.
DATA A
PARAMETER TESTCONDITIONS MIN TYP MAX UNIT
RESOLUTION
Resolution 16 Bits
DCACCURACY
Half-clockmode –3 ±1.2 +3
INL Integralnonlinearity LSB
Full-clockmode –4 ±1.5 +4
Half-clockmode –0.99 ±0.6 +2
DNL Differentialnonlinearity LSB
Full-clockmode –1.5 ±0.8 +3
V Inputoffseterror –2 ±0.2 +2 mV
OS
V match ADCtoADC –1 ±0.1 +1 mV
OS
dV /dT Inputoffsetthermaldrift 1 μV/°C
OS
Referencedtothevoltageat
G Gainerror –0.1% ±0.01% +0.1%
ERR REFIOx
G match ADCtoADC –0.1% ±0.005% +0.1%
ERR
Referencedtothevoltageat
G /dT Gainerrorthermaldrift 1 ppm/°C
ERR REFIOx
CMRR Common-moderejectionratio BothADCs,dcto100kHz 92 dB
ACACCURACY
SINAD Signal-to-noise+distortion V =5V at10kHz 89 92 dB
IN PP
SNR Signal-to-noiseratio V =5V at10kHz 90 93 dB
IN PP
THD Totalharmonicdistortion V =5V at10kHz –98 –90 dB
IN PP
SFDR Spurious-freedynamicrange V =5V at10kHz 90 100 dB
IN PP
7.7 Electrical Characteristics: ADS7263
AllminimumandmaximumspecificationsatT =–40°Cto+125°C,specifiedsupplyvoltagerange,VREF=2.5V(int),and
A
t =1MSPS(unlessotherwisenoted).TypicalvaluesareatT =+25°C,AVDD=5V,andDVDD=3.3V.
DATA A
PARAMETER TESTCONDITIONS MIN TYP MAX UNIT
RESOLUTION
Resolution 14 Bits
DCACCURACY
INL Integralnonlinearity –1 ±0.4 +1 LSB
DNL Differentialnonlinearity –0.5 ±0.2 +1 LSB
V Inputoffseterror –2 ±0.2 +2 mV
OS
V match ADCtoADC –1 ±0.1 +1 mV
OS
dV /dT Inputoffsetthermaldrift 1 μV/°C
OS
Referencedtothevoltageat
G Gainerror –0.1% ±0.01% +0.1%
ERR REFIOx
G match ADCtoADC –0.1% ±0.005% +0.1%
ERR
Referencedtothevoltageat
G /dT Gainerrorthermaldrift 1 ppm/°C
ERR REFIOx
CMRR Common-moderejectionratio BothADCs,dcto100kHz 92 dB
ACACCURACY
SINAD Signal-to-noise+distortion V =5V at10kHz 82 84 dB
IN PP
SNR Signal-to-noiseratio V =5V at10kHz 84 85 dB
IN PP
THD Totalharmonicdistortion V =5V at10kHz –92 –88 dB
IN PP
SFDR Spurious-freedynamicrange V =5V at10kHz 88 92 dB
IN PP
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7.8 Electrical Characteristics: ADS7223
AllminimumandmaximumspecificationsatT =–40°Cto+125°C,specifiedsupplyvoltagerange,VREF=2.5V(int),and
A
t =1MSPS(unlessotherwisenoted).TypicalvaluesareatT =+25°C,AVDD=5V,andDVDD=3.3V.
DATA A
PARAMETER TESTCONDITIONS MIN TYP MAX UNIT
RESOLUTION
Resolution 12 Bits
DCACCURACY
INL Integralnonlinearity –0.5 ±0.2 +0.5 LSB
DNL Differentialnonlinearity –0.5 ±0.1 +0.5 LSB
V Inputoffseterror –2 ±0.2 +2 mV
OS
V match ADCtoADC –1 ±0.1 +1 mV
OS
dV /dT Inputoffsetthermaldrift 1 μV/°C
OS
Referencedtothevoltageat
G Gainerror –0.1% ±0.01% +0.1%
ERR REFIOx
G match ADCtoADC –0.1% ±0.005% +0.1%
ERR
Referencedtothevoltageat
G /dT Gainerrorthermaldrift 1 ppm/°C
ERR REFIOx
CMRR Common-moderejectionratio BothADCs,dcto100kHz 92 dB
ACACCURACY
SINAD Signal-to-noise+distortion V =5V at10kHz 71 72 dB
IN PP
SNR Signal-to-noiseratio V =5V at10kHz 72 73 dB
IN PP
THD Totalharmonicdistortion V =5V at10kHz –86 –84 dB
IN PP
SFDR Spurious-freedynamicrange V =5V at10kHz 84 86 dB
IN PP
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