Digital Logic & Computer Design[Morris Mano]

624 Pages·2010·6.04 MB·English

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Digital Logic

and

Computer Design
MORRIS MANO SPRED
rts’ Eanoenng

ations State Unvernty, Loe Angee

953770

BrasOwnend® SOLLESELERARY
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Prentice-Hall of India [ufate Linikiod!

New Delhi- 110001
2004
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Contents

PREFACE oa

1 BINARY sysTEMs 1

Digital Compute

eI land Digital Systems 7
1-2 Bihary Numbers 3”

43 Slumber Base Conversion 5 -
44 Qotal and Mexadecimal Numbers 5
15 “Gomplamants Zo =

1-8 ary Codes 16

1-7 “Binary Storage and Ragistars 22

18 Bilary Logie 25

18 Integrated Circuits | 30°

Rotorences i!
Problems. sr
2 BOOLEAN ALGEBRA AND LOGIC GATES e]
21 Basic Datinitions as “2
22 fxiomatic Detition ot Boolean Algebra “$6
23 Basic Theorams and Properties

85 Sparcglons Sena
Kote oe
3. SINPLIFICATION OF BOOLEAN FUNCTIONS. n

31 Tha Map Methoo 72” ’
32 Two and Tivee-Varlabio Maps 7277
3a FourVarable Map. 77

34 Five and SieVarable Maps 30

35 Product of Sume Simpiliction 43
38 NAND.and NOR Implementation 3"
37 Other Two-Level implementations 33
38 Dont-Care Concitions 0

a3
3
3
3

‘Tha Tabulaton Metta 112
0 Daterminatian of Prime-tmplicants 107
11 Selection af Prime-tmplicants 208

12 Goncluaing Remarks "130
Reterences 112

Problems 142
4 COMBINATIONAL Losi 16
41 Introduotion 116
42 Design Procedure 177
43 Adders 179
aa Subiractors 127
45 Gade Conversion 125
48 Analysis Procedure 728
47 thuflevel NAND Cirouils 117
4B Mulllevel NOR Circuits 147
49 Bxolusive-er and Equivalence Functions 14
Reterances 15H
Problems 230
6 GOMBINATIONAL LOGIC WITH MSI AND LSI 14
&1 Introduction ise

52 Binary Parallel Adkor 135
53 Decimal Addar a!
S-4 Magnitude Comparator s3¢
5&5 Dacoders 147
58 Muliplexers 775
7 Read-Only Memory (ROM) 132
58 Programmable Logic Array (PLA) 109
52 Concluding Remarks Wut
Rararencas 196
Prablems 198
8 SEQUENTIAL LOGIC 202

61

Introduction 202

62 FlipFlogs 20%
63 Triggering of Filp-Flops 210
6-4 Analysis ol Clocked Sequontial Circuits 217
85 State Reduction and Aseignment 22¢
6:6 FlipFlop Excitation Tables 240
67 Design Procedure 273
68 Darign of Countars 243
6-9 Design wih State Equations 247
Rolerenses 25!
Problems 252
7 REGISTERS, COUNTERS, AND THE MEMORY UNIT 286
74 tnvoduetion 256
72 Registers 257
73 Shit Registers 260
7-4 Ripple Counters 272
TS ‘Synchronous Counters 274
78 Timing Sequences 28
77 The Memory Unit. 280
7-8 Examples of Random Access Mermorles 26¢
Foferences 300
Problems 202
2 REGISTER TRANSFER LOGIC 308
Bel Inlraduction _ 305
82 — Inleregister Transfer 308
83 Arithmetic, Logic, and ShiM Micre-Operatians 316
3-4 Conditional Control Statements 327
8:5 Finad-Point Binary Data £22
B65 Overtiow 32:
BeT Arithmetic Shits 329
88 Decimal Data 331
89 Floating-Point Data 37
BAO Non-Numerie Data 33
B11 Instruction Codes 370
8412 Design of Simple Computer 244

Relerences 152
Problems 3s?
4

"

PROCESSOR LOGIC DESIGN 3588
94 Introduction 358
9-2 Pragessor Organization 259
33 Arimmelic Logie Unit 367
3-4 Design af Arithmevc Circuit 358
5 Design of Logic Circuit 276
8-8 Design af Aranmetic Logic Lint 178
97 Status Register 142
98 Design of Shiner ise
8-8 Processor Und 386
3-10 Design of Accumulator 19
Flferences eu
Prooiems 402
CONTROL LOGIC DESIGN 407
304 introduction we
30-2 Gortrot Grgarvzation $09
303 Hard-Wired Control Example 1413
10-4 Microprogram Cantrol «24
30-8 Gontrol of Processor Unit 420
10-6 © Hard-Wired Control Example 2 442
30-7 PLAControl a47
108 Microprogram Sequencer 446
Rotarsnoas #32
Problems 453
‘COMPUTER DESIGN 488
44-4 Introduction 459
112 System of Configuration 460
143 Computer instructions es
1-4 Titnnng and Control 477
145 Execution af instructions 475
11-6 Dasign of Computar Registers. 479
11-7 Design of Control #56
11-8 Computer Console «#2

ferences #4
Proploms 425
12 MICROCOMPUTER SYSTEM DESIGN 499

1241 Introduction 99
322 Micracomputer Organization a2
123 Mleropracessor Organization 56
12-4 Instructions and Addressing Modes 514
125 Stack, Subrounnes, and bmierupl $23
126 — Memery Organizalion 172
12-7 Input-Output interface 53
12-8 Direct Memory Access 47
References 351
Problams 552

19° DIGITAL INTEGRATED CIRCUITS 556

13:1 Intraduetion 534
13:2 Bipolar Transistor Characterletes ise
383 RTLand OTL Girauls 562
144 Integrated-inection Logie (PL) 268
13.5 Transistor-Transiotor Logic (TTL) $08
136 Emiler-Coupled Loge (ECL) 8
18-7 Metal-Onede Semiconductor (MOS) 58
FEA Complementary MOS (CMOS) 504
Retorences 8
Probleme 386

APPENDIX: ~Answors to Selected Problems 589

INDEX 608
Preface

Dui logis is sanesi ned with Ye ntesconnettion among digital components
and aouinles snes a teem used to deoote The devin and amass of dual
‘ero, The hese kon example of ll xyes the gener purpose digs
‘somputer. Chis hook present te hac concepls used inthe desgn and anal of
“Sis spstern and isrodaces the principles nf digital computer nrgmiznten nnd
Seagh, eyvovides varioos methods and techniques suitable fr a vary a diye
reste. design applications, Te covers all aspects of digital systema fey the
clostionis gate creas to He complex stactne if kruoompater systems

‘Chaplets I through 6 present cial ngic esp technigues fom te clasical
point of view. Boolean alge and uth bles are ud For he analysand dian
of combnatisnal ciscucs 308 sae milion echnigues for the analysand design
of sequental cucits, Chaps 7 dough 12 presen! dq vate design methods
froun the eyeverononier point of view, The git) sytem rs deconmpeste tte
reguster subonits ant ester» specified woth a Ht of register state
snes that deseribe Gis operational transfer among he information sored a
regatess The sete sranefer method is wed for the aisle and essa ot
Provesoe uns, consol unit, eumipate central pracessor, al for lst he
fnterna operation of micropeesso ai nexncocnptes Chup 13 dea mt
( elerusios of dil eats and presents chs mest convo iterated ie
al ogi Faris

‘The components used consieuct lglal eyes ane manufactured in
Incegrated cian Form, Untgsacetciccoitseoatain lange amioual of Snlecon
nevied digial sicuit watun x single small package. Medivan sale atgention
1398) cevies peowie egal functions amd Iage scale integraven (LSE devioss
vide wommplte womputer modules Tei vey emportant for fhe log drsgaer 16
fe Famili wth he vanous dial components encoanter8 in nlerate cet
Toru Fur thi eason, many MST and LAL ieee ace rniedaocd throughout the
hk an thes geal function fully explated. The we uf anlegrated circu oe
ks of cual syriems i Mlusatad hy mere of evimplts Sn Ube feat and in
robles athe enuf the chap,
‘This hook was originally planned as a sean ition lo the autha’s Came
tor Logie Design (Prentice HaD. 1972) Boca of he “ionic of new eater)
sulded nd Ube extensive reins that ve taken place, seems note atria
(w adopt a sew ide for che presoot wx, About one Ind of the lente ste tha
ppenrs in the previons book. The cher two thinks constiuts new vr revised
information, The undying factors or the revisions and addins arve from
devclonnents in the digit elstrunis technology. Cet emphasise given to MST
and LSI coals and ve design methods using integrated cients. The book covert
‘aris LSL componcnis of he biti and iemomputer variety, TF psenta
pplcaions of the read only memory (ROM) an programmable tale aig
(PLA), Moreover, luther developments a the sogiterianaler method of ein
‘mandated compete rewriting of the ton fa ofthe ook

‘Chapler 1 presoms various bioary synterssvtible fr repre ifoera-
‘won in digital components. The hinizy number sem‘ eaplained and binacy
fndet are Mhsated 10 show the repreceniotion of decinal wml aphanumenc
ifonnation. Binary Tog is earoduced trom a inte point of view before
proceeding wil a forcal definition of Bookean alga

“The bese postletes and theorems of Hooleanalgchry awe Fouad in Chapt
2 The coreation tetwern 4 Booleah enpresson nd ie equivalent mterconnestion
of sates i emphasing. All pcsibe loge apelin for twa variable te invest
ated and fram iat, tho mast wet logic gees are devved, The characteristics ef
ial guts avsikble in itegratal erent orm ae prevented eidy in this cape
but w more detaled snalyasdeserihing the interaatceosiuction of he gates eet
Tov thee chapter.

‘Chapter 3 suppbes the may sou tabulation methnds for simplifying Boolean
functions, The wip method i ised «© timplty digital cece eonsirocted noth
AND, OR NAND, NOR, aod wired ogi gates, The various snpiiaton proce-
‘ress Gummatzed in tabular form for éeny relerence,

DDovign and analyst procedures for combinational circus ore paced in
Chapter 4: Some basic components wed in the design of digital ysteras, sich 35
Ailes und cade converters, are inteduvrd as, eign or analy snamples, The
chapter investigates powshie implementations using mallee! NAND and NOR
mbizadenal ecu,

Chapter $ deal with comhinavonal loge MEI sna LST eumponents Often
ed untions uch as parallel ada, devaders, and multipotent expliood
and thet use inthe design of combinations? cis ie whutated with examples
The real only memory (ROM) and progranimane logic array (PLA) are i
‘woduced and their useFulness inthe design of compler combataticnal creas i
seems,

Chaps 6 oulines various metal fur the design and anahyse f clocked
sequential cieuits. The chapter stasis hy presenting various typeof pps ul
‘he way they are triggered. The state diagram, sat able, and slate eaualions are
show fo be convenient tools for analyzing sequential civcity Me design methods
rosented transem he sequential einai to att of Roca Tumeions tbat spect