Digital electronics: a practical approach with VHDL

983 Pages·2011·32.04 MB·English

by  William Kleitz

NINTH EDITION
Digital
Electronics
A Practical Approach
with VHDL
William Kleitz
State University of New York—Tompkins Cortland
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Library of Congress Cataloging-in-Publication Data
Kleitz, William.
Digital electronics: a practical approach with VHDL/William Kleitz.—9th ed.
p. cm.
Includes bibliographical references and index.
ISBN-13: 978-0-13-254303-3
ISBN-10: 0-13-254303-6
1. Digital electronics. I. Title.
TK7868.D5K55 2011
621.381—dc23
2011017472
10 9 8 7 6 5 4 3 2 1
ISBN 13: 978-0-13-254303-3
ISBN 10: 0-13-254303-6
Contents
1 2–2 Clock Waveform Timing 29
Chapter
2–3 Serial Representation 32
2–4 Parallel Representation 32
Number Systems and Codes 2
2–5 Switches in Electronic Circuits 37
2–6 A Relay as a Switch 38
Outline 2
2–7 A Diode as a Switch 42
Objectives 2
2–8 A Transistor as a Switch 45
Introduction 3
2–9 The TTL Integrated Circuit 49
1–1 Digital versus Analog 3
2–10 MultiSIM®Simulation of Switching
1–2 Digital Representations of Analog
Circuits 51
Quantities 3
2–11 The CMOS Integrated Circuit 53
1–3 Decimal Numbering System (Base 10) 7
2–12 Surface-Mount Devices 55
1–4 Binary Numbering System (Base 2) 8
Summary 55 Glossary 56
1–5 Decimal-to-Binary Conversion 10
Problems 57 Schematic Interpretation
1–6 Octal Numbering System (Base 8) 12
Problems 60 MultiSIM®Exercises 60
1–7 Octal Conversions 12
Answers to Review Questions 61
1–8 Hexadecimal Numbering System
(Base 16) 14
1–9 Hexadecimal Conversions 15 3
Chapter
1–10 Binary-Coded-Decimal System 17
1–11 Comparison of Numbering Systems 18
Basic Logic Gates 62
1–12 The ASCII Code 18
1–13 Applications of the Numbering
Outline 62
Systems 20
Objectives 62
Summary 23 Glossary 23
Introduction 63
Problems 24 Schematic Interpretation
3–1 The AND Gate 63
Problems 26 MultiSIM®Exercises 26
Answers to Review Questions 27 3–2 The OR Gate 65
3–3 Timing Analysis 67
3–4 Enable and Disable Functions 70
2
Chapter 3–5 Using IC Logic Gates 73
3–6 Introduction to Troubleshooting
Digital Electronic Signals and Techniques 74
Switches 28 3–7 The Inverter 79
3–8 The NAND Gate 80
Outline 28 3–9 The NOR Gate 83
Objectives 28 3–10 Logic Gate Waveform
Introduction 29 Generation 86
2–1 Digital Signals 29 3–11 Using IC Logic Gates 92
iii
3–12 Summary of the Basic Logic Gates and 5–10 System Design Applications 211
IEEE/IEC Standard Logic Symbols 94 Summary 214 Glossary 214
Summary 96 Glossary 96 Problems 216 Schematic Interpretation
Problems 97 Schematic Interpretation Problems 227 MultiSIM®Exercises 228
Problems 107 MultiSIM®Exercises 108 MultiSIM®Troubleshooting Exercises 230
MultiSIM®Troubleshooting Exercises 110 FPGA Problems 232 Answers to Review
Answers to Review Questions 111 Questions 235
4 6
Chapter Chapter
Programmable Logic Devices: CPLDs Exclusive-OR and Exclusive-NOR
and FPGAs with VHDL Design 112 Gates 236
Outline 112 Outline 236
Objectives 112 Objectives 236
Introduction 112 Introduction 236
4–1 PLD Design Flow 113 6–1 The Exclusive-OR Gate 237
4–2 PLD Architecture 116 6–2 The Exclusive-NOR Gate 238
4–3 Using PLDs to Solve Basic Logic 6–3 Parity Generator/Checker 241
Designs 122 6–4 System Design Applications 244
4–4 Tutorial for Using Altera’s Quartus®II 6–5 FPGA Design Applications with VHDL 247
Design and Simulation Software 126 Summary 252 Glossary 253
4–5 FPGA Applications 147 Problems 253 Schematic Interpretation
Summary 150 Glossary 150 Problems 256 MultiSIM®Exercises 256
Problems 152 FPGA Problems 153 FPGA Problems 257 Answers to Review
Questions 259
5
Chapter 7
Chapter
Boolean Algebra and Reduction
Arithmetic Operations and
Techniques 156
Circuits 260
Outline 156
Outline 260
Objectives 156
Objectives 260
Introduction 157
Introduction 260
5–1 Combinational Logic 157
7–1 Binary Arithmetic 261
5–2 Boolean Algebra Laws and Rules 162
7–2 Two’s-Complement Representation 267
5–3 Simplification of Combinational Logic
7–3 Two’s-Complement Arithmetic 269
Circuits Using Boolean Algebra 167
5–4 Using Quartus®II to Determine Simplified 7–4 Hexadecimal Arithmetic 271
Equations 172 7–5 BCD Arithmetic 274
5–5 De Morgan’s Theorem 177 7–6 Arithmetic Circuits 275
5–6 Entering a Truth Table in VHDL Using a 7–7 Four-Bit Full-Adder ICs 281
Vector Signal 191 7–8 VHDL Adders Using Integer
5–7 The Universal Capability of NAND and Arithmetic 285
NOR Gates 196 7–9 System Design Applications 287
5–8 AND–OR–INVERT Gates for Implementing 7–10 Arithmetic/Logic Units 292
Sum-of-Products Expressions 201 7–11 FPGA Applications with VHDL
5–9 Karnaugh Mapping 205 and LPMs 295
iv CONTENTS
Summary 301 Glossary 302 9–8 Interfacing Logic Families 413
Problems 304 Schematic Interpretation 9–9 FPGA Electrical Characteristics 420
Problems 308 MultiSIM®Exercises 308
Summary 421 Glossary 422
FPGA Problems 309 Answers to Review
Problems 423 Schematic Interpretation
Questions 310 Problems 427 MultiSIM®Exercises 428
FPGA Problems 428 Answers to Review
8 Questions 429
Chapter
10
Code Converters, Multiplexers, and
Chapter
Demultiplexers 312
Flip-Flops and Registers 430
Outline 312
Objectives 312 Outline 430
Introduction 312 Objectives 430
8–1 Comparators 313 Introduction 430
8–2 VHDL Comparator Using 10–1 S-RFlip-Flop 431
IF-THEN-ELSE 316
10–2 Gated S-RFlip-Flop 435
8–3 Decoding 318
10–3 Gated DFlip-Flop 436
8–4 Decoders Implemented in the VHDL
10–4 DLatch: 7475 IC; VHDL Description 437
Language 326
10–5 DFlip-Flop: 7474 IC; VHDL
8–5 Encoding 331
Description 441
8–6 Code Converters 339
10–6 Master–Slave J-KFlip-Flop 450
8–7 Multiplexers 346
10–7 Edge-Triggered J-KFlip-Flop with VHDL
8–8 Demultiplexers 354 Model 453
8–9 System Design Applications 359 10–8 Integrated-Circuit J-KFlip-Flop (7476,
8–10 FPGA Design Applications Using LPMs 365 74LS76) 457
Summary 369 Glossary 369 10–9 Using an Octal DFlip-Flop in a
Problems 370 Schematic Interpretation Microcontroller Application 465
Problems 377 MultiSIM®Exercises 378 10–10 Using Altera’s LPM Flip-Flop 467
MultiSIM®Troubleshooting Exercises 380
Summary 469 Glossary 470
FPGA Problems 381 Answers to Review
Problems 472 Schematic Interpretation
Questions 383 Problems 478 MultiSIM®Exercises 479
FPGA Problems 480 Answers to Review
9 Questions 482
Chapter
11
Logic Families and Their
Chapter
Characteristics 384
Practical Considerations for
Outline 384 Digital Design 484
Objectives 384
Introduction 384 Outline 484
9–1 The TTL Family 385 Objectives 484
9–2 TTL Voltage and Current Ratings 388 Introduction 484
9–3 Other TTL Considerations 397 11–1 Flip-Flop Time Parameters 485
9–4 Improved TTL Series 403 11–2 Automatic Reset 502
9–5 The CMOS Family 405 11–3 Schmitt Trigger ICs 503
9–6 Emitter-Coupled Logic 410 11–4 Switch Debouncing 509
9–7 Comparing Logic Families 412 11–5 Sizing Pull-Up Resistors 513
CONTENTS v
11–6 Practical Input and Output 13–6 VHDL Description of Shift Registers 635
Considerations 514 13–7 Shift Register ICs 638
Summary 525 Glossary 526 13–8 System Design Applications for Shift
Problems 527 Schematic Interpretation Registers 647
Problems 533 MultiSIM®Exercises 533
13–9 Driving a Stepper Motor with a Shift
FPGA Problems 534 Answers to Review
Register 651
Questions 534
13–10 Three-State Buffers, Latches, and
Transceivers 655
12
13–11 Using the LPM Shift Register and 74194
Chapter
Macrofunction 660
Counter Circuits and VHDL State 13–12 Using VHDL Components and
Machines 536 Instantiations 662
Summary 666 Glossary 667
Problems 668 Schematic Interpretation
Outline 536
Problems 674 MultiSIM®Exercises 675
Objectives 536
FPGA Problems 676 Answers to Review
Introduction 536
Questions 678
12–1 Analysis of Sequential Circuits 538
12–2 Ripple Counters: JK FFs and VHDL
14
Description 541 Chapter
12–3 Design of Divide-by-NCounters 548
Multivibrators and the 555 Timer 680
12–4 Ripple Counter ICs 559
12–5 System Design Applications 564
Outline 680
12–6 Seven-Segment LED Display Decoders: The
7447 IC and VHDL Description 570 Objectives 680
12–7 Synchronous Counters 579 Introduction 680
12–8 Synchronous Up/Down-Counter ICs 583 14–1 Multivibrators 681
12–9 Applications of Synchronous 14–2 Capacitor Charge and Discharge Rates 681
Counter ICs 592 14–3 Astable Multivibrators 685
12–10 VHDL and LPM Counters 595 14–4 Monostable Multivibrators 687
12–11 Implementing State Machines in VHDL 600 14–5 Integrated-Circuit Monostable
Summary 611 Glossary 612 Multivibrators 690
Problems 613 Schematic Interpretation 14–6 Retriggerable Monostable
Problems 619 MultiSIM®Exercises 620 Multivibrators 695
FPGA Problems 621 Answers to Review 14–7 Astable Operation of the 555 IC Timer 698
Questions 624
14–8 Monostable Operation of the 555 IC
Timer 704
13
14–9 Crystal Oscillators 707
Chapter
Summary 709 Glossary 709
Shift Registers 626 Problems 710 Schematic Interpretation
Problems 713 MultiSIM®Exercises 714
Answers to Review Questions 715
Outline 626
Objectives 626
15
Introduction 626
Chapter
13–1 Shift Register Basics 627
13–2 Parallel-to-Serial Conversion 629 Interfacing to the Analog World 716
13–3 Recirculating Register 629
13–4 Serial-to-Parallel Conversion 631 Outline 716
13–5 Ring Shift Counters and Johnson Shift Objectives 716
Counters 633 Introduction 716
vi CONTENTS
15–1 Digital and Analog Representations 717 17–2 Software Control of Microprocessor
15–2 Operational Amplifier Basics 718 Systems 798
15–3 Binary-Weighted D/A Converters 719 17–3 Internal Architecture of a
Microprocessor 798
15–4 R/2RLadder D/A Converters 720
17–4 Instruction Execution within a
15–5 Integrated-Circuit D/A Converters 723
Microprocessor 800
15–6 Integrated-Circuit Data Converter
17–5 Hardware Requirements for Basic I/O
Specifications 726
Programming 803
15–7 Parallel-Encoded A/D Converters 728
17–6 Writing Assembly Language and Machine
15–8 Counter-Ramp A/D Converters 729
Language Programs 805
15–9 Successive-Approximation A/D
17–7 Survey of Microprocessors and
Conversion 730
Manufacturers 808
15–10 Integrated-Circuit A/D Converters 733
Summary of Instructions 809
15–11 Data Acquisition System Application 738
Summary 809 Glossary 810
15–12 Transducers and Signal Conditioning 741 Problems 812 Schematic Interpretation
Summary 746 Glossary 747 Problems 814 MultiSIM®Exercises 814
Problems 748 Schematic Interpretation Answers to Review Questions 815
Problems 751 MultiSIM®Exercises 751
Answers to Review Questions 752
18
Chapter
16
The 8051 Microcontroller 816
Chapter
Semiconductor, Magnetic, Outline 816
and Optical Memory 754 Objectives 816
Introduction 817
Outline 754 18–1 The 8051 Family of Microcontrollers 817
Objectives 754 18–2 8051 Architecture 817
Introduction 754 18–3 Interfacing to External Memory 823
16–1 Memory Concepts 755 18–4 The 8051 Instruction Set 825
16–2 Static RAMs 758 18–5 8051 Applications 831
16–3 Dynamic RAMs 765 18–6 Data Acquisition and Control System
16–4 Read-Only Memories 771 Application 835
16–5 Memory Expansion and Address Decoding 18–7 Conclusion 846
Applications 778 Summary 846 Glossary 847
16–6 Magnetic and Optical Storage 783 Problems 847 Schematic Interpretation
Summary 787 Glossary 788 Problems 849
Problems 789 Schematic Interpretation
APPENDIX A Web Sites 850
Problems 792 MultiSIM®Exercises 792
APPENDIX B Manufacturers’ Data Sheets 852
Answers to Review Questions 793
APPENDIX C Explanation of the IEEE/IEC Standard
for Logic Symbols (Dependency
17
Notation) 888
Chapter
APPENDIX D Answers to Odd-Numbered Problems 893
Microprocessor Fundamentals 794 APPENDIX E VHDL Language Reference 917
APPENDIX F Review of Basic Electricity Principles 924
Outline 794 APPENDIX G Schematic Diagrams for Chapter-End
Objectives 794 Problems 933
Introduction 794 APPENDIX H 8051 Instruction Set Summary 942
17–1 Introduction to System Components and INDEX 947
Buses 795 SUPPLEMENTARY INDEX OF ICs 955
CONTENTS vii
Preface
This ninth edition of Digital Electronics: A Practical Approach with VHDL provides
the fundamentals of digital circuitry to students in engineering and technology curric-
ula. The digital circuits are introduced using fixed-function 7400 ICs and evolve into
FPGA (Field Programmable Gate Arrays) programmed with VHDL (VHSIC Hardware
Description Language). (Note: Those schools not wishing to develop logic using
VHDL and FPGAs can completely skip those sections of the textbook without affect-
ing the continuity of the remainder of the text, which describes logic design and imple-
mentationusing 7400-series ICs.)
Coverage begins with the basic logic gates used to perform arithmetic operations
and proceeds through sequential logic and memory circuits used to interface to mod-
ern PCs. Professor Kleitz uses his vast experience of teaching electronics online and in
class from his best-selling textbooks to know what it takes for an entry-level student to
be brought up to speed in this emerging field. It was important to design this new text-
book to present practical examples, be easy to read, and provide all of the information
necessary for motivated students to teach themselves this new subject matter. This
makes it ideal for learning in an online environment as well as from conventional in-
class lectures.
Digital electronic ICs (integrated circuits) and FPGAs are the “brains” behind
common microprocessor-based systems such as those found in automobiles, personal
computers, and automated factory control systems. The most exciting recent develop-
ment in this field is that students now have the choice to design, simulate, and imple-
ment their circuits using a programming language called VHDL instead of wiring
individual gates and devices to achieve the required function.
Each topic area in this text consistently follows a very specific sequence of steps,
making the transition from problem definition, to practical example, to logic IC imple-
mentation, to VHDL and FPGA implementation. To accomplish this, the text first in-
troduces the theory of operation of the digital logic and then implements the design in
integrated circuit form (see Figure P–1). Once the fixed-function IC logic is thoroughly
explained, the next step is to implement the design as a graphic design file and then to
implement it using the VHDL hardware descriptive language, all within the free version
of the Altera Quartus® II development software. Several examples are used to bolster
the student’s understanding of the subject before moving on to system-level design and
troubleshooting applications of the logic. This step-by-step method has proven over the
years to be the most effective method to build the fundamental understanding of digital
electronics before proceeding to implement the logic design in VHDL.
The Altera Quartus®II software is a free download that allows students to either
graphically design their circuit by drawing the logic (using logic gates or 7400 macro-
functions) or use VHDL to define their logic. The design can then be simulated on a
PC before using the same software to download the logic to an FPGA on one of the
commercially available FPGA programmer boards, such as the Altera DE2 illustrated
in this text.
viii
A
AB
B
X
C B + C
(a)
7404 7408 7402 7432
A 1 14 VCC 1 14 VCC 1 14 VCC 1 14 VCC
2 13 2 13 2 13 2 13
3 12 3 12 3 12 3 12
4 11 4 11 4 11 4 11
5 10 5 10 5 10 5 10
6 9 6 9 6 9 6 9
GND 7 8 GND 7 8 GND 7 8 GND 7 8
X
B
C
(b)
Figure P–1 Building digital circuits using fixed-function 7400-series ICs.
Over 1,000 four-color illustrations are used to exemplify the operation of com-
plex circuit operations. Most of the illustrations contain annotations describing the in-
puts and outputs, and many have circuit operational notes. The VHDL program listings
are enriched with many annotations, providing a means for students to teach them-
selves the intricacies of the language (see Figure P–2).
Each chapter begins with an outline, objectives, and introduction and concludes
with review questions, summary, glossary, design and troubleshooting problems,
schematic interpretation problems, MultiSIM®problems, and FPGA problems.
Library Declare which VHDL
Declaration library to use
Entity
declaration Entity name
Architecture
body Define the logic
Architecture name
Figure P–2 A sample annotated VHDL program used to define logic in an FPGA.
PREFACE ix