Design of Radio Frequency Power Amplifiers for Cellular Phones and Base Stations in Modern ...

129 Pages·2009·4.43 MB·English

Design of Radio Frequency Power Amplifiers for
Cellular Phones and Base Stations in
Modern Mobile Communication Systems

Von der Fakultät Informatik, Elektrotechnik und Informationstechnik
der Universität Stuttgart
zur Erlangung der Würde eines Doktor-Ingenieurs
(Dr.-Ing.) genehmigte Abhandlung

Vorgelegt von
Lei Wu
aus der Volksrepublik China · Shandong

Hauptberichter: Prof. Dr.-Ing. Manfred Berroth
Mitberichter: Prof. Dr.-Ing. Joachim Burghartz
Tag der mündlichen Prüfung: 29.06.2009

Institut für Elektrische und Optische Nachrichtentechnik
2009

Acknowledgments
Acknowledgements

My foremost appreciation goes to Professor Berroth who has given me the chance to finish
my PhD at the Institute of Electrical and Optical Communications Engineering, University of
Stuttgart. Thanks for his numerous and professional instructions in the last years. I also would
like to thank my colleagues and my students for their great technical and personal help
through the years.

Thanks also go to my parents who have supported me for so long time. They are not with
me in Germany; however, they have given me very strong mental supports for many many
years. I also would like to thank my dear wife who is just alone in China and waiting for me
patiently. Her existence and her love let me always know that I must work hard to win a
wonderful future. Finally, I wish to acknowledge family Mueller for the great private help in
the last ten years.

Contents
Symbols ………………………………………………………………………………………. I

Glossary ……………………………………………………………………………….….... III

Zusammenfassung ...………………………………………………………………………….1

1. Introduction ………………………………………………………………………..….….5

2. Fundamentals to the power amplifier design ....….…………..….……….……….........9
2.1 Current source mode power amplifiers ..….…………………………………………...9

2.1.1 The class A power amplifier ...…………………………………………………11

2.1.2 The class B power amplifier ...…………………………………………………12

2.1.3 The class C power amplifier ...…………………………………………………13
2.1.4 Comparison of the different classes of power amplifiers ………………………14

2.2 Switching mode power amplifiers …………………………………………………...16

2.2.1 The class D power amplifier ……….………………………………………..…16
2.2.2 The class E power amplifier ……………………………………………………18
2.2.3 The class F power amplifier ……………………………………………………20

2.3 Active devices for the power amplifier design …………..…………………………..23

2.3.1 CMOS devices ……………………………………………………………...….23

2.3.2 HiVP configuration …………………………………………………………….26
2.3.3 LDMOS devices ………………………………………………………………..28
2.4 Introduction and analyses of conventional circuit design concepts ……………….....30

2.4.1 Common-source single-ended stage …………………………………………...30
2.4.2 Estimation of the high-frequency bandwidth …………………………………..31
2.4.3 High frequency response and Miller effect …………………………………….32

2.4.4 Cascode circuits ………………………………………………………………..33

2.4.5 Differential amplifier …………………………………………………………..35

2.5 Impedance matching ……………………...………………………………………….37
2.5.1 Discrete matching networks ……………………………………………………37
2.5.2 Impedance transforming property of a transmission line ………………………39
2.5.3 Microstrip geometry and characteristic parameters ……………………………40

2.5.4 Single-stub tuning ……………...………………………………………………42

2.5.5 Quarter-wave and multi-section matching networks ……………..……………42

2.6 Biasing network ……………………………………………………………………...45
2.7 Design parameters of the power amplifier …………………………………………...47
2.7.1 Power gain ….……………………………………………………….………….47

2.7.2 Stability ………………………………………………………………………...47

2.7.3 Gain compression and 1-dB compression point ……………………………….49
2.7.4 Intermodulation distortion ……………………………………………………...50

2.7.5 Intercept point ………………………………………………………………….52

2.7.6 ACPR …………………………………………………………………………..52
2.7.7 Power added efficiency ………………………………………………………...53

3. Design of the CMOS driver and power amplifiers …………………….……………..55
3.1 A logarithmic programmable-gain amplifier ………………………………….……..55

3.1.1 Introduction of the PGA and VGA ……...……………………………………..56
3.1.2 Design concept of the radio frequency PGA …………………………..……….60
Contents
3.1.3 Simulation and measurement results …………………………………………...62

3.1.4 Conclusion ……………………………………………………………………..67

3.2 A High Voltage/High Power class A power amplifier ……………..………………..68

3.2.1 Design and simulation of a CMOS HiVP power amplifier ………………...….68

3.2.2 Measurement results …….……….…………………………………………….75

3.2.3 HiVP design concept with adjustable DC power consumption …….…...……..79

3.2.4 Conclusion ……………………………………………………………………..81

4. Design of broadband LDMOS power amplifiers ……...............…………………...…83

4.1 Design of a broadband LDMOS single-ended class AB power amplifier …………...83
4.1.1 Selection of the simulation model for LDMOS transistors …….........……..…..83

4.1.2 DC simulation and selection of operating points …………………………...….84

4.1.3 Advanced stability improvement ………………………………………………85
4.1.4 Design of the matching networks and the S-parameter simulation …………….88

4.1.5 Simulation for large signal response of the broadband power amplifier ………91
4.1.6 Experiments and measurement results …………………………………………93

4.2 Design of a broadband LDMOS balanced class AB power amplifier ……...………..98
4.2.1 Balanced structure ………………………………..…………………………….98

4.2.2 Simulation of the LDMOS balanced power amplifier ……………………..…..99
4.2.3 Experiments and measurement results ……………………………………..…102

5. Summary ……………………………………………………………………………….107

Appendix …………………………………………………………………...………………111

A1. Logic of the 5-to-18 demultiplexer ……………..……………………………….....111
A2. Schematic of the 5-to-18 demultiplexer ……………………………………………112

Reference …………………………………………………………………………………...113
Symbols
Symbols

Symbol Description Unit ,

a , a …a Taylor coefficients
0 1 n
C capacitance F
Cb bypass capacitor F
Cc coupling capacitors F

Cs series capacitor F
Cds drain-source-capacitance F
Cgd gate-drain capacitance F
C gate-source capacitance F
gs
Csb source-bulk capacitance F
Cp parallel capacitance F

Csh shunt capacitance F
C gate oxide capacitance per unit area F/m2
ox

C thermal capacitance F
th
Ci center of the input stability circle
Co center of the output stability circle
c speed of light m/s
D distance of the metal traces m
Dds drain-source diode

Ec energy loss per cycle J
EC conduction band eV
EV valence band eV
EF fermi-level eV
f operating frequency Hz
f resonant frequency Hz
res
f0 center frequency Hz
∆f band width Hz
G gain dB
GT transducer power gain dB
GP operating power gain dB
GA available power gain dB
g transconductance S
m
g transconductance caused by bulk potential S
mb
gm,d the transconductance of the differential pair S
gds drain-source admittance of the transistor S
h substrate thickness m
I quiescent current A
q
I DC component of the current A
dc
I nth harmonic of the current A
n
I fundamental component of the current A
1
Id drain current A
ID current distribution mA/µm2
I the maximum value of the current A
max
I current on the shunt resistor A
R
IS current source A
K parameter of the Rollet’s condition
L inductance H
Ls series inductor H
I
Symbols
Lw wiring-inductor H
L channel length of the n-channel transistor m
n
l length of the microstrip line m
N number of sections of quarter-wave transmission lines
PL power delivered to the load W
P1dB 1 dB compression point dBm
P power available from the source W
AVS
PIN power input to the network W
P RF input power; RF drive power dBm
in
Pout RF output power dBm
Q quality factor
R drain-source resistance Ω
ds

RC series resistance facing Cgd1 Ω
gd1
R optimum load Ω
opt

R thermal resistance K/W
th
R source resistance Ω
g
RL load resistance to be matched Ω
R load resistance Ω
l
R optimum load in the class E amplifier Ω
load.opt
R radius of the input stability circle
i
R radius of the output stability circle
o
Rp shunt resistance Ω
rds-p drain-source resistance of PMOS transistors Ω
T Chebyshev polynomials
n
t conductor thickness m
tox oxide thickness m
Udd supply voltage V
Uds drain-source voltage V

U drain voltage of the top device V
d6
Ui input voltage V
U output voltage V
o
UUgg gbaiates-insogu vrocelt avgoelt a g e VV
gs
Uds-ON “on” drain-source voltage V
U knee voltage V
K
Umax maximum voltage V
Uth threshold voltage V
UvUpBb r bpbrhuealaksk evd vooelwtlaongc evit oy l t a g e VVm /s
v input voltage V
i
vo output voltage V
W conductor width m
W channel width of the n-channel transistor m
WnD,cell width of the metal lines connected at the drain m
WS,cell width of the metal lines connected at the source m
XL, XC reactance of the reactive elements Ω
Z0 characteristic impedance Ω
Z load impedance to be matched Ω
L
Zopt optimum impedance Ω
Z input optimum impedance Ω
in_opt
II