Design of Analog Circuits in 28nm CMOS Technology for Physics Applications

103 Pages·2017·6.95 MB·English

by  Alessandra Pipino

UNIVERSITÀ DEGLI STUDI DI MILANO-BICOCCA
Dipartimento di Fisica “G. Occhialini”
AUDENTES FORTUNA IUVAT
Tesi di Dottorato in Fisica e Astronomia
Curriculum: Tecnologie Fisiche
Ciclo XXIX
Design of Analog Circuits
in 28nm CMOS Technology
for Physics Applications
Autore: Alessandra Pipino
Tutor: Prof. MassimoGervasi
Supervisore: Prof. AndreaBaschirotto
Coordinatore: prof.ssaMartaCalvi
AnnoAccademico2015/2016

To Fabrizio
3

i
Abstract
The exponential trend of the complementary metal-oxide-semiconductor (CMOS)
technologiespredictedbyMoore’slawhasbeensuccessfullydemonstratedoverthe
lastthreedecades. AconstantdownscalingofCMOStechnologieshasbeendevel-
oped,inordertocomplywithrequirementsonspeed,complexity,circuitdensityand
powerconsumptionofadvancedhighperformancedigitalapplications.
With the arrival of nanoscale (sub-100nm) CMOS technologies, digital perfor-
manceimprovefurther,butmanynewchallengeshavebeenintroducedforanalog
designers. Infact,forthedigitalcircuitsCMOSscaling-downleadstoseveralbenefits:
speedimprovement,reducedpowerconsumption,highintegrationandcomplexity
level. Theanalogcircuits,instead,stronglysuffersfromtheScalTechtrend,because
theMOSbehaviordramaticallychangesthroughthedifferenttechnologicalnodes.Es-
peciallyfortheultra-scalednodes,secondordereffects,previouslynegligible,become
veryimportantandstarttobedominant,affectingthetransistorsperformance. For
instance,lowerintrinsicDC-gain,reduceddynamicrange,operatingpointissuesand
largerparametervariabilityaresomeoftheproblemsduetothescalingofphysical
(length, oxide thickness, etc.) and electrical (supply voltage) parameters. Analog
designershavetomanagetheseproblemsatdifferentphasesofthedesign,circuital
andlayout,inordertosatisfythemarkethigh-performancerequirements.
Despitethat,thedesignofanalogcircuitinsub-nmtechnologiesismandatoryin
somecasesorcanbeevenstrategicalinothers. Forexample,inmainlymixed-signal
systems,theread-outelectronicrequireshighfrequencyperformance,sothechoice
ofdeepsubmicrontechnologyismandatory,alsofortheanalogpart. Othertypes
ofapplicationsarethehigh-energyphysicsexperiments,whereread-outcircuitsare
exposed to very high radiation levels with consequent performance degradation.
Sinceradiationdamageisproportionaltogateoxidevolume,smallerdevicesexhibit
lowerradiationdetriment. Ithasbeendemonstratedinfact,that28nmCMOStech-
nologydevicesarecapabletosustain1Grad-TIDexposure,notpossiblewithprevious
technologies.
Inthisthesis,themainchallengesinultra-scaledtechnologiesareanalysedand
thenintegratedcircuitsdesignedin28nmCMOStechnologyarepresented. Theaim
ofthisworkistoshowthedesignapproachandseveralsolutionstobeappliedin
ordertooutermostthelimitsofsiliconscaling,addressthemajorscalingproblems
andguaranteetherequiredperformance.
Thefirstcircuitdesign,presentedinthesecondchapterandintegratedin28nm
CMOStechnology,isaFast-Trackerfront-end(FTfe)forchargedetection. Theread-
outsystemhasbeendevelopedstartingfromthemainspecificationsandcircuital
solutionsalreadyadoptedformuondetectioninATLASexperiment. Theproposed
front-end is able to detect an event and soon after to reset the system in order to
maketheread-outfront-endalreadyavailableforthefollowingevents,avoidinglong
deadtimes. Moreover,exploitingatwothresholdscrossingsolution,therequired
ii
informationcanbecollected,simplifyingthearchitecturecomparedtothecurrent.
The second circuit design presented and always integrated in 28nm CMOS
technology,isaChopperinstrumentationamplifier. Instrumentationamplifiersare
thekeybuildingblocksinsensorandmonitoringapplications,wheretheyareused
tosenseandamplifyusuallyverysmall(sub-mV)andlowfrequencysignals. For
thisreasonitisimportanttoreduceoreliminatetheinputoffsetandflickernoise
introducedbytheamplifieritself,superimposingthemainsignaltobedetected. The
proposedamplifierusetheclassicalmodulationtechnique,calledchopper,inorder
tomeetthelowoffsetandlowflickernoiserequirements. Theuseofanultra-scaled
technologyensurestheamplifieremploymentineverymixed-signalsystem,with
advantagesalsointermsofchargeinjection.
Contents
Abstract i
Contents iv
ListofFigures vii
ListofTables viii
Introduction 1
1 DeviceTrendsofTechnologicalScaling-Down 3
1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 SupplyVoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 ThresholdVoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.4 PVTVariations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.5 MismatchVariations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.6 IntrinsicGainReduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.7 RestrictiveDesignRules . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.8 IntrinsicTransitionFrequency . . . . . . . . . . . . . . . . . . . . . . . . 11
1.9 RadiationHardness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2 FastTrackerFront-EndforATLASMDT 15
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.2 ATLASMonitoredDriftTubeChambers . . . . . . . . . . . . . . . . . . 15
2.3 ATLASMDTFront-EndElectronics. . . . . . . . . . . . . . . . . . . . . 18
2.4 FastTrackerfront-endArchitecture . . . . . . . . . . . . . . . . . . . . . 20
2.4.1 ChargeSensitivePreamplifier . . . . . . . . . . . . . . . . . . . . 23
2.4.2 Shaper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2.4.3 Comparatorsandthresholds . . . . . . . . . . . . . . . . . . . . 30
2.4.4 Logicblock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2.4.5 Outputbuffers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.5 FTfeLayout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.6 FTfePerformance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.6.1 Signalssettings . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
iii
iv CONTENTS
2.6.2 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
3 ChopperInstrumentationAmplifier 47
3.1 OffsetCompensationTechniques . . . . . . . . . . . . . . . . . . . . . . 47
3.1.1 Auto-zeroTechnique . . . . . . . . . . . . . . . . . . . . . . . . . 49
3.1.2 ChopperTechnique. . . . . . . . . . . . . . . . . . . . . . . . . . 50
3.2 ChopperAmplifier: Prototype1. . . . . . . . . . . . . . . . . . . . . . . 52
3.2.1 Continuous-timeopampdesign . . . . . . . . . . . . . . . . . . 52
3.2.2 Choppedopampdesign . . . . . . . . . . . . . . . . . . . . . . . 59
3.2.3 Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
3.2.4 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
3.3 ChopperAmplifier: Prototype2. . . . . . . . . . . . . . . . . . . . . . . 65
3.3.1 Four-phaseGenerator . . . . . . . . . . . . . . . . . . . . . . . . 65
3.3.2 Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
3.3.3 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
4 Papers 73
4.1 IEEEICECS2015: Paper . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
4.2 IEEEICECS2015: Poster . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Conclusions 81
Bibliography 85
Acknowledgements 89
List of Figures
1.1 Supplyvariationwithtransistorlength. . . . . . . . . . . . . . . . . . . 4
1.2 Commonsourcecircuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.3 Thresholdvoltagevariationwithtransistorlength. . . . . . . . . . . . . 6
1.4 V mismatchcomparisonbetween40nmand28nmtechnologies.. . 9
TH
1.5 MOSintrinsicgainvs. transistorlength(Voltagegain@5xL ). . . . . 10
min
1.6 ExampleofNMOSlayoutin28nmtechnology(100fingersof3µm/1µm
toobtainatotalNMOSof300µm/1µm). . . . . . . . . . . . . . . . . . 11
1.7 MOStransitionfrequencyvstransistorlength. . . . . . . . . . . . . . . 12
1.8 OxidetrappedchargesinNMOStransistorduetoionizationradiation. 13
1.9 Thesource-drainleakagepahcreatedbybuilt-upchargeinoxide. . . . 13
2.1 TheATLASexperimentattheLargeHadronCollider[1]. . . . . . . . . 16
2.2 TheATLASMuonSpectrometer[1]. . . . . . . . . . . . . . . . . . . . . 17
2.3 Illustrationofatypicalsignalinducedforexamplebythreeionization
clusters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.4 CrosssectionofanMDTtube[2]. . . . . . . . . . . . . . . . . . . . . . . 18
2.5 ElectricalconnectionstoanMDTdrifttube[2]. . . . . . . . . . . . . . . 19
2.6 SchematicdiagramoftheMDTreadoutelectronics[2]. . . . . . . . . . 19
2.7 BlockdiagramofonecurrentASDchannel[2]. . . . . . . . . . . . . . . 20
2.8 FTfeblockdiagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.9 SimplifiedtimingdiagramoftheFTfe. . . . . . . . . . . . . . . . . . . . 22
2.10 CSPblockscheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2.11 CSPOpampschematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2.12 SchematicoftheC capacitorarray. . . . . . . . . . . . . . . . . . . . . 27
F
2.13 Thecapacitorvaluesrelatedtothedigitalwords. . . . . . . . . . . . . . 27
2.14 TheCSPoutputvoltagepeakvaluesrelatedtothedigitalwords. . . . 28
2.15 Front-enddeltaresponseforunipolarandbipolarshaping. . . . . . . . 28
2.16 Activeg -RCschematicusedasshaperstage. . . . . . . . . . . . . . . 29
m
2.17 Shaperopampschematic. . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2.18 TheShapercapacitorsvaluesrelatedtothedigitalwords. . . . . . . . . 31
2.19 TheActiveg -RCpolefrequencyvaluesrelatedtothedigitalwords. . 31
m
2.20 Resistivedividersschematics. . . . . . . . . . . . . . . . . . . . . . . . . 32
2.21 SchematicofthelogicblockwithResetandT signalsgeneration. 33
IME_DIFF
v
vi LISTOFFIGURES
2.22 FTfelayoutandroutingtopads. . . . . . . . . . . . . . . . . . . . . . . 33
2.23 FTfelayoutindetail. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.24 Chippindiagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
2.25 CSPfrequencyresponse. . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.26 Inputcurrentpulse(blue)andCSPoutputvoltage(red)for5fCinput
charge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.27 Inputcurrentpulse(blue)andCSPoutputvoltage(red)for100fCinput
charge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.28 CSPoutputpeakamplitudevs. inputcharge. . . . . . . . . . . . . . . . 38
2.29 Shaperfrequencyresponse. . . . . . . . . . . . . . . . . . . . . . . . . . 39
2.30 Input current pulse (blue) and Shaper output voltage (red) for 5fC
inputcharge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
2.31 Inputcurrentpulse(blue)andShaperoutputvoltage(red)for100fC
inputcharge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
2.32 CSPandShaperoutputsignalsfordifferentinputcharges(5÷100fC). 40
2.33 Shaperoutputpeakamplitudevs. inputcharge. . . . . . . . . . . . . . 40
2.34 Shaperpeakingtimedelayvs. inputcharge. . . . . . . . . . . . . . . . 41
2.35 CSP,Shaper,ComparatorsandResetsignalsat5fCinputcharge. . . . . 41
2.36 CSP,Shaper,ComparatorsandResetsignalsat100fCinputcharge. . . 42
2.37 Timedifferencepulseat5fCinputcharge. . . . . . . . . . . . . . . . . . 42
2.38 Timedifferencepulseat100fCinputcharge. . . . . . . . . . . . . . . . 43
2.39 Sensitivityvs. inputcharge. . . . . . . . . . . . . . . . . . . . . . . . . . 44
2.40 ENCvs. inputcharge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
2.41 SNRvs. inputcharge.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3.1 Asimplifiedsensorread-outdiagram. . . . . . . . . . . . . . . . . . . . 47
3.2 Amplifierwithinputoffsetsource. . . . . . . . . . . . . . . . . . . . . . 48
3.3 LowfrequencynoisebehaviourofaCMOSamplifier. . . . . . . . . . . 49
3.4 Auto-zerotechniqueblockdiagram. . . . . . . . . . . . . . . . . . . . . 50
3.5 Simplifiedchoppertechniquediagram. . . . . . . . . . . . . . . . . . . 51
3.6 Frequencyoperationofthechoppertechnique. . . . . . . . . . . . . . . 51
3.7 Polarity-reversedswitchschematic.. . . . . . . . . . . . . . . . . . . . . 51
3.8 Continuous-timeamplifierschematic. . . . . . . . . . . . . . . . . . . . 52
3.9 Firststageinputrail-to-railfoldedcascodeschematic. . . . . . . . . . . 53
3.10 Secondandthirdstagesdifferentialamplifiersschematic. . . . . . . . . 53
3.11 Rail-to-railoperationoftheinputstage. . . . . . . . . . . . . . . . . . . 57
3.12 Transferfunctionofthefirststage. . . . . . . . . . . . . . . . . . . . . . 58
3.13 Transferfunctionofthesecondstage. . . . . . . . . . . . . . . . . . . . 58
3.14 Transferfunctionofthethirdstage. . . . . . . . . . . . . . . . . . . . . . 59
3.15 Choppedamplifierschematic. . . . . . . . . . . . . . . . . . . . . . . . . 59
3.16 Transmissiongatestructureusedforchopperswitches. . . . . . . . . . 60
3.17 Chopperamplifierlayout. . . . . . . . . . . . . . . . . . . . . . . . . . . 60
3.18 Choppedamplifierpindiagram. . . . . . . . . . . . . . . . . . . . . . . 61
3.19 Choppedamplifierbodediagram. . . . . . . . . . . . . . . . . . . . . . 62