Design of a High Frequency FPGA Acoustic Modem for Underwater Communication

171 Pages·2012·2.04 MB·English

Design of a High Frequency FPGA Acoustic
Modem for Underwater Communication

By
Nusrat Nowsheen

A Thesis Submitted for the Degree of Masters by Research in Electrical
Engineering to the School of Engineering and Information Technology
University of New South Wales
Australian Defence Force Academy

Thesis Supervisor: Craig Benson
Thesis Co-Supervisor: Prof. Michael Frater

August 2011
©Copyright 2011 by Nusrat Nowsheen
ORIGINALITY STATEMENT

I hereby declare that this submission is my own work and to the best of my
knowledge it contains no materials previously published or written by another person,
or substantial proportions of material which have been accepted for the award of any
other degree or diploma at UNSW or any other educational institution, except where
due acknowledgement is made in the thesis. Any contribution made to the research by
others, with whom I have worked at UNSW or elsewhere, is explicitly acknowledged
in the thesis. I also declare that the intellectual content of this thesis is the product of
my own work, except to the extent that assistance from others in the project's design
and conception or in style, presentation and linguistic expression is acknowledged.

Signed ……………………………………………..........

Date ……………………………………………..............

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ACKNOWLEDGEMENTS

First of all, I like to thank and express my gratefulness to Almighty Allah for giving
me the strength and energy to complete this thesis successfully.
I wish to acknowledge my gratefulness to my thesis supervisor Mr. Craig Benson and
co-supervisor Prof. Michael Frater for their valuable advice, endless patience,
important suggestions, constant and energetic supervision, constructive criticism, and
above all scholarly guidance from beginning to the end of the research work.
However, I believe, it is not possible to properly acknowledge their efforts in written
words.
I would also like to express my heartiest gratefulness to the members of Underwater
Communications Research Group here at the School of Engineering and Information
Technology (SEIT), UNSW@ADFA. Discussions with them have enriched my
conception and knowledge about this research work. I am particularly thankful to Md.
Jahangir Alam, PhD student, Underwater Communications Research Group and Dr.
Aleksandar Davidovic, Research Staff, SEIT, UNSW@ADFA, for their suggestions
to benefit my thesis and for spending hours to help me with my practical experiment. I
am also thankful to Rohan Vincent Jacobsen, an Ex-Undergraduate student of SEIT,
for his cooperation with the FPGA environment. I would like to thank the SEIT,
UNSW@ADFA, for giving me the opportunity to carry out my research here and for
providing me with the necessary resources and materials.
Last but not the least; I would like to thank my husband Rony Hasinur Rahman, my
parents, family members and friends who have given me tremendous support and
inspiration during my research period.

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ABSTRACT
Current underwater acoustic networks mostly rely on low frequency modems. While
long range communication can be achieved with these modems, their low operating
frequencies limit the available channel bandwidth, which results in low data rates.
The low frequency acoustic channel also suffers from substantial multipath and
Doppler effects, which constrain the signal quality at the receiver. On the other hand,
strong, frequency dependent attenuation constrains the range of high frequency
underwater acoustic links. High frequency signals, however, offer substantially
greater signal bandwidth, and improved channel quality. The impact of short link
range can be reduced by multi-hop networking. This dissertation addresses the lack of
high data rate underwater acoustic modems and presents a novel design idea for a
high frequency acoustic modem for underwater communication. Reconfigurable Field
Programmable Gate Arrays (FPGAs) are used to implement computationally
extensive algorithms and provide good system functionality at low cost. This
reconfigurable, low cost modem can therefore play a significant role for development
and testing of underwater modem techniques. Our work focuses on implementing a
modem solely in an FPGA, whereas most existing modems are based on DSP
processors. The modulation scheme used is BPSK as it is simple to implement and
much less susceptible to noise than other modulation techniques frequently used
under water. Our software defined modem provides flexibility by allowing
modification with relative ease as the design evolves. This thesis demonstrates the
feasibility of a high frequency FPGA based modem which is a valuable tool to provide
a better understanding of the high frequency acoustic channel, and exploits the utility
of absorption to enhance channel re-use rates in underwater acoustic networks. The
modulator has been implemented in the FPGA and tested in laboratory and open
water to generate recordings that conform to modelling. The Matlab model of the
demodulator reconstructs the carrier and accomplishes code synchronization and
data detection from recordings of both laboratory and open water tests. The
demodulator has also been implemented in the FPGA. Test results from the
implementation are covered in this work. Design and FPGA implementation of the
individual blocks of the modem are also discussed.

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CONTENTS

Page No
ORIGINALITY STATEMENT ii
ACKNOWLEDGEMENTS iii
ABSTRACT iv
CONTENTS v-viii
LIST OF FIGURES ix-xi

Chapter One : Introduction 1-6
1.1 Underwater Acoustic Communications 1
1.2 Motivation 2
1.3 Aims and Objectives 4
1.4 Overview 5
1.5 Outline of the Thesis 6

Chapter Two : Fundamentals of Digital Communication 7-25
2.1 Introduction 7
2.2 Digital Communication 7
2.3 Modulation and Demodulation 9
2.3.1 Amplitude Shift Keying (ASK) 10
2.3.2 Frequency Shift Keying (FSK) 11
2.3.3 Phase Shift Keying (PSK) 12
2.4 Channel Capacity 13
2.5 Signal-to-Noise Ratio (SNR) 15
2.6 Synchronization 17
2.6.1 Phase Synchronization using PLL 17
2.6.2 Symbol Synchronization 21
2.7 Doppler Effect, ISI and Multipath 22
2.8 Pulse Shaping 23
2.9 Performance Measurement of Communication System 24
2.10 Summary 25

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Chapter Three : Underwater Acoustic Communications 26-50
3.1 Introduction 26
3.2 Mobile Ad-hoc Networks 26
3.3 Wireless Sensor Networks 28
3.4 Underwater Acoustic Networks 31
3.5 Modulation Techniques for Underwater Communication 36
3.6 Underwater Modems 39
3.6.1 Low vs High Frequency Modems 39
3.6.2 DSP vs FPGA Modems 40
3.6.3 Hardware vs Software Modems 41
3.7 Existing Underwater Modems 43
3.8 Summary 49

Chapter Four : High Frequency FPGA Acoustic Modem 51-66
4.1 Introduction 51
4.2 BPSK Modulator 51
4.3 BPSK Demodulator 54
4.3.1 Numerically Controlled Oscillator (NCO) 56
4.3.2 Root Raised Cosine Filter (LPF 1) 58
4.3.3 Low Pass Filter (LPF 2) 60
4.3.4 Hard Limiter 62
4.4 Bit Synchronization 63
4.5 Summary 66

Chapter Five : Implementation and Performance 67-117
Analysis
5.1 Introduction 67
5.2 Overview of Altium Winter 09 67
5.3 Overview of Altera Cyclone III 70
5.4 High-Speed A/D and D/A Development Kit 71

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5.5 Implementation of the Modulator 71
5.5.1 Binary Data Bit Generation 72
5.5.2 Upsample and Dirac Delta Pulse Generation 73
5.5.3 Carrier Generation 74
5.5.4 Root Raised Cosine Low Pass Filter 75
5.5.5 Multiplication 78
5.6 Implementation of the Demodulator 78
5.6.1 LPF 1 79
5.6.2 LPF 2 79
5.6.3 NCO 82
5.6.4 Hard Limiter and Multiplier 83
5.7 Experimental Set-up and Test Results 85
5.7.1 Testing Individual Components 85
5.7.2 Modem - Initial Verification using Square
Pulse Input Signal 90
5.7.3 FPGA Modem 105
5.8 Constellation Diagram of BPSK 113
5.9 Lock-on Characteristics of the Costas Loop 115
5.10 Summary 117

]
Chapter Six : Summary and Conclusion 118-121
6.1 Summary 118
6.2 Conclusion 119
6.3 Future Work 120

References : 122-132

Appendix A : Sample Schematics and VHDL Files 133-157
A.1 FPGA Schematic of the BPSK Modulator 133
A.2 Defining Logic Constants 135
A.3 Packet Transmission and Pause Time 136
A.4 Clock Division 137

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A.5 Carrier Generation 138
A.6 Binary Data Bit Generation 140
A.7 Changing the Magnitude Level 140
A.8 Upsample and Dirac Delta Generation 141
A.9 Sample Schematic of the LPF 1 142
A.10 Sample Schematic of One Tap of LPF 1 143
A.11 Generation of Modulated Signal 145
A.12 Sample Schematic of the Demodulator 146
A.13 Reading Incoming Signal using ADC 146
A.14 Multiplication of Incoming Signal and Carrier 147
A.15 Sample Schematic of the NCO 148
A.16 Sample Schematic of the LPF 2 154
A.17 Sample Schematic of the Hard Limiter 155
A.18 Sample Snapshot of the Constraint File 157

Appendix B : Published Papers 158-160
B.1 Nusrat Nowsheen, Craig Benson and Michael Frater, 158
“A High Data-Rate, Software-Defined Underwater
Acoustic Modem”, MTS/IEEE Oceans, Seattle, 2010.

B.2 Nusrat Nowsheen, Craig Benson and Michael Frater, 159
“Design of a High Frequency FPGA Acoustic Modem
for Underwater Communication”, IEEE Oceans,
Sydney, 2010.

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LIST OF FIGURES

Figure Page
2.1 Block Diagram of a Digital Communication System 8
2.2 Block Diagram of a Digital Modem 10
2.3 Schematic of the Basic PLL 18
2.4 Block Diagram of LUT based NCO (Dotted Rectangle is the PA) 21
3.1 An Ad-hoc Network of Mobile Nodes 28
3.2 A Wireless Sensor Network 30
3.3 An Underwater Acoustic Sensor Network 33
3.4 Multipath Effect in Underwater 35
4.1 Block Diagram of BPSK Modulator 52
4.2 BPSK Demodulation using the Costas Loop 54
4.3 Block Diagram of NCO 57
4.4 Block Diagram of LPF 1 59
4.5 Block Diagram of LPF 2 61
4.6 a) Block Diagram of Hard Limiter and Multiplier in the
Costas Loop 63
b) Hard Limiter followed by Multiplier in FPGA
Demodulator 63
4.7 Working Principle of Bit Synchronization 65
5.1 Binary Data Bit Generation in FPGA 72
5.2 Generation of Dirac Delta in FPGA 74
5.3 Carrier Generation in FPGA 74
5.4 FPGA Implementation of One Tap Filter 76
5.5 FPGA Implementation of Two Tap Filter 77
5.6 Generation of Modulated Signal in FPGA 78
5.7 FPGA Implementation of LPF 2 81
5.8 Implementation of NCO in the FPGA 83
5.9 FPGA Implementation of Hard Limiter and Third Multiplier 84
5.10 a) NCO Output with 0.5 Phase Increment 86

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b) NCO Output with 0.75 Phase Increment 86
5.11 a) Calculated Frequency Response with Original MATLAB
Coefficients 87
b) Calculated Frequency Response with Quantized FPGA
Coefficients 87
5.12 a) Impulse Response with Original Filter Coefficients 88
b) Impulse Response with Quantized Filter Coefficients 88
c) Impulse Response of Multiplication-free Filter with
Quantized Coefficients 89
d) Figures 5.12(a), 5.12(b) and 5.12(c) Superimposed 90
5.13 Tank Set-up 91
5.14 Sample BPSK Modulator for 80 kbps at 800 kHz Carrier in Tank 92
5.15 Demodulated BPSK Signal for Tank Recording 93
5.16 Lake Test Set-up with 1 m Distance 94
5.17 Sample BPSK Modulator for 80 kbps at 800 kHz Carrier at Lake
with 1 m Distance 94
5.18 Demodulated BPSK Signal for Lake Recording with 1 m Distance 95
5.19 Lake Test Set-up with 2 m Distance 96
5.20 Sample BPSK Modulator for 80 kbps at 800 kHz Carrier at Lake
with 2 m Distance 96
5.21 Demodulated BPSK Signal for Lake Recording with 2 m Distance 97
5.22 Lake Test Set-up with 10 m distance 97
5.23 Sample BPSK Modulator for 80 kbps at 800 kHz Carrier at Lake
with 10 m Distance 98
5.24 Demodulated BPSK Signal for Lake Recording with 10 m
Distance 98
5.25 Distance between Transmitter and Receiver vs SNR 99
5.26 Range vs Loss in Fresh Water at 800 kHz 100
5.27 Lake Test Set-up using Two Boats 101
5.28 Sample BPSK Modulator for 80 kbps at 800 kHz Carrier in Lake
for 15 m Distance 101
5.29 Demodulated Data along with I and Q for 15 m Distance in Lake 102
5.30 Black Mountain Tower, Lake Burley Griffin, Canberra, Australia 103

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