Design for Reliability of Low-voltage, Switched-capacitor Circuits by Andrew Masami Abo BS

145 Pages·1999·0.61 MB·English

Design forReliabilityofLow-voltage,
Switched-capacitorCircuits
by
AndrewMasami Abo
B.S.(CaliforniaInstituteofTechnology)1992
Adissertationsubmittedinpartialsatisfactionofthe
requirementsforthe degreeof
DoctorofPhilosophy
in
Engineering—ElectricalEngineeringand
ComputerSciences
inthe
GRADUATE DIVISION
ofthe
UNIVERSITYofCALIFORNIA,Berkeley
Committeein charge:
ProfessorPaulR.Gray,Chair
ProfessorBernhardE. Boser
ProfessorIlanAdler
Spring1999

The dissertationofAndrewMasami Abois approved
Chair Date
Date
Date
UniversityofCalifornia,Berkeley
Spring1999

Design forReliabilityofLow-voltage,
Switched-capacitorCircuits
Copyright c 1999
(cid:13)
by
AndrewMasami Abo

Abstract
Design forReliabilityofLow-voltage,
Switched-capacitorCircuits
by
AndrewMasami Abo
DoctorofPhilosophyinEngineering
UniversityofCalifornia,Berkeley
ProfessorPaulR.Gray,Chair
Analog,switched-capacitorcircuitsplayacriticalroleinmixed-signal,analog-
to-digital interfaces. They implement a large class of functions, such as sam-
pling,filtering,anddigitization. Furthermore,theirimplementationmakesthem
suitableforintegrationwithcomplex,digital-signal-processingblocksinacom-
patible,low-costtechnology–particularlyCMOS.Evenasanincreasinglylarger
amount of signal processing is done in the digital domain, this critical, analog-
to-digitalinterfaceisfundamentallynecessary. Examplesofsomeintegratedap-
plicationsincludecamcorders,wireless LANtransceivers,digitalset-topboxes,
andothers.
AdvancesinCMOStechnology,however,aredrivingtheoperatingvoltageof
integratedcircuits increasinglylower. As device dimensions shrink,theapplied
voltages will need to be proportionately scaled in order to guarantee long-term
reliabilityand managepowerdensity.
The reliability constraints of the technology dictate that the analog circuitry
operateatthesamelowvoltageasthedigitalcircuitry. Furthermore,inachieving
low-voltage operation, the reliability constraints of the technology must not be
violated.
ThisworkexaminesthevoltagelimitationsofCMOStechnologyandhowana-
log circuits can maximize the utility of MOS devices without degrading relia-
1
bility. An emphasis is placed on providing circuit solutions that do not require
process enhancements. The specific research contributionsofthis workinclude
(1) identifying the MOS device reliability issues that are relevant to switched-
capacitor circuits, (2) introduction of a new bootstrap technique for operating
MOStransmissiongatesonalowvoltagesupplywithoutsignificantlydegrading
devicelifetime,(3)developmentoflow-voltageopampdesigntechniques. With
thesedesigntechniquesbuildingblocksnecessaryforswitched-capacitorcircuits
canbeimplemented,enablingthecreationofsampling,filtering,anddataconver-
sion circuits on low-voltagesupplies. As a demonstration, the design and char-
acterizationof an experimental1.5V,10-bit,14.3MS/s, CMOS pipelineanalog-
to-digitalconverterispresented.
PaulR.Gray,Chair
2
Contents
Acknowledgments vii
Chapter1 Introduction 1
Chapter2 Switched-CapacitorBuildingBlocks 5
2.1 Sample-and-hold(S/H)............................................... 5
2.1.1 Top-plateS/H................................................. 5
2.1.2 Bottom-plateS/H ............................................ 8
2.2 Gain stage ............................................................. 11
2.3 Integrator.............................................................. 14
2.4 Comparator............................................................ 14
Chapter3 Switched-CapacitorApplications 19
3.1 Filters.................................................................. 19
3.2 Sigma-deltaanalog-to-digitalconverters ............................ 27
3.3 PipelineAnalog-to-digitalconverters................................ 28
3.4 Capacitordigital-to-analogconverters............................... 30
Chapter4 CMOSTechnologyScaling 33
4.1 CMOS Scaling ........................................................ 34
4.2 Voltagescaling forlowpower........................................ 35
4.3 Voltagescaling forreliability......................................... 38
4.3.1 Gateoxidebreakdown....................................... 38
4.3.2 Hot-electroneffects .......................................... 41
4.4 Fundamentalscalinglimits........................................... 44
iii
iv CONTENTS
4.5 Analogcircuitintegration ............................................ 45
Chapter5 Low-voltageCircuitDesign 49
5.1 Low-voltage,switched-capacitordesign issues ..................... 49
5.2 Reliable,high-swingMOSswitch ................................... 53
5.2.1 Operation..................................................... 54
5.2.2 Designguidelines ............................................ 56
5.2.3 Layoutconsiderations........................................ 59
5.3 Opamp................................................................. 62
5.3.1 Application................................................... 63
5.3.2 Topology...................................................... 64
5.3.3 Biasing........................................................ 64
5.3.4 LinearSettlingtime.......................................... 67
5.3.5 Slewrate...................................................... 74
5.3.6 Noise.......................................................... 76
5.3.7 DCgain....................................................... 77
5.3.8 Common-modefeedback.................................... 77
5.4 Comparator............................................................ 78
5.4.1 Offset ......................................................... 80
5.4.2 Meta-stability................................................. 83
5.4.3 Pre-amplifierbandwidth ..................................... 84
Chapter6 PipelineADCArchitecture 85
6.1 PipelineADC architecture............................................ 85
6.2 1.5-bit/stagearchitecture ............................................. 86
6.3 1.5 bit/stageimplementation ......................................... 89
6.4 Pipelinestage accuracyrequirements................................ 90
6.4.1 Capacitormatching .......................................... 90
6.4.2 Capacitorlinearity ........................................... 91
6.4.3 OpampDCgain.............................................. 92
6.4.4 Opampsettling ............................................... 93
6.4.5 Thermalnoise ................................................ 93