Computer Architecture: Software Aspects, Coding, and Hardware

432 Pages·2001·15.99 MB·English

by  John Y. Hsu

1026R_TitlePage 7/28/03 9:40 AM Page 1
COMPUTER
ARCHITECTURE
Software Aspects,
Coding, and Hardware
John Y. Hsu
CRC PR ESS
Boca Raton London New York Washington, D.C.
1026 FM & INTRO 6/23/2001 5:09 PM Page 2
Library of Congress Cataloging-in-Publication Data
Hsu, John Y.
Computer architecture : software aspects, coding, and hardware / John Y. Hsu.
p. cm.
Includes bibliographical references and index.
ISBN 0-8493-1026-1 (alk. paper)
1. Computer architecture. 2. Computer software. I. Title
QA76.9.A73 H758 2001
004.2′.2—dc21 00-050741
This book contains information obtained from authentic and highly regarded sources. Reprinted material
is quoted with permission, and sources are indicated. A wide variety of references are listed. Reasonable
efforts have been made to publish reliable data and information, but the author and the publisher cannot
assume responsibility for the validity of all materials or for the consequences of their use.
Neither this book nor any part may be reproduced or transmitted in any form or by any means, electronic
or mechanical, including photocopying, microfilming, and recording, or by any information storage or
retrieval system, without prior permission in writing from the publisher.
The consent of CRC Press LLC does not extend to copying for general distribution, for promotion, for cre-
ating new works, or for resale. Specific permission must be obtained in writing from CRC Press LLC for
such copying.
Direct all inquiries to CRC Press LLC, 2000 N.W. Corporate Blvd., Boca Raton, Florida 33431.
Trademark Notice:Product or corporate names may be trademarks or registered trademarks, and are used
only for identification and explanation, without intent to infringe.
Visit the CRC Press Web site at www.crcpress.com
©2001 by CRC Press LLC
No claim to original U.S. Government works
International Standard Book Number 0-8493-1026-1
Library of Congress Card Number 00-050741
Printed in the United States of America 2 3 4 5 6 7 8 9 0
Printed on acid-free paper
Preface
MotiveforWritingThis Book
After having published my first book, Computer Networks: Architecture,
Protocols, andSoftware, friends asked me how long it took to write the book. My
reply was thatonthesurface ittookaboutthreeyearsfrom beginningtoend; below
thesurfaceittookmorelikethirtyyears. Yet,myjobisnotdoneunlessIwriteabook
oncomputerarchitecture and discuss someofthe background Inaterials. Mostfirst
generationcomputerarchitectsarephysicistswholearnedeverythingaboutcomput
ers on thejob. Second generation computer architects studied the basics in school
andlaterpracticedinindustry. My academictrainingenabledme toread thedesign
documents of IBM 360 Operating Systems in the 1970s. This painstaking effort
broadened my horizons about real issues, and to this day I feel very much obliged.
Inthe 1990s,whileIstudiedthebluebookonthetelecommunicationnetworkdesign
by ITU-T (International Telecommunications Union - Telecommunication
StandardizationSector), Iwasableto makesuggestionsforimproving thedesign.
Asyoumaynotknow, in 1962Icametothisgreatcountrywithoutapenny. My
lifehaschangedeversincemy latefriend BobChenconvinced metostudycomput
ers. Backthenweknewsolittleaboutcomputersandittook us threemonths tofind
outthatacompilerissoftware,nothardware. Today,acompilercanbeembeddedin
hardware. Technologiescomeandgo,buttheoriesremain. Maythisbookbringyou
confidenceandsuccess.
Who Should ReadThis Book
This bookdiscusses computerarchitectural topics from a beginner's level to an
advancedlevelandexplainsthereasonsbehindcertaincomputerdesign. Preferably,
readers should be familiar with at least one programming language and Boolean
algebra. Theintendedaudiencemainlyconsistsof:
• Undergraduatestudentsofcomputerscience (theselectedtopics
in thisbookcanbelectured in60to80hours)
• Undergraduatestudentsofcomputerengineering andelectrical
engineering
• Professionals in theelectronics industry
After grasping the system concepts, readers can proceed to study more topics on
computerhardware, systemsoftware, andnetworks.
© 2001 by CRC Press LLC
Organization ofThis Book
This bookhas tenchapters. The first fourchapters coverfundamental computer
principles. Chapter 5 continues the discussion of intermediate level topics and
Chapter 6 describes microprogrammed CPUs. Chapter 7 discusses superscalar
machine principles. Chapter 8 covers vector and multiple-processor machines.
Chapter9isdevotedto processordesigncasestudies and virtual machines. Finally,
Chapter 10 teaches stack machine principles and the design of a virtual stack
machine. Everycomputersciencemajorshouldread thischapterbeforegraduation.
Abriefdescriptionofeachchapteris given below.
Chapter 1introduces the history ofcomputers, hardware components, software
components, application programs, computer simulation, and the program design
language to describe logic flow. After learning the basics of disk files and com
mands, readers areready to run aprogramon an IBM PC.
The second chapterdiscusses numbersystems and basic mathematics in regard
to computing. Topics include positional notation, radix, numberconversions, inte
gers, negativeintegers, floating points, packeddecimals, andcharacters.
Chapter 3 introduces the stored program concept, instruction format, and basic
computer principles. Topics include opcodes, addresses, instruction register, and
instruction address register. A register transfer language is introduced to describe
CPU operations - instruction fetch and operand execution. Other general topics
include carry look-ahead adders, hardwired logic, microprogrammed logic, hybrid
logic, andsoftwareinterpretation.
Chapter4 covers assembly language that is used to describe the internal opera
tions at the target machine level. The purpose is to develop basic coding skills.
Becauseofitspopularity, the Pentiumprocessoris usedasatool todescribeinstruc
tion executions in a computer. Topics include assembly language syntax, machine
ops, pseudoops, basicaddressing modes, looping, andmacros.
Chapter5coversthecommondesignfeaturesofacentralprocessor. Generaltop
icsincludeaddressing modes, indexing, subroutinelinking, interrupts,I/Ostructure,
I/OprogramIning,softwarepolling,directmemoryaccess,memorymappedI/O,and
cyclestealing.
Chapter6focuses on thedesignofamicroprogrammedCPUusingsegmentbase
registers. Theexecution ofmicrocode is overlapped with target instruction fetches.
Topics include microcode engine, encoding, sequence control, conditional branch,
and unconditional branch. Via a single adder, discussion is given to the algorithms
forunsignedmultiply,signedmultiply,unsigneddivide,andsigneddivide,aswellas
floating pointoperations.
Chapter 7 covers all the look-ahead, look-aside, and look-behind features of
supersca)armachinedesign. Abalancedsystemallowsall thehardwarecomponents
tooperatein parallel. Selectedtopicsincludestoragehierarchy, resourcedependen
cies, one-clock shifter, multiplication trees for unsigned or signed numbers,
pipelined CPUs, instruction queues, instruction caches, data caches, decoupled
pipes, and virtual memory.
© 2001 by CRC Press LLC
Chapter 8 discusses vector and multiple-processor machines. The multiple
processormachine class consists ofmultistation systems, multiprocessing systems,
and computer networks. Selected topics include processor-to-processorcommuni
cations, intertaskmessages, protocols, localareanetworks, and wide areanetworks.
Chapter9focuses on processordesign casestudies. Examples include theIBM
mainframe, PowerPC,Alpha, Itanium, and thereducedsoftwaresolutioncomputer.
Attheendofchapter, we introducevirtual machines and theJAVAengine.
The final chapter continues the discussion on stack machine design. Essential
topics include postfix notation, operatorstack, operand stack, S-ops, and the design
ofavirtual stackmachine.
Acknowledgements
Iam forever grateful to my teachers, particularly C. L. Sheng, Martin Graham,
Ivan Frisch,ArthurGill, and Paul Morton. They taught me how to face challenges
andendure. AndyGrove, acolleagueatFairchildin 1967, was kindenough tosend
methetechnical manualsonPentium. Thisbook,inpartorwhole, was reviewedby
manyindividuals. Mystudents, includingDillerRyan, Zetri Prasetyo, KurtVoelker,
IhabBisha,TamTran, and DeloraSowle, were all helpful. Isalute all the reviewers
whohelpedme shapethemanuscripttoitsfinal form. Someoftheirnamesandaffil
iations are: Alan Beverly (Ziatech), Dave Braun (Cal Poly), Wesley Chu (UCLA),
Jim Gray (Microsoft), Elmo Keller (Cal Poly), Steve Luck (Hitachi), Miroslaw
Malek (Humboldt U., Germany), Frederick Petry (Tulane), Cornel Pokorny (Cal
Poly),C.Ramamoorthy(U.ofCalifomia,Berkeley),andCharlesSummers(Telesoft
International). The artwork for the figures was done by Long T. Nguyen. Gerald
Papkeandhis projectteamatCRC Pressdeserve recognition.
JohnY. Usu
San Luis Obispo
© 2001 by CRC Press LLC
About the Author
JohnY.HsureceivedhisB.S.E.EfromNationalTaiwanUniversity(1955-59);his
M.S.E.E.(1963-64)andPh.D. (1967-69)fromtheUniversityofCalifornia,Berkeley
specializingincomputersystemhardwareand software. He iscurrentlyaprofessor
of computer engineering at California Polytechnic State University in San Luis
Obispo. In the academic year of 1979, he was a visiting research professor at
NationalTaiwanUniversity. Hehasheldmanyindustrialjobtitles,suchascomputer
architect, project engineer, and seniorsoftware specialist. In addition, he has done
over10,000hoursofconsultingworkforcompanies including Federal Electric/ITT,
ILLIACIV, III inTaiwan, CDC, IBM,etc. He is the authorofComputerNetworks:
Architecture, ProtocolsandSoftware, Artech House, 1996. Dr. Hsu is a memberof
IEEEandACM.
© 2001 by CRC Press LLC
To Sheryl, my wifefor3.5 decades
© 2001 by CRC Press LLC
Acronyms and Abbreviations
/\ exponential, concatenate
A address; auxiliary
ace accumulator
ACIA asynchronouscommunicationsinterfaceadaptor
ACM AssociationofComputingMachinery
adc addwithcarry
AIX advanced UNIX
ALU arithmetic andlogic unit
AM access method
ANSI American National StandardsInstitute
ASCII American standardcodeforinformationinterchange
b bit, binarydigit
B byte
BCD binarycodeddecimal
bit binarydigit
BP basepointer
bps bitpersecond
Bps bytepersecond
BU bus unit
C carry
CACM conununicationsoftheACM
CATV CommunityAntennaTelevisionorCableTV
CC,cc conditioncode
CD compactdisc
CF carry flag
clse
complexinstructionsetcomputer
com communication;commercial
CPI clocks perinstruction
CPU centralprocessing unit
CS codesegment
CU controlunit
D decimal;delay; direction; displacement
DARPA DefenceAdvanced Research ProjectAgency
db decibel (decimal bel); definebyte
dc,DC defineconstant; directcurrent; dynamiccode
Disp displacement
div divide
DMA directmemoryaccess
DMC differential Manchestercode
dopd destinationoperand
DRAM dynamicrandom access memory
DS datasegment;definestorage
© 2001 by CRC Press LLC
EA effectiveaddress
EBCDIC extendedbinarycodeddecimalforinformation interchange
EC externalcode
EISA extendedindustry standardarchitectureI/Obus
e-mail electronicmail
endm endmacro
endp end procedure
ends endsegment
ENOR exclusivenor
EOR exclusiveor
Epb errors perbit
EPROM erasableprogralnmableread-only memory
EPT externalpagetable
equ equate
ES extrasegment;external symbol
EU execution unit
Exp exponent, exponential
F flags register
FAT file allocation table
IT flip-flop
fixed fixed point
float floating point
ftp file transferprotocol
g,G giga: 109to measurespeedor230tomeasure memory size
gbps gigabitpersecond
GC global code
ghz gigahertz
GPR general purposeregister
GR general register
hex hexadecimal
hz hertz
JA-32 Intel architecture-32bits
IA-64 Intel architecture-64bits
JAR instructionaddressregister
Ie
integratedcircuit
ID instructiondecoder; identifier
IEEE InstituteofElectrical andElectronicsEngineers
IH interrupthandler
Int interrupt
Internet inter-networking
110 Input/Output
lOR I/Oregister
IP instruction pointer; internetprotocol
IR instructionregister
ISA instruction setarchitecture; industrystandardarchitectureI/Obus
ISDN integratedservicesdigital network
ISR interruptserviceroutine
IV instructionunit
© 2001 by CRC Press LLC