Circuit Simulation

344 Pages·2010·1.45 MB·English

by  Farid N. Najm

CIRCUIT SIMULATION

CIRCUIT SIMULATION
Farid N. Najm
A JOHN WILEY &SONS, INC., PUBLICATION
Copyright©2010byJohnWiley&Sons,Inc.Allrightsreserved.
PublishedbyJohnWiley&Sons,Inc.,Hoboken,NewJersey.
PublishedsimultaneouslyinCanada.
Nopartofthispublicationmaybereproduced,storedinaretrievalsystem,ortransmittedinany
formorbyanymeans,electronic,mechanical,photocopying, recording,scanning,orotherwise,
exceptaspermittedunderSection107or108ofthe1976UnitedStatesCopyrightAct,without
eitherthepriorwrittenpermissionofthePublisher,orauthorizationthroughpaymentofthe
appropriateper-copyfeetotheCopyrightClearanceCenter,Inc.,222RosewoodDrive,Danvers,
MA01923,[phone],fax[phone],oronthewebatwww.copyright.com.Requests
tothePublisherforpermissionshouldbeaddressedtothePermissionsDepartment,JohnWiley&
Sons,Inc.,111RiverStreet,Hoboken,NJ07030,[phone],fax[phone],oronlineat
http://www.wiley.com/go/permission.
LimitofLiability/DisclaimerofWarranty:Whilethepublisherandauthorhaveusedtheirbest
effortsinpreparingthisbook,theymakenorepresentationsorwarrantieswithrespecttothe
accuracyorcompletenessofthecontentsofthisbookandspecificallydisclaimanyimplied
warrantiesofmerchantabilityorfitnessforaparticularpurpose.Nowarrantymaybecreatedor
extendedbysalesrepresentativesorwrittensalesmaterials.Theadviceandstrategiescontained
hereinmaynotbesuitableforyoursituation.Youshouldconsultwithaprofessionalwhere
appropriate.Neitherthepublishernorauthorshallbeliableforanylossofprofitoranyother
commercialdamages,includingbutnotlimitedtospecial,incidental,consequential,orother
damages.
Forgeneralinformationonourotherproductsandservicesorfortechnicalsupport,pleasecontact
ourCustomerCareDepartmentwithintheUnitedStatesat(800)762-2974,outsidetheUnited
Statesat(317)572-3993orfax(317)572-4002.
Wileyalsopublishesitsbooksinavarietyofelectronicformats.Somecontentthatappearsinprint
maynotbeavailableinelectronicformats.FormoreinformationaboutWileyproducts,visitour
websiteatwww.wiley.com.
LibraryofCongressCataloging-in-PublicationData:
Najm,FaridN.
Circuitsimulation/FaridN.Najm.
p.cm.
Includesbibliographicalreferencesandindex.
ISBN978-0-470-53871-5
1. Electroniccircuits–Computersimulation. 2. Electroniccircuits–Mathematicalmodels.
3. Integratedcircuits–Computersimulation. I. Title.
TK7867.N332010
621.381501013–dc22
2009022673
PrintedintheUnitedStatesofAmerica.
10987654321
To my wife,Diana,
and to our two daughters,
LilyMarie andTanyaKristen.

CONTENTS
List of Figures xiii
List of Tables xix
Preface xxi
1 Introduction 1
1.1 Device Equations 2
1.2 Equation Formulation 3
1.3 Solution Techniques 6
1.3.1 Nonlinear Circuits 7
1.3.2 Dynamic Circuits 8
1.4 Circuit Simulation Flow 8
1.4.1 Analysis Modes 9
Notes 10
Problems 10
2 Network Equations 13
2.1 Elements and Networks 13
2.1.1 Passive Elements 13
2.1.2 Active Elements 15
2.1.3 Equivalent Circuit Model 17
2.1.4 Network Classification 18
2.2 Topological Constraints 19
2.2.1 Network Graphs 19
2.3 Cycle Space and Bond Space 23
2.3.1 Current Assignments 23
2.3.2 Voltage Assignments 24
2.3.3 Orthogonal Spaces 24
2.3.4 Topological Constraints 25
vii
viii CONTENTS
2.3.5 Fundamental Circulation 25
2.3.6 Fundamental Potential Difference 27
2.4 Formulation of Linear Algebraic Equations 27
2.4.1 Sparse Tableau Analysis 28
2.4.2 Nodal Analysis 29
2.4.3 Unique Solvability 30
2.4.4 Modified Nodal Analysis 32
2.5 Formulation of Linear Dynamic Equations 42
2.5.1 Dynamic Element Stamps 43
2.5.2 Unique Solvability 44
Notes 45
Problems 45
3 Solution of Linear Algebraic Circuit Equations 49
3.1 Direct Methods 50
3.1.1 Matrix Preliminaries 50
3.1.2 Gaussian Elimination (GE) 54
3.1.3 LU Factorization 60
3.1.4 Block Gaussian Elimination 71
3.1.5 Cholesky Decomposition 73
3.2 Accuracy and Stability of GE 74
3.2.1 Error 75
3.2.2 Floating Point Numbers 78
3.2.3 Norms 80
3.2.4 Stability of GE and LU Factorization 83
3.2.5 Pivoting for Accuracy 86
3.2.6 Conditioning of Ax Db 89
3.2.7 Iterative Refinement 96
3.3 Indirect/Iterative Methods 97
3.3.1 Gauss-Jacobi 98
3.3.2 Gauss-Seidel 99
3.3.3 Convergence 100
3.4 Partitioning Techniques 104
3.4.1 Node Tearing 104
3.4.2 Direct Methods 106
3.4.3 Indirect Methods 107