Circuit and Interconnect Design for High Bit-Rate Applications (Analog Circuits and Signal Processing)

256 Pages·2008·7.51 MB·English

by  Hugo Veenstra

Circuit and Interconnect Design
for RF and High Bit-Rate Applications
ANALOGCIRCUITSANDSIGNALPROCESSINGSERIES
ConsultingEditor:MohammedIsmail.OhioStateUniversity
TitlesinSeries:
THEGM/IDDESIGNMETHODOLOGYFORCMOSANALOGLOWPOWERINTEGRATEDCIRCUITS
Jespers,PaulG.A.
ISBN-10:0-387-47100-6
CIRCUITANDINTERCONNECTDESIGNFORRFANDHIGHBIT-RATEAPPLICATIONS
Veenstra,Hugo,Long,JohnR.
ISBN:978-1-4020-6882-9
HIGH-RESOLUTIONIF-TO-BASEBANDSIGMADELTAADCFORCARRADIOS
Silva,PauloG.R.,Huijsing,JohanH.
ISBN:978-1-4020-8163-7
SILICON-BASEDRFFRONT-ENDSFORULTRAWIDEBANDRADIOS
Safarian,Aminghasem,Heydari,Payam
ISBN:978-1-4020-6721-1
HIGH-LEVELMODELINGANDSYNTHESISOFANALOGINTEGRATEDSYSTEMS
Martens,EwoutS.J.,Gielen,Georges
ISBN:978-1-4020-6801-0
MULTI-BANDRFFRONT-ENDSWITHADAPTIVEIMAGEREJECTION
ADECT/BLUETOOTHCASESTUDY
Vidojkovic,V.,vanderTang,J.,Leeuwenburgh,A.,vanRoermund,A.H.M.
ISBN:978-1-4020-6533-0
BASEBANDANALOGCIRCUITSFORSOFTWAREDEFINEDRADIO
Giannini,Vito,Craninckx,Jan,Baschirotto,Andrea
ISBN:978-1-4020-6537-8
DESIGNOFHIGHVOLTAGEXDSLLINEDRIVERSINSTANDARDCMOS
Serneels,Bert,Steyaert,Michiel
ISBN:978-1-4020-6789-1
CMOSMULTI-CHANNELSINGLE-CHIPRECEIVERSFORMULTI-GIGABITOPT...
Muller,P.,Leblebici,Y.
ISBN978-1-4020-5911-7
ANALOG-BASEBANDARCHITECTURESANDCIRCUITS
FORMULTISTANDARDANDLOW-VOLTAGEWIRELESSTRANSCEIVERS
Mak,PuiIn,U,Seng-Pan,Martins,RuiPaulo
ISBN:978-1-4020-6432-6
FULL-CHIPNANOMETERROUTINGTECHNIQUES
Ho,Tsung-Yi,Chang,Yao-Wen,Chen,Sao-Jie
ISBN:978-1-4020-6194-3
ANALOGCIRCUITDESIGNTECHNIQUESAT0.5V
Chatterjee,S.,Kinget,P.,Tsividis,Y.,Pun,K.P.
ISBN-10:0-387-69953-8
LOW-FREQUENCYNOISEINADVANCEDMOSDEVICES
vonHaartman,M.,Östling,M.
ISBN978-1-4020-5909-4
SWITCHED-CAPACITORTECHNIQUESFORHIGH-ACCURACYFILTERANDADC...
Quinn,P.J.,Roermund,A.H.M.v.
ISBN978-1-4020-6257-5
ULTRALOWPOWERCAPACITIVESENSORINTERFACES
Bracke,W.,Puers,R.(etal.)
ISBN978-1-4020-6231-5
BROADBANDOPTO-ELECTRICALRECEIVERSINSTANDARDCMOS
Hermans,C.,Steyaert,M.
ISBN978-1-4020-6221-6
CMOSSINGLECHIPFASTFREQUENCYHOPPINGSYNTHESIZERSFORWIRELESS
MULTI-GIGAHERTZAPPLICATIONS
Bourdi,Taoufik,Kale,Izzet
ISBN:978-1-4020-5927-8
CMOSCURRENT-MODECIRCUITSFORDATACOMMUNICATIONS
Yuan,Fei
ISBN:0-387-29758-8
ADAPTIVELOW-POWERCIRCUITSFORWIRELESSCOMMUNICATIONS
Tasic,Aleksandar,Serdijn,WouterA.,Long,JohnR.
ISBN:978-1-4020-5249-1
PRECISIONTEMPERATURESENSORSINCMOSTECHNOLOGY
Pertijs,MichielA.P.,Huijsing,JohanH.
ISBN-10:1-4020-5257-X
Hugo Veenstra John R. Long
•
Circuit and Interconnect
Design for RF and High
Bit-Rate Applications
ABC
Dr.HugoVeenstra Prof.Dr.JohnR.Long
PhilipsResearch DelftUniversityofTechnology
HighTechCampus37 ElectronicsResearchLab.
BuildingWY1.004 Mekelweg4
5656AEEindhoven 2628CDDelft
Netherlands ETBldg.
Netherlands
ISBN978-1-4020-6882-9 e-ISBN978-1-4020-6884-3
LibraryofCongressControlNumber:2008926523
(cid:176)c 2008SpringerScience+BusinessMediaB.V.
Nopartofthisworkmaybereproduced,storedinaretrievalsystem,ortransmittedinanyformorby
anymeans,electronic,mechanical,photocopying,microfilming,recordingorotherwise,withoutwritten
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Printedonacid-freepaper
9 8 7 6 5 4 3 2 1
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Contents
Preface............................................................ ix
1 TheChallenge ................................................. 1
1.1 Interconnect ............................................... 6
1.2 DeviceMetrics............................................. 8
1.3 Cross-ConnectSwitches..................................... 10
1.4 TransistorOperationaboveBV ............................ 13
CEO
1.5 CMLCircuits,PRBSGenerator .............................. 16
1.6 Oscillators ................................................ 19
1.7 OutlineoftheBook......................................... 21
References..................................................... 23
2 InterconnectModelling,AnalysisandDesign...................... 25
2.1 Introduction ............................................... 25
2.2 TransmissionLineTheory ................................... 29
2.2.1 Single-EndedLines .................................. 29
2.2.2 DifferentialLines .................................... 34
2.3 WhentoIncludeTransmissionLineEffects..................... 37
2.4 SecondaryEffects .......................................... 38
2.4.1 EffectofthePassivationLayer ......................... 39
2.4.2 EffectoftheSubstrate;Slow-WaveEffects............... 39
2.4.3 SkinEffect.......................................... 42
2.5 Resistivity-FrequencyModeChartforaMicrostripLine.......... 47
2.6 PreferredTransmissionLineConfigurations .................... 51
2.7 ApplyingtheSkinEffectFormulastoaSiGeBiCMOSProcess.... 53
2.8 ModelsIncludingSkinEffect ................................ 55
2.9 SignalTransferAcrossaTransmissionLine .................... 57
2.10 InterconnectTestStructures.................................. 58
2.10.1 Single-EndedTransmissionLine ....................... 59
2.10.2 DifferentialTransmissionLine ......................... 61
2.11 ModellingandConsiderationsofDigitalInterconnect ............ 68
v
vi Contents
2.12 CircuitandInterconnectDesignFlow.......................... 69
2.13 ConclusionsandOutlook .................................... 70
References..................................................... 72
3 DeviceMetrics................................................. 75
3.1 Introduction ............................................... 75
3.2 MillerEffects.............................................. 77
3.3 DefinitionsBasedony-Parameters ............................ 78
3.3.1 UnityCurrentGainBandwidth f ...................... 79
T
3.3.2 InputBandwidth f .................................. 81
V
3.3.3 OutputBandwidth f andAvailableBandwidth f ....... 82
out A
3.3.4 NegativeResistanceofaCross-CoupledDifferential
Pair f ........................................... 85
cross
3.3.5 MaximumOscillationFrequency f ................... 87
max
3.4 ApproximateFormulasfortheDeviceMetrics .................. 89
3.4.1 Approximationfor f ................................ 91
T
3.4.2 Approximationfor f ................................ 92
V
3.4.3 Approximationfor f ............................... 92
out
3.4.4 Approximationfor f ................................. 94
A
3.4.5 Approximationfor f .............................. 97
cross
3.4.6 Approximationfor f ............................... 98
max
3.5 OptimisingaTechnologyfor f ..............................101
A
3.6 Relationshipbetween f ,f and f ..........................106
A T max
3.7 TrendsinDeviceMetrics:AComparisonofRecentTechnologies ..108
3.7.1 TrendsRelatingtoDeviceMetrics......................108
3.7.2 Self-Heating ........................................111
3.8 OtherTrends ..............................................113
3.9 BipolarVersusRF-CMOS ...................................114
3.10 ConclusionsandOutlook ....................................115
References.....................................................116
4 Cross-ConnectSwitchDesign....................................119
4.1 Introduction ...............................................119
4.2 SwitchMatrixDesign.......................................121
4.2.1 TransmissionLinesforRowsandColumns ..............122
4.2.2 TheConceptofDistributedCapacitiveLoading...........122
4.2.3 MatrixNodeCircuitDesign ...........................124
4.2.4 Cross-ConnectSwitchICFloorplan.....................132
4.3 BufferCircuits.............................................136
4.3.1 IntermediateBufferCircuits ...........................136
4.3.2 InputandOutputBufferCircuits .......................137
4.4 CompleteRFSignalPath ....................................138
4.4.1 Small-SignalSimulations .............................138
4.4.2 Large-SignalSimulations .............................141
4.5 SupplyDecoupling .........................................142
Contents vii
4.6 ExperimentalResults .......................................145
4.7 ConclusionsandOutlook ....................................148
References.....................................................150
5 BiasCircuitsToleratingOutputVoltagesAboveBV ............153
CEO
5.1 Introduction ...............................................153
5.2 PrincipleofCollector-BaseAvalancheCurrent ..................155
5.3 AnalysisofSimple2-TransistorCurrentMirrors ................158
5.4 AnalysisofCurrentMirrorswithInternalBuffer ................161
5.5 AvalancheCurrentCompensation.............................163
5.5.1 FeedforwardTechniques ..............................163
5.5.2 FeedbackTechniques.................................166
5.6 ConclusionsandOutlook ....................................170
References.....................................................174
6 DesignofSynchronousHigh-SpeedCMLCircuits,
aPRBSGenerator .............................................175
6.1 Introduction ...............................................175
6.2 PRBSBackground .........................................176
6.3 InPTechnology ............................................179
6.4 PRBSGeneratorDesign.....................................181
6.4.1 PRBSGeneratorBlockDiagram .......................181
6.4.2 All-ZeroDetectionandCorrection......................184
6.4.3 ClockDistributionandLatchDesign....................185
6.5 ExperimentalResults .......................................191
6.6 DistributedCapacitiveLoadingReviewed ......................193
6.7 ConclusionsandOutlook ....................................194
References.....................................................196
7 AnalysisandDesignofHigh-FrequencyLC-VCOs.................197
7.1 Introduction ...............................................197
7.2 InputImpedanceofaCross-CoupledDifferentialPair ............199
7.3 InputImpedanceofaCapacitivelyLoadedEmitterFollower ......202
7.4 CombiningNegativeResistanceandOutputBufferFunctions .....204
7.5 LC-VCOOperatingataFrequencyCloseto f ...............207
cross
7.5.1 InductorandVaractor.................................208
7.5.2 VCOandOutputBufferCircuits .......................210
7.5.3 ExperimentalResults.................................212
7.6 LC-VCOOperatingataFrequencyabove f .................216
cross
7.6.1 InductorandVaractor.................................216
7.6.2 VCOandOutputBufferCircuits .......................218
7.6.3 ExperimentalResults.................................219
7.7 I/QSignalGeneration ......................................224
7.8 ConclusionsandOutlook ....................................232
References.....................................................234
viii Contents
Glossary ..........................................................235
Abbreviations ..................................................235
Constants ......................................................236
Symbols.......................................................236
AppendixA
y-parametersforaTransistorModelwithArbitraryR ,R andR ..239
e b c
Index .............................................................245
Preface
Circuitandinterconnectdesigntechniquesthattacklemanyofthegreatestdifficul-
tiesanduncertaintiesinthedevelopmentofICsforRFandhighbit-rateapplications
arethesubjectofthisbook.Atbit-ratesabove10Gb/s,theimpactofon-chipinter-
connectoncircuitperformancecanbedetrimentaltotheperformanceoftheIC.The
bottlenecksininterconnectdesign,circuitdesignandon-chipsignaldistributionfor
high bit-rate applications are analysed, and solutions for circumventing them pre-
sented.Thesemethodologiescanbeappliedtoanalysewhethertargetbit-ratesand
frequencies can be reached in a given IC technology, or to provide guidelines for
further IC process optimisation in support of today’s and tomorrow’s high bit-rate
circuit design. It should be noted that specific amplifier requirements such as low
noiseandintermodulationdistortionarenotdiscussedinthisbook.
Themaintopicsaddressedinthisbookandhowtheyrelatetoeachanotherare
illustratedinFig.1.Highbit-ratecircuitdesignusingadvancedSiGeandInPHBT
ICtechnologiesisthecoresubjectofthismonograph.
The bottlenecks in IC design for high bit-rate applications tackled in this
bookare:
1. Interconnectdesignandmodelling
2. ICprocesstechnology:transistorperformanceandoptimisation;relevantmetrics
3. On-chipsignaldistribution;jointoptimisationofcircuitandinterconnect
4. Reducedbreakdownvoltageoftransistorsinnext-generationICprocesses
5. LC-VCOdesignatmicrowavefrequencies
6. ICdesignflow
Severalkeyinnovationsarepresentedinthisbook.Foron-chiptransmissionlines,
configurationsareproposedthatareminimallysensitivetotheirsurroundings(see
Fig.2.20).Theseconfigurationsenablelowloss,lowcrosstalkandwell-controlled
line characteristics (e.g., characteristic impedance and delay). Improved perfor-
mancemarginsprovideflexibilityinthelayoutfloorplanofanIC.Thefloorplanis
usuallyilldefinedintheinitialphaseofanICdesign.However,adesignlibraryof
interconnectsthataredesensitizedtotheirsurroundingsenablesaccuratepredictions
oftheimpactofinterconnectsoncircuitperformance,simplifyingthefloorplanning
ix