Charge-Sharing SAR ADCs for Low-Voltage Low-Power Applications

173 Pages·2017·8.47 MB·English

by  Taimur Rabuske

ACSP · Analog Circuits And Signal Processing
Taimur Rabuske
Jorge Fernandes
Charge-Sharing
SAR ADCs for
Low-Voltage
Low-Power
Applications
Analog Circuits and Signal Processing
Serieseditors
MohammedIsmail,Dublin,USA
MohamadSawan,Montreal,Canada
Moreinformationaboutthisseriesathttp://www.springer.com/series/7381

Taimur Rabuske • Jorge Fernandes
Charge-Sharing SAR ADCs
for Low-Voltage Low-Power
Applications
123
TaimurRabuske JorgeFernandes
INESC-ID INESC-ID
InstitutoSuperiorTécnico InstitutoSuperiorTécnico
UniversidadedeLisboa UniversidadedeLisboa
Lisboa,Portugal Lisboa,Portugal
ISSN1872-082X ISSN2197-1854 (electronic)
AnalogCircuitsandSignalProcessing
ISBN978-3-319-39623-1 ISBN978-3-319-39624-8 (eBook)
DOI10.1007/978-3-319-39624-8
LibraryofCongressControlNumber:2016942569
©SpringerInternationalPublishingSwitzerland2017
Thisworkissubjecttocopyright.AllrightsarereservedbythePublisher,whetherthewholeorpartof
thematerialisconcerned,specificallytherightsoftranslation,reprinting,reuseofillustrations,recitation,
broadcasting,reproductiononmicrofilmsorinanyotherphysicalway,andtransmissionorinformation
storageandretrieval,electronicadaptation,computersoftware,orbysimilarordissimilarmethodology
nowknownorhereafterdeveloped.
Theuseofgeneraldescriptivenames,registerednames,trademarks,servicemarks,etc.inthispublication
doesnotimply,evenintheabsenceofaspecificstatement,thatsuchnamesareexemptfromtherelevant
protectivelawsandregulationsandthereforefreeforgeneraluse.
Thepublisher,theauthorsandtheeditorsaresafetoassumethattheadviceandinformationinthisbook
arebelievedtobetrueandaccurateatthedateofpublication.Neitherthepublishernortheauthorsor
theeditorsgiveawarranty,expressorimplied,withrespecttothematerialcontainedhereinorforany
errorsoromissionsthatmayhavebeenmade.
Printedonacid-freepaper
ThisSpringerimprintispublishedbySpringerNature
TheregisteredcompanyisSpringerInternationalPublishingAGSwitzerland
To ourfamilies

Preface
The integrated successive-approximation-register(SAR) analog-to-digital con-
verter (ADC) is known to present a remarkable energy efficiency. Additionally,
the SAR ADC is a veryscaling-friendlyarchitecture,due to its highlydigital and
switching-intensive nature and its ability to effortlessly accommodate rail-to-rail
signals without resorting to precision amplifiers. These characteristics have been
boosting the popularity of SAR ADCs as process scaling reduces the transistor’s
intrinsic gainand supply voltages. The mostbasic formof an SAR ADC requires
a voltage comparator, a digital controller, a track-and-hold (TH) circuitry, and a
digital-to-analogconverter(DAC).
Inmostofthereporteddesigns,theDACofanSARADCiscapacitiveandrelies
onthecharge-redistribution(CR)principle.Alternatively,anSARADCthatrelies
on the charge-sharing(CS) principle has been proposed more recently. The main
advantages of the CS-ADC are that it is immune to inaccuracies in the reference
bufferduringtheconversionandrequireslessdemandingbuffersfortheinputsignal
and the reference voltage. Additionally, the CS-ADC allows the use of nonlinear
capacitors. On the other hand, the CS-ADC is less tolerant to noise and to the
comparatoroffset,whichlimitsthecompetitivenessofthearchitecture.Finally,the
literaturelacksacomprehensiveanalysisofthelimitingfactorsofCS-ADCs.
The aim of this book is to fill the gap in knowledge that exists for CS-ADCs
by providing an in-depth analysis of the architecture and quantifying its limiting
factors.Finally,theinsightsgainedthroughthisanalysisareappliedtodevisetech-
niquesthatmitigatethecriticaldrawbacksofthearchitectureandallowthedesign
of energy-efficientSAR ADCs for low-voltageapplications.These techniquesare
validated through the design of two SAR ADCs that operate at supply voltages
down to 0.35 and 0.4V. Experimental results show that the two reported ADCs
presentthe bestenergyefficiencyamongADCs designedin technologiesdownto
0.13µm. Additionally, one of the presented prototypes is the first demonstration
of SAR ADC that uses a DAC with very-nonlinear capacitors, benefitting from
the improved capacitance density and matching characteristics of metal-oxide-
semiconductor(MOS)capacitors.
vii
viii Preface
Much of the material presented in this monograph originates from the work
carried out by the first author for his Ph.D., at Universidade de Lisboa, Portugal.
Thisworkincludesoriginalresearchresultsthathavebeenpresentedatinternational
conferences(ESSCIRC,ISCAS,andICECS,amongothers),publishedinSpringer
AnalogIntegratedCircuitsandSignalProcessing,IEEETransactionsonVeryLarge
ScaleIntegration(VLSI)SystemsandIEEEJournalofSolid-StateCircuits.
Theresearchreportedinthisbookreceivedcontributions frommanygenerous
and gifted people. The authors would like to thank all colleagues and friends at
INESC-IDLisboa,Portugal,andUFSM,Brazil.
Finally,thisworkwasfinanciallysupportedby:
(cid:129) FCT, Fundação para a Ciência e a Tecnologia (Portugal), under projects
UID/CEC/50021/2013andDISRUPTIVE(EXCL/EEI-ELC/0261/2012)
(cid:129) CNPq, Conselho Nacional de Desenvolvimento Científico e Tecnológico
(Brazil),underthePh.D.grant201887/2011-8
Lisboa,Portugal TaimurRabuske
Lisboa,Portugal JorgeFernandes
April2016
Contents
1 Introduction .................................................................. 1
1.1 Background.............................................................. 1
1.2 ResearchGoals.......................................................... 6
1.3 BookOutline............................................................ 6
1.4 OriginalContributions.................................................. 7
1.5 FinalRemarks........................................................... 7
References..................................................................... 8
2 ADCsforLow-VoltageLow-PowerApplications ........................ 11
2.1 Introduction ............................................................. 11
2.2 SamplingandQuantization............................................. 14
2.3 SearchMethodsforNyquistADCs .................................... 15
2.3.1 DirectSearch(FlashADCs).................................... 17
2.3.2 BinarySearch(SARADCs).................................... 18
2.3.3 PipelinedBinarySearch(PipelineADCs)..................... 19
2.3.4 Summary........................................................ 21
2.4 TheSARADC .......................................................... 21
References..................................................................... 23
3 ReviewofSARADCSwitchingSchemes ................................. 25
3.1 Introduction ............................................................. 25
3.2 OperationModesofCharge-BasedSARADCs....................... 26
3.2.1 TheChargeRedistributionPrinciple........................... 26
3.2.2 TheChargeSharingPrinciple.................................. 27
3.3 ChargeRedistributionSwitchingSchemes ............................ 28
3.3.1 ConventionalSwitching........................................ 28
3.3.2 Monotonicor“Set-and-Down”Switching .................... 30
3.3.3 V -BasedCapacitorSwitching............................... 32
CM
3.3.4 Tri-LevelCapacitorSwitching................................. 34
3.4 ChargeSharingSwitchingScheme .................................... 36
3.5 ComparisonofReviewedSwitchingSchemes ........................ 42
3.6 StateoftheArtinCS-ADCs ........................................... 46
ix