Table Of ContentRasit O. Topaloglu · H.-S. Philip Wong
Editors
Beyond-CMOS
Technologies for
Next Generation
Computer Design
Beyond-CMOS Technologies for Next Generation
Computer Design
Rasit O. Topaloglu • H.-S. Philip Wong
Editors
Beyond-CMOS Technologies
for Next Generation
Computer Design
123
Editors
RasitO.Topaloglu H.-S.PhilipWong
IBM DepartmentofElectricalEngineering
HopewellJunction,NY,USA StanfordUniversity
Stanford,CA,USA
ISBN978-3-319-90384-2 ISBN978-3-319-90385-9 (eBook)
https://doi.org/10.1007/978-3-319-90385-9
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Foreword
Thisbooksurveysandsummarizesrecentresearchaimedatnewdevices,circuits,
andarchitecturesforcomputing.Muchoftheimpetusforthisresearchstemsfrom
a remarkable development in information technology that played out in the brief
periodbetween2003and2005.Afterdecadesofrapidexponentiallycompounding
improvement, microprocessor clock frequencies abruptly plateaued—a stunning
breakfromalong-establishedandhighlydesirabletrendincomputingperformance.
The proximate cause was the increasing difficulty and cost of powering and
removing the waste heat from ever denser and faster transistor circuits. The root
cause—thereasonforexcessiveheatgeneration—wastheinability,forfundamental
reasons,toreducetransistorthresholdvoltageinproportiontoreductionsinpower
supply voltage. As a result, standby (or passive) power had grown exponentially
from technology generation to technology generation until it equaled or exceeded
active power, which was also increasing. Further increases would have driven
unacceptablecostsforpowerandcoolingacrossmanyproductcategories.Instead,
developmentteamspivotedandbegantooptimizeeachnewtechnologygeneration
foroperationinthisnewpower-constrainedenvironment.Whilemanyhadforeseen
the need and developed strategies for highly power-constrained device-, circuit-,
andsystem-leveldesign,thenetoutcomeofthepower-performancetrade-offsatall
levelsofthedesignhierarchywasdifficulttopredict.Thusthecompleteandabrupt
cessationofadvancesinclockfrequencycameasasurprise.
This event sent ripples throughout the worldwide microelectronics industry.
Since 2005, integration density and cost per device have continued to improve,
and manufacturers have emphasized the increasing number of processors and the
amountofmemorytheycanplaceonasingledie.However,withclockfrequencies
stagnant,theresultingperformancegainshavebeenmutedcomparedtothoseofthe
previousdecades.Thereturnoninvestmentfordevelopmentofeachnewgeneration
ofever-smallertransistorshasthereforebeenreduced,andthenumberofcompanies
makingthatinvestmenthasdeclined.Tobeclear,thetotaleffortremainsenormous
by the standards of any industry, with the vast majority of R&D dollars going
v
vi Foreword
towardfurtheradvancementofsiliconCMOSfieldeffecttransistortechnologyand,
increasingly,towardadvancementofcircuitandsystemarchitectures.
Buttheexperienceof2003–2005alsosparkedaboldnewindustryinitiative.In
2005,theNanoelectronicsResearchInitiative(NRI)wascharteredbyaconsortium
of Semiconductor Industry Association (SIA) member companies to develop and
administerauniversity-basedresearchprogramtoaddresstheincreasinglyevident
limitations of the field effect transistor. In partnership with the National Science
Foundation (NSF), NRI would fund university research to “Demonstrate novel
computing devices capable of replacing the CMOS FET as a logic switch in the
2020 timeframe.” In 2007, the National Institute of Standards and Technology
(NIST)joinedtheprivate-publicpartnership,resultinginthecreationoffourmulti-
university, multidisciplinary research centers. NRI’s bold and clearly articulated
research goals caught the attention of funding agencies in Europe and Asia and
helpedtosparknewinitiativesinthosegeographies.In2013theDefenseAdvanced
ResearchProjectsAgency(DARPA)joinedwithindustrytofundSTARnet,further
focusing US university researchers on the exploration of post-CMOS devices. As
the NRI and STARnet programs evolved, the interest of the industrial sponsors
shiftedfromexplorationofisolateddevicestowardco-developmentofnewdevices,
circuits, and architectures. This was made explicit with new programs announced
withNSFin2016andwithNISTandDARPAin2017.
The research initiatives and results described in Beyond-CMOS Technologies
forNextGenerationComputerDesignreflectandaddressthisbroadindustryneed
for new approaches to energy-efficient computing. Indeed, much of the work was
funded to a greater or lesser extent through NRI, STARnet, or programs with
closelyrelatedgoals.Theresearchrangesfromnewmaterialsandthedevicesthey
enable,tonovelcircuitsandarchitecturesforcomputing.Inmanycases,theresults
span two or more levels in thishierarchy. For example, Subhasish Mitradescribes
the novel fabrication processes that made it possible to build a simple computer
fromtransistorsbasedoncarbonnanotubes.XueqingLiandcoauthorstelluswhy
and how the negative capacitance field effect transistor (NCFET) and other “steep
slope” devices are poised to open a new circuit design space for ultra-low-power
electronics. Two sets of authors provide perspectives on the interplay between
emerging nonvolatile memory devices, 3D integration schemes, and “compute in
memory” architectures. Looking beyond conventional FETs and the traditional
computingarchitecture,itseemsthereisstillalottoexplore!
DepartmentofElectricalEngineering,ColumbiaUniversity ThomasN.Theis
NewYork,NY,USA
April15,2018
Preface
Advances of traditional CMOS devices may be hitting a bottleneck soon due
to electrostatic control, power, device density, and variability limitations. It may
be necessary to complement silicon transistors with beyond-CMOS counterparts
in integrated circuits. Yet, a straightforward replacement may not yield optimal
architecture and system response. Hence, circuits need to be redesigned in the
contextofbeyond-CMOSdevices.Thisbookinparticulartargetstobridgethegap
betweendeviceavailabilityandarchitecture/systemconsiderations.Withthisbook,
readersshouldbeabletounderstand:
– Whyweneedtoconsiderbeyond-CMOSdevices,
– Whatarethechallengesofbeyond-CMOSoptions,
– Howshouldarchitectureandsystemsbedesigneddifferently,
– Howwoulddesignstakeadvantageofbeyond-CMOSbenefits.
Thebookconsistsofthefollowingsevenchaptersfromdistinguishedauthors:
Hills,Mitra,andWongfocusoncarbonnanotubetransistors.Theyfurtheranalyze
a monolithic 3D integration with carbon nanotube transistors. A new device
integration enabled by carbon nanotube transistors would lead to three orders
ofmagnitudeenergydelayproductimprovement.
Resta,Gaillardon,anddeMichelidiscussanoveldevice(MIG-FET)withintrinsic
dopingwherethedevicetypeisnotfixedatmanufacturebutisadjustableusing
inputs to the gate. The authors analyze this functionality-enhanced MIG-FET
device.
Nourbakhsh, Yu, Lin, Hempel, Shiue, Englund, and Palacios study devices of 2D
layeredmaterialsthathaveweakvanderWaalsforcesbetweenthelayers.They
discuss not only electrical but also optoelectrical and biological applications in
theirchapter.
Khwa,Lu,Dou,andChangdiscussnonvolatilememoriesincludingresistiveRAM
(ReRAM),phasechangememory,andspin-torquetransfermagneticRAM(STT-
RAM),andtheircircuitimplementationssuchasnonvolatileSRAM.
vii
viii Preface
Ghose, Hsieh, Boroumand, Ausavarungnirun, and Mutlu study processing-in-
memory to avoid CPU to memory transfers. They propose and discuss an in-
memoryacceleratorforpointerchasingandadatacoherencesupportmechanism.
Li, Kim, George, Aziz, Jerry, Shukla, Sampson, Gupta, Datta, and Narayanan
investigate tunneling FET (TFET), negative capacitance FET (NCFET), and
HyperFETassteep-slopedevicecandidatestoachievelowpowerconsumption.
Finally, Zografos, Vaysset, Soree, and Raghavan analyze spin-wave devices and
spin-torque majority gates including circuit benchmarking against silicon
devices.
HopewellJunction,NY,USA RasitO.Topaloglu
Stanford,CA,USA H.-S.PhilipWong
Contents
1 Beyond-Silicon Devices: Considerations for Circuits
andArchitectures............................................................ 1
GageHills,H.-S.PhilipWong,andSubhasishMitra
2 Functionality-Enhanced Devices: From Transistors to
Circuit-LevelOpportunities ................................................ 21
Giovanni V. Resta, Pierre-Emmanuel Gaillardon,
andGiovanniDeMicheli
3 HeterogeneousIntegrationof2DMaterialsandDevicesonaSi
Platform....................................................................... 43
Amirhasan Nourbakhsh, Lili Yu, Yuxuan Lin, Marek Hempel,
Ren-JyeShiue,DirkEnglund,andTomásPalacios
4 EmergingNVMCircuitTechniquesandImplementationsfor
Energy-EfficientSystems.................................................... 85
Win-SanKhwa,DarsenLu,Chun-MengDou,andMeng-FanChang
5 TheProcessing-in-MemoryParadigm:MechanismstoEnable
Adoption ...................................................................... 133
Saugata Ghose, Kevin Hsieh, Amirali Boroumand,
RachataAusavarungnirun,andOnurMutlu
6 Emerging Steep-Slope Devices and Circuits: Opportunities
andChallenges ............................................................... 195
XueqingLi,MoonSeokKim,SumithaGeorge,AhmedullahAziz,
Matthew Jerry, Nikhil Shukla, John Sampson, Sumeet Gupta,
SumanDatta,andVijaykrishnanNarayanan
7 Spin-BasedMajorityComputation ........................................ 231
OdysseasZografos,AdrienVaysset,BartSorée,andPraveenRaghavan
Index............................................................................... 263
ix
Chapter 1
Beyond-Silicon Devices: Considerations
for Circuits and Architectures
GageHills,H.-S.PhilipWong,andSubhasishMitra
1.1 Introduction
While beyond-silicon devices promise improved performance at the device level,
leveragingtheiruniquepropertiestorealizenovelcircuitsandarchitecturesprovides
additional benefits. In fact, the benefits afforded by the new architectures that
beyond-silicon devices enable can far exceed the benefits any improved device
by itself could achieve. As a case study, we provide an overview of carbon
nanotube (CNT) technologies, and highlight the importance of understanding—
and leveraging—the unique properties of CNTs to realize improved devices,
circuits, and architectures. In this chapter, we begin by reviewing state-of-the-art
CNT technologies and summarizing their benefits. We then discuss the obstacles
facingCNTtechnologiesandthesolutionsforovercomingthesechallenges,while
highlighting their circuit-level implications. We end by illustrating how CNTs can
impact computing architectures, and the considerations that must be taken into
accounttofullyrealizethebenefitsofthisemergingnanotechnology.
G.Hills((cid:2))·H.-S.P.Wong
DepartmentofElectricalEngineering,StanfordUniversity,Stanford,CA,USA
e-mail:[email protected]
S.Mitra
DepartmentofElectricalEngineering,StanfordUniversity,Stanford,CA,USA
DepartmentofComputerScience,StanfordUniversity,Stanford,CA,USA
©SpringerInternationalPublishingAG,partofSpringerNature2019 1
R.O.Topaloglu,H.-S.P.Wong(eds.),Beyond-CMOSTechnologiesforNext
GenerationComputerDesign,https://doi.org/10.1007/978-3-319-90385-9_1
