Table Of ContentFeatures
• Core
– ARM® Cortex®-M4 with a 2 Kbytes cache running at up to 120 MHz
– Memory Protection Unit (MPU)
– DSP Instruction Set
– Thumb®-2 instruction set
(cid:129) Pin-to-pin compatible with SAM3N, SAM3S products (64- and 100- pin versions) and
SAM7S legacy products (64-pin version)
(cid:129) Memories
– Up to 2048 Kbytes embedded Flash with optional dual bank and cache memory
– Up to 160 Kbytes embedded SRAM AT91SAM
– 16 Kbytes ROM with embedded boot loader routines (UART, USB) and IAP routines
– 8-bit Static Memory Controller (SMC): SRAM, PSRAM, NOR and NAND Flash ARM-based
support
(cid:129) System
Flash MCU
– Embedded voltage regulator for single supply operation
– Power-on-Reset (POR), Brown-out Detector (BOD) and Watchdog for safe operation
– Quartz or ceramic resonator oscillators: 3 to 20 MHz main power with Failure
Detection and optional low-power 32.768 kHz for RTC or device clock
SAM4S Series
– RTC with Gregorian and Persian Calendar mode, waveform generation in low-
power modes
– RTC clock calibration circuitry for 32.768 kHz crystal frequency compensation
– High precision 8/12 MHz factory trimmed internal RC oscillator with 4 MHz default
frequency for device startup. In-application trimming access for frequency
adjustment
– Slow Clock Internal RC oscillator as permanent low-power mode device clock Preliminary
– Two PLLs up to 240 MHz for device clock and for USB
– Temperature Sensor
Datasheet
– Up to 22 Peripheral DMA (PDC) Channels
(cid:129) Low Power Modes
– Sleep and Backup modes, down to 1 µA in Backup mode
– Ultra low-power RTC
(cid:129) Peripherals
– USB 2.0 Device: 12 Mbps, 2668 byte FIFO, up to 8 bidirectional Endpoints. On-Chip
Transceiver
– Up to 2 USARTs with ISO7816, IrDA®, RS-485, SPI, Manchester and Modem Mode
– Two 2-wire UARTs
– Up to 2 Two Wire Interface (I2C compatible), 1 SPI, 1 Serial Synchronous Controller
(I2S), 1 High Speed Multimedia Card Interface (SDIO/SD Card/MMC)
– 2 Three-Channel 16-bit Timer/Counter with capture, waveform, compare and PWM
mode. Quadrature Decoder Logic and 2-bit Gray Up/Down Counter for Stepper Motor
– 4-channel 16-bit PWM with Complementary Output, Fault Input, 12-bit Dead Time
Generator Counter for Motor Control
– 32-bit Real-time Timer and RTC with calendar and alarm features
– Up to 16-channel, 1Msps ADC with differential input mode and programmable gain
stage and auto calibration
– One 2-channel 12-bit 1Msps DAC
– One Analog Comparator with flexible input selection, Selectable input hysteresis
– 32-bit Cyclic Redundancy Check Calculation Unit (CRCCU)
– Write Protected Registers
(cid:129) I/O
– Up to 79 I/O lines with external interrupt capability (edge or level sensitivity),
debouncing, glitch filtering and on-die Series Resistor Termination
– Three 32-bit Parallel Input/Output Controllers, Peripheral DMA assisted Parallel
Capture Mode
(cid:129) Packages
– 100-lead LQFP, 14 x 14 mm, pitch 0.5 mm/100-ball TFBGA, 9 x 9 mm, pitch
0.8mm/100-ball VFBGA, 7 x 7 mm, pitch 0.65 mm
– 64-lead LQFP, 10 x 10 mm, pitch 0.5 mm/64-lead QFN 9x9 mm, pitch 0.5 mm
11100B–ATARM–31-Jul-12
1. Description
The Atmel SAM4S series is a member of a family of Flash microcontrollers based on the high
performance 32-bit ARM Cortex-M4 RISC processor. It operates at a maximum speed of
120MHz and features up to 2048 Kbytes of Flash, with optional dual bank implementation and
cache memory, and up to 160 Kbytes of SRAM. The peripheralset includes a Full Speed USB
Device port with embedded transceiver, a High Speed MCI for SDIO/SD/MMC, an External Bus
Interface featuring a Static Memory Controller providing connection to SRAM, PSRAM, NOR
Flash, LCD Module and NAND Flash, 2x USARTs, 2x UARTs, 2x TWIs, 3x SPI, an I2S, as well
as 1 PWM timer, 2x three channel general-purpose 16-bit timers (with stepper motor and
quadrature decoder logic support), an RTC, a 12-bit ADC, a 12-bit DAC and an analog
comparator.
The SAM4S series is ready for capacitive touch thanks to the QTouch® library, offering an easy
way to implement buttons, wheels and sliders.
The SAM4S device is a medium range general purpose microcontroller with the best ratio in
terms of reduced power consumption, processing power and peripheral set. This enables the
SAM4S to sustain a wide range of applications including consumer, industrial control, and PC
peripherals.
It operates from 1.62V to 3.6V.
The SAM4S series is pin-to-pin compatible with the SAM3N, SAM3S series (64- and 100-pin
versions) and SAM7S legacy series (64-pin versions).
SAM4S Series [Preliminary]
2
11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
1.1 Configuration Summary
The SAM4S series devices differ in memory size, package and features. Table 1-1 summarizes
the configurations of the device family.
Table 1-1. Configuration Summary
Feature SAM4SD32C SAM4SD32B SAM4SD16C SAM4SD16B SAM4SA16C SAM4SA16B SAM4S16C SAM4S16B SAM4S8C SAM4S8B
2 x 1024 2 x 1024 2 x 512 2 x 512 1024
1024 Kbytes 1024 Kbytes 1024 Kbytes 512 Kbytes 512 Kbytes
Flash Kbytes Kbytes Kbytes Kbytes Kbytes
SRAM 160 Kbytes 160 Kbytes 160 Kbytes 160 Kbytes 160 Kbytes 160 Kbytes 128 Kbytes 128 Kbytes 128 Kbytes 128 Kbytes
HCACHE 2KBytes 2KBytes 2KBytes 2KBytes 2KBytes 2KBytes - - - -
LQFP 100
LQFP 100 LQFP 100 LQFP 100 LQFP 100
LQFP 64 LQFP 64 LQFP 64 LQFP 64 TFBGA 100 LQFP 64
TFBGA 100 TFBGA 100 TFBGA 100 TFBGA 100
QFN 64 QFN 64 QFN 64 QFN 64 VFBGA 100 QFN 64
VFBGA 100 VFBGA 100 VFBGA 100 VFBGA 100
Package
Number of
79 47 79 47 79 47 79 47 79 47
PIOs
External 8-bit data, 8-bit data, 8-bit data, 8-bit data, 8-bit data,
Bus 4chip selects, - 4chip selects, - 4chip selects, - 4chip selects, - 4chip selects, -
Interface 24-bit address 24-bit address 24-bit address 24-bit address 24-bit address
12-bit ADC 16 ch.(1) 11 ch.(1) 16 ch.(1) 11 ch.(1) 16 ch.(1) 11 ch.(1) 16 ch.(1) 11 ch.(1) 16 ch.(1) 11 ch.(1)
12-bit DAC 2 ch. 2 ch. 2 ch. 2 ch. 2 ch. 2 ch. 2 ch. 2 ch. 2 ch. 2 ch.
Timer
Counter 6 3 6 3 6 3 6 3 6 3
Channels
PDC
22 22 22 22 22 22 22 22 22 22
Channels
USART/
2/2(2) 2/2(2) 2/2(2) 2/2(2) 2/2(2) 2/2(2) 2/2(2) 2/2(2) 2/2(2) 2/2(2)
UART
1 port 1 port 1 port 1 port 1 port 1 port 1 port 1 port 1 port 1 port
HSMCI 4 bits 4 bits 4 bits 4 bits 4 bits 4 bits 4 bits 4 bits 4 bits 4 bits
Notes: 1. One channel is reserved for internal temperature sensor.
2. Full Modem support on USART1.
3
11100B–ATARM–31-Jul-12
2. Block Diagram
Figure 2-1. SAM4S16, S8 Series 100-pin version Block Diagram
TDITDOTMS/TSCWK/DISOWCLK JTAGSEL VDDIN VDDOUT
TST System Controller Voltage
PCK0-PCK2 Regulator
PLLA
PLLB PMC JTAG & Serial Wire UFnlaiqsuhe SigUnsaeturre
Identifier
RC Osc
12/8/4 MHz
In-Circuit Emulator
24-Bit N
XOXUINT 3-2O0 sMcHz Cortex-M4 Processor SysTick Counter V FLASH SRAM ROM
Fmax 120 MHz I 1024 Kbytes 128 Kbytes 16 Kbytes
SUPC DSP C 512 Kbytes
MPU
XIN32
XOUT32 Osc 32 kHz I/D S
ERASE RC 32 kHz
4-layer AHB Bus Matrix Fmax 120 MHz
VDDIO 8 GPBREG
VDDCORE RTT
VDDPLL POR
RTCOUT0
RTC
RTCOUT1
NRST RSTC 2668 USB 2.0 ver
WDT SM PeBrripidhgeeral Bytes Full scei DDDDPM
FIFO Speed n
a
PIOA / PIOB / PIOC Tr
TWTWCDK00 TWI0 PDC ExItnetrenrafal cBeu s DA[[07::203]]
TWTWCDK11 TWI1 PDC AA2212//NNAANNDDACLLEE
UURTXXDD00 UART0 PDC NANLDog Ficlash NNCCSS01
URXD1 UART1 NCS2
UTXD1 PDC NCS3
RSTXXCDDK000 USART0 StaCtoicn Mtroelmleorry PIO NNRWDE
RTS0 NANDOE
CTS0 PDC NANDWE
NWAIT
RTXXDD11 PDC PIODC[7:0]
SRCTKS11 USART1 PIO PPIIOODDCCEENN12
CTS1 PIODCCLK
DSR1
DTR1
RI1
DCD1 PDC NPCS0
NPCS1
NPCS2
PDC SPI NPCS3
MISO
TCLK[0:2] Timer Counter A MOSI
SPCK
TIOA[0:2]
TIOB[0:2] TC[0..2] PDC TF
TK
SSC TRDD
TCLK[3:5] RK
Timer Counter B RF
TIOA[3:5] PDC
TIOB[3:5] TC[3..5] High Speed MCI MMCCCCDKA
PWMH[0:3] MCDA[0..3]
PWML[0:3] PWM Analog ADVREF
PWMFI0 PDC Comparator ADC Ch.
ADTRG
Temp. Sensor
AD[0..14] CRC Unit
ADVREF 12-bit ADC PDC
DAC0
DAC1 12-bit DAC
DATRG PDC
SAM4S Series [Preliminary]
4
11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
Figure 2-2. SAM4S16, S8 Series 64-pin version Block Diagram
TDITDOTMS/TSCWK/DISOWCLK JTAGSEL VDDIN VDDOUT
TST System Controller Voltage
PCK0-PCK2 Regulator
PLLA Flash User
PLLB PMC JTAG & Serial Wire Unique Signature
Identifier
RC Osc
12/8/4 MHz
In-Circuit Emulator
24-Bit N
XOXUINT 3-2O0 sMcHz CoFrtmexa-xM 142 P0 rMocHezssor SysTick Counter VI 10F2L4A KSbHyt es 12S8 RKAbMytes 16R KObMytes
SUPC DSP C 512 Kbytes
MPU
XIN32
XOUT32 Osc 32 kHz I/D S
ERASE RC 32 kHz
4-layer AHB Bus Matrix Fmax 120 MHz
VDDIO 8 GPBREG
VDDCORE RTT
VDDPLL POR
RTCOUT0
RTC
RTCOUT1
NRST RSTC 2668 USB 2.0 ver
WDT SM PeBrripidhgeeral Bytes Full scei DDDDPM
FIFO Speed n
a
PIOA / PIOB Tr
TWCK0 TWI0
TWD0 PDC
TWCK1 TWI1
TWD1 PDC
UURTXXDD00 UART0 PDC PDC
PIODC[7:0]
UURTXXDD11 UART1 PDC PIO PIODCEN1
PIODCEN2
RXD0 PIODCCLK
TXD0
SCK0 USART0
RTS0
CTS0 PDC
RDSDTCRXXSCTTTDDRRKSS1111111 PIO USART1 PDC SPI PIO NNNNMMSPPPPPIOSCCCCCSOKSSSSI0123
RI1
DCD1 PDC
PDC TF
TCLK[0:2] Timer Counter A TK
TIOA[0:2] SSC TRDD
TIOB[0:2] TC[0..2] RRKF
PWMH[0:3] PDC MCCK
PWPMWLM[0F:3I0] PWM PDC High Speed MCI MMCCDCAD[A0..3]
ADTRG Temp. Sensor
AD[0..9]
12-bit ADC PDC Analog ADVREF
ADVREF Comparator ADC Ch.
DAC0
DADTARCG1 12-bit DAC PDC CRC Unit
5
11100B–ATARM–31-Jul-12
Figure 2-3. SAM4SD32, SD16, SA16 100-pin version Block Diagram
RTCORUTTC0OUT1 TDITDOTMS/TSCKW/DSIWOCLK JTAGSEL VDDIN VDDOUT
TST Voltage
Regulator
PCK0-PCK2
PLLA
PLLB PMC JTAG & Serial Wire
Flash
RC Unique
12/8/4 M Identifier
In-Circuit Emulator
XOXUINT 3-2O0s Mc.Hz C ortex-M4 Processor SysTi2c4k -CBoitu nter NV FLASH SRAM ROM
Fmax 120 MHz I
2*1024 KBytes 160 KBytes 16 KBytes
SUPC DSP C 2*512 KBytes
MPU 1024 KBytes
XIN32
OSC 32k
XOUT32 I D
ERASE RC 32k
CMCC
8 GPBREG (2 KB cache)
RTT
VDDIO
VDDCORE RTC 4-layer AHB Bus Matrix Fmax 120 MHz
VDDPLL POR
RSTC
NRST 2668 USB 2.0 ver
WDT SM PeBrripidhgeeral BFyIFteOs SFpuelel d anscei DDDDPM
PIOA / PIOB / PIOC Tr
TWTWCDK00 TWI0 PDC ExItnetrenrafal cBeu s DA[[07::203]]
TWTWCKD11 TWI1 PDC AA2221//NNAANNDDACLLEE
NAND Flash
UURTXXDD00 UART0 PDC Logic NNCCSS01
URXD1 UART1 NCS2
UTXD1 PDC NCS3
RTXXDD00 StaCtoicn Mtroelmleorry PIO NNWRDE
SRCTKS00 USART0 NANDOE
CTS0 PDC NANDWE
RXD1 NWAIT
TXD1
SRCTKS11 PDC PIODC[7:0]
CTS1
USART1 PIODCEN1
DSR1 PIO
PIODCEN2
DTR1
RI1 PIODCCLK
DCD1 PDC
TCLK[0:2] Timer Counter A PDC NPCS0
TIOA[0:2] TC[0..2] NNPPCCSS12
TIOB[0:2] SPI NPCS3
MISO
MOSI
TCLK[3:5] Timer Counter B SPCK
PDC TF
TIOA[3:5] TK
TIOB[3:5] TC[3..5] SSC TRDD
PWMH[0:3] RK
PWML[0:3] PWM PDC RF
PWMFI0 PDC MCCK
High Speed MCI MCCDA
ADTRG Temp. Sensor MCDA[0..3]
AD[0..14] ADC
ADVREF ADC PDC CoAmnpaaloragtor DTeAmCp Sensor
DAC0
DAC ADVREF
DAC1 CRC Unit
DATRG PDC
SAM4S Series [Preliminary]
6
11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
Figure 2-4. SAM4SD32, SD16, SA16 64-pin version Block Diagram
TDITDOTMS/TSCWK/DISOWCLK JTAGSEL VDDIN VDDOUT
TST System Controller Voltage
PCK0-PCK2 Regulator
PLLA
Flash
PLLB PMC JTAG & Serial Wire Unique
Identifier
RC Osc
12/8/4 MHz
In-Circuit Emulator
24-Bit N
XOXUINT 3-2O0 sMcHz Cortex-M4 Processor SysTick Counter V FLASH SRAM ROM
Fmax 120 MHz DSP I 2*1024 KBytes 160 KBytes 16 KBytes
SUPC C 2*512 KBytes
MPU 1024 KBytes
XIN32
XOUT32 Osc 32 kHz I D
ERASE RC 32 kHz
CMCC
VDDIO 8 GPBREG (2 KB cache)
VDDCORE RTT
VDDPLL POR
4-layer AHB Bus Matrix Fmax 120 MHz
RTCOUT0
RTC
RTCOUT1
NRST RSTC 2668 USB 2.0 ver
WDT SM PeBrripidhgeeral Bytes Full scei DDDDPM
FIFO Speed n
a
PIOA / PIOB Tr
TWCK0 TWI0
TWD0 PDC
TWCK1 TWI1
TWD1 PDC
UURTXXDD00 UART0 PDC PDC
PIODC[7:0
UURTXXDD11 UART1 PDC PIO PIODCEN
PIODCEN2
RXD0 PIODCCLK
TXD0
SCK0 USART0
RTS0
CTS0 PDC
RXD1 PDC NNPPCCSS01
TXD1 NPCS2
DSDCRCSTTTRRKSS11111 PIO USART1 SPI PIO NMMSPPIOSCCSOKSI3
RI1
DCD1 PDC
PDC TF
TCLK[0:2] Timer Counter A TK
TIOA[0:2] SSC TRDD
TC[0..2] RK
TIOB[0:2] RF
PWMH[0:3] PDC MCCK
PWPMWLM[0F:3I0] PWM PDC High Speed MCI MMCCDCAD[A0..3
ADTRG Temp. Sensor
AD[0..9]
12-bit ADC PDC Analog ADVREF
ADVREF Comparator ADC Ch.
DAC0
DADTARCG1 12-bit DAC PDC CRC Unit
7
11100B–ATARM–31-Jul-12
3. Signal Description
Table 3-1 gives details on signal names classified by peripheral.
Table 3-1. Signal Description List
Active Voltage
Signal Name Function Type Level reference Comments
Power Supplies
Peripherals I/O Lines and USB transceiver
VDDIO Power 1.62V to 3.6V
Power Supply
Voltage Regulator Input, ADC, DAC and
VDDIN Power 1.62V to 3.6V(4)
Analog Comparator Power Supply
VDDOUT Voltage Regulator Output Power 1.2V Output
VDDPLL Oscillator and PLL Power Supply Power 1.08 V to 1.32V
Power the core, the embedded memories 1.08V to 1.32V
VDDCORE Power
and the peripherals
GND Ground Ground
Clocks, Oscillators and PLLs
XIN Main Oscillator Input Input
Reset State:
XOUT Main Oscillator Output Output - PIO Input
XIN32 Slow Clock Oscillator Input Input - Internal Pull-up disabled
- Schmitt Trigger enabled(1)
XOUT32 Slow Clock Oscillator Output Output VDDIO
Reset State:
- PIO Input
PCK0 - PCK2 Programmable Clock Output Output
- Internal Pull-up enabled
- Schmitt Trigger enabled(1)
Real Time Clock
RTCOUT0 Programmable RTC waveform output Output
Reset State:
- PIO Input
VDDIO
RTCOUT1 Programmable RTC waveform output Output - Internal Pull-up enabled
- Schmitt Trigger enabled(1)
Serial Wire/JTAG Debug Port - SWJ-DP
TCK/SWCLK Test Clock/Serial Wire Clock Input
Reset State:
TDI Test Data In Input
- SWJ-DP Mode
TDO/TRACESWO Test Data Out / Trace Asynchronous Data Output - Internal pull-up disabled(5)
Out VDDIO
- Schmitt Trigger enabled(1)
TMS/SWDIO Test Mode Select /Serial Wire Input/Output Input / I/O
Permanent Internal
JTAGSEL JTAG Selection Input High
pull-down
SAM4S Series [Preliminary]
8
11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
Table 3-1. Signal Description List (Continued)
Active Voltage
Signal Name Function Type Level reference Comments
Flash Memory
Reset State:
Flash and NVM Configuration Bits Erase - Erase Input
ERASE Input High VDDIO
Command - Internal pull-down enabled
- Schmitt Trigger enabled(1)
Reset/Test
Permanent Internal
NRST Synchronous Microcontroller Reset I/O Low
VDDIO pull-up
Permanent Internal
TST Test Select Input
pull-down
Universal Asynchronous Receiver Transceiver - UARTx
URXDx UART Receive Data Input
UTXDx UART Transmit Data Output
PIO Controller - PIOA - PIOB - PIOC
PA0 - PA31 Parallel IO Controller A I/O Reset State:
- PIO or System IOs(2)
PB0 - PB14 Parallel IO Controller B I/O VDDIO
- Internal pull-up enabled
PC0 - PC31 Parallel IO Controller C I/O - Schmitt Trigger enabled(1)
PIO Controller - Parallel Capture Mode
PIODC0-PIODC7 Parallel Capture Mode Data Input
PIODCCLK Parallel Capture Mode Clock Input VDDIO
PIODCEN1-2 Parallel Capture Mode Enable Input
External Bus Interface
D0 - D7 Data Bus I/O
A0 - A23 Address Bus Output
NWAIT External Wait Signal Input Low
Static Memory Controller - SMC
NCS0 - NCS3 Chip Select Lines Output Low
NRD Read Signal Output Low
NWE Write Enable Output Low
NAND Flash Logic
NANDOE NAND Flash Output Enable Output Low
NANDWE NAND Flash Write Enable Output Low
High Speed Multimedia Card Interface - HSMCI
MCCK Multimedia Card Clock I/O
MCCDA Multimedia Card Slot A Command I/O
MCDA0 - MCDA3 Multimedia Card Slot A Data I/O
9
11100B–ATARM–31-Jul-12
Table 3-1. Signal Description List (Continued)
Active Voltage
Signal Name Function Type Level reference Comments
Universal Synchronous Asynchronous Receiver Transmitter USARTx
SCKx USARTx Serial Clock I/O
TXDx USARTx Transmit Data I/O
RXDx USARTx Receive Data Input
RTSx USARTx Request To Send Output
CTSx USARTx Clear To Send Input
DTR1 USART1 Data Terminal Ready I/O
DSR1 USART1 Data Set Ready Input
DCD1 USART1 Data Carrier Detect Output
RI1 USART1 Ring Indicator Input
Synchronous Serial Controller - SSC
TD SSC Transmit Data Output
RD SSC Receive Data Input
TK SSC Transmit Clock I/O
RK SSC Receive Clock I/O
TF SSC Transmit Frame Sync I/O
RF SSC Receive Frame Sync I/O
Timer/Counter - TC
TCLKx TC Channel x External Clock Input Input
TIOAx TC Channel x I/O Line A I/O
TIOBx TC Channel x I/O Line B I/O
Pulse Width Modulation Controller- PWMC
PWMHx PWM Waveform Output High for channel x Output
only output in
complementary mode
PWMLx PWM Waveform Output Low for channel x Output
when dead time insertion
is enabled.
PWMFI0 PWM Fault Input Input
Serial Peripheral Interface - SPI
MISO Master In Slave Out I/O
MOSI Master Out Slave In I/O
SPCK SPI Serial Clock I/O
SPI_NPCS0 SPI Peripheral Chip Select 0 I/O Low
SPI_NPCS1 -
SPI Peripheral Chip Select Output Low
SPI_NPCS3
SAM4S Series [Preliminary]
10
11100B–ATARM–31-Jul-12
Description:8 11100B–ATARM–31-Jul-12 SAM4S Series [Preliminary] 3. Signal Description Table 3-1 gives details on signal names classified by peripheral. Table 3-1.