Architecture and Function of the MSP430 14-Bit ADC

38 Pages·1999·0.21 MB·English

by  Texas Instruments, Incorporated

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Application
Report
June 1999 Mixed Signal Products
SLAA045
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Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Characteristics of the 14-Bit ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 ADC Function and Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1 Function of the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1.1 ADC Timing Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1.2 Sample and Hold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1.3 Absolute and Relative Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Using the ADC in 14-Bit Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2.1 Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2.2 Software Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.3 Using the ADC in 12-Bit Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.3.1 Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.3.2 Software Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3 The A/D Controller Hardware. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.1 ADC Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.1.1 ACTL Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.1.2 A/D Data Register ADAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1.3 Input Register AIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1.4 Input Enable Register AEN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.2 Current Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.2.1 Normal Use of the Current Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.2.2 Current Source Used for Level Shifting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.3 SVcc Terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.3.1 SVcc Terminal Used as an Output for the ADC Reference Voltage . . . . . . . . . . . . . . . . . . . . . . 23
3.3.2 SVcc Terminal Used as an Input for the ADC Reference Voltage . . . . . . . . . . . . . . . . . . . . . . . 24
3.3.3 Connection of Current Consuming Loads to SVcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.4 Interrupt Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4.1 Interrupt Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4.2 Interrupt Handlers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.5 ADC Clock Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4 ADC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Appendix A Definitions Used With the Application Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1
Architecture and Function of the MSP430 14-Bit ADC iii
Figures
List of Figures
1 Hardware of the 14-Bit ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 Possible Connections to the Analog-to-Digital Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3 Sources of the Conversion Result . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
4 ADC Spikes Due to Violated Timing Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5 Simplified Input Circuitry for Signal Sampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
6 Relative Measurements With the MSP430C32x . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
7 Absolute Measurements Using External Reference Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
8 Complete 14-Bit ADC Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
9 Timing for the 14-bit Analog-to-Digital Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
10 The Four 12-Bit ADC Ranges A to D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
11 Single 12-Bit ADC Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
12 Timing for the 12-Bit A/D Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
13 ACTL Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
14 Conversion Start (SOC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
15 Voltage Reference Bit (VREF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
16 ADC Input Selection Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
17 Current Source Output Select Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
18 Range Select Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
19 Power Down Bit (Pd) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
20 Clock Frequency Selection Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
21 Bit 15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
22 The Data Register ADAT, 12-Bit A/D Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
23 Data Register ADAT, 14-Bit A/D Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
24 Input Register AIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
25 Input Enable Register AEN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
26 The Current Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
27 Measurement Circuitry for the Error of the Current Source. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
28 Error of the Current Source at the Limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
29 Error of the Current Source at the Limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
30 Application of the Current Source With the Full ADC Range at Input A0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
31 Current Measurement With Level Shifting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
32 SVcc Terminal Used as an Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
33 SVcc Terminal Used as an Input for a Reference Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
34 Connection of Current Consuming Loads to SVcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
35 Error Characteristic Device 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
36 Error Characteristic Device 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
37 Error Characteristic Device 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
38 Error Characteristic Device 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
iv SLAA045
Tables
List of Tables
1 ADC Input Selection Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2 Current Source Output Select Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3 Range Select Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4 Clock Frequency Selection Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Architecture and Function of the MSP430 14-Bit ADC v
vi SLAA045
Architecture and Function of the MSP430 14-Bit ADC
Lutz Bierl
ABSTRACT
This application report describes the architecture and function of the 14-bit
analog-to-digital converter (ADC) of the MSP430 family. The principles of the ADC are
explained and software examples are given. The report also explains the function of all
hardware registers in the ADC. The References section at the end of the report lists
related application reports in the MSP430 14-bit ADC series.
1 Introduction
The analog-to-digital converter (ADC) of the MSP430 family can work in two
modes: the 12-bit mode or the 14-bit mode. Hardware registers allow easy
adaptation to different ADC tasks. The following paragraphs describe the modes
and hardware registers.
NOTE: The MSP430 Family Architecture Guide and Module
Library data book[1] is recommended. The hardware-related
information given there is very valuable and complements the
information given in this application report.
NOTE: For related application reports in the MSP430 14-bit ADC
series, see the References section.
Figure 1 shows the block diagram of the MSP430 14-bit ADC.
1
Introduction
AVcc
SVcc Switch ACTL.1 (Vref)
Offset
SVcc ACTL.12(Pd) AVcc/2 Canc. Pd
Generator _
Rex
C 2C 4C 8C 16C +
128 Range
Rext _ D MUX
Isource + 0.75 SVcc
128 VH
PD C Resistor Capacitor
Array
GAeVnecrca/2tor AACCTTLL..68,7 B 128 Decoder VL
1:4 (CSoff) Delay
128
A
AGND 7 2 5
ACTL.9, 10(Range)
(AVss)
ACTL.11(Auto) Successive Approximation
A0 ACTL.0(SOC) Register
AA21 8:1 Input ADCLK/12 EOC
A3
AA54 Input /12
A6 MUX ACTL.2.4 (Ax)
A7 ACTL.5 (None) /1, /2 ACTL 14
/3, /4 ACTL 13
MCLK
SAR.13 SAR.0 ACTL.14 ACTL.0
A7 A0 AEN.0–7
8
Input Buffer AIN Input Buffer Enable AEN Output Buffer ADAT Control Register ACTL
8 MDB 0–7 8 MDB 0–7 14 16
16-Bit Memory Data Bus, MDB
Figure 1. Hardware of the 14-Bit ADC
1.1 Characteristics of the 14-Bit ADC
•
Monotonic over the complete ADC range
•
Eight analog inputs; may be switched individually to digital input mode
•
Programmable current source on four analog inputs. Independent of the
selected conversion input: current source output and ADC input pins may be
different
•
Relative (ratiometric) or absolute measurement possible
•
Sample and hold function with defined sampling time
•
End-of-conversion flag usable with interrupt or polling
•
Last conversion result is stored until start of next conversion
•
Low power consumption and possibility to power down the peripheral
•
Interrupt mode without CPU processing possible
•
Programmable 12-bit or 14-bit resolution
•
Four programmable ranges (one quarter of SVcc each)
•
Fast conversion time
•
Four clock adaptations possible (MCLK, MCLK/2, MCLK/3, MCLK/4)
•
Internal and external reference supply possible
•
Large supply voltage range
2 SLAA045
ADC Function and Modes
2 ADC Function and Modes
The MSP430 14-bit ADC has two range modes and two measurement modes.
The two range modes are:
•
14-bit mode: The ADC converts the input range from AVss to SVcc. The ADC
automatically searches for one of the four ADC ranges (A, B, C, or D) that is
appropriate for the input voltage to be measured.
•
12-bit mode: The ADC uses only one of the four ranges (A, B, C, or D). The
range is fixed by software. Each range covers a quarter of the voltage at the
SVcc terminal. This conversion mode is used if the voltage range of the input
signal is known.
The two measurement modes are:
•
Ratiometric mode: A value is measured as a ratio to other values,
independent of the actual SVcc voltage.
•
Absolute mode: A value is measured as an absolute value.
Figure 2 shows different methods to connect analog signals to the MSP430 ADC.
The methods shown are valid for the 12-bit and 14-bit conversion modes:
1. Current supply for resistive sensors Rsens1 at analog input A0
2. Voltage supply for resistive sensors Rsens2 at analog input A1
3. Direct connection of input signals Vin at analog input A2
4. Four-wire circuitry with current supply Rsens3 at output A3 and inputs A4
and A5
5. Reference diode with voltage supply Dr1 at analog input A6
6. Reference diode with current supply Dr2 at analog input A7
SVcc SVcc
Ics
Rv Rex Ics A3
Rext A6
A4
Vin A2
R1 MSP430C32x
A1 Rsens3
A5
Ics
R2 Rsens2 Rsens1 A0 A7 Dr1
Ics Dr2
AVss AVss
DVss DVcc
0 V +5 V/3 V
Figure 2. Possible Connections to the Analog-to-Digital Converter
The calculation formulas for all connection methods shown in Figure 2 are
explained in the application report, Application Basics for the MSP430 14-Bit
ADC (SLAA046). [3]
Architecture and Function of the MSP430 14-Bit ADC 3
ADC Function and Modes
2.1 Function of the ADC
See Figures 1, 9, and 12 for this explanation. The full range of the ADC is made
by 4×128 equal resistors connected between the SVcc pin and the AVss (AGND)
pin. Setting the conversion-start (SOC) bit in the ACTL control register activates
the ADC clock for a new conversion to begin.
The normal ADC sequence starts with the definition of the next conversion; this
is done by setting the bits in the ACTL control register with a single instruction.
The power-down (PD) bit is set to zero; the SOC bit is not changed by this
instruction. After a minimum 6-m s delay to allow the ADC hardware to settle, the
SOC bit may be set. The ADC clock starts after the SOC bit is set, and a new
conversion starts.
•
If the 12-bit mode is selected (RNGAUTO = 0) then a 12-bit conversion starts
in a fixed range (A, B, C or D) selected by the bits ACTL.9 to ACTL.10.
•
If the 14-bit mode is selected (RNGAUTO = 1), a sample is taken from the
selected input Ax that is used only for the range decision. The found range
is fixed afterwards – it delivers the two MSBs of the result – and the conversion
continues like the 12-bit conversion. This first decision is made by the block
range MUX.
This first step fixes the range and therefore the 2 MSBs. Each range contains a
block of 128 resistors.
To obtain the 12 LSBs, a sample is taken from the selected input Ax and is used
for the conversion. The 12-bit conversion consists of two steps:
•
The seven MSBs are found by a successive approximation using the block
resistor decode. The sampled input voltage is compared to the voltages
generated by the fixed 27 (128) equally weighted resistors connected in
series. The resistor whose leg voltages are closest to the sampled input
voltage-which means between the two leg voltages—is connected to the
capacitor array (see Figure 1).
•
The five LSBs are found by a successive approximation process using the
block capacitor array. The voltage across the selected resistor (the sampled
voltage lies between the voltages at the two legs of the resistor) is divided into
25 (32) steps and compared to the sampled voltage.
After these three sequences, a 14-bit respective 12-bit result is available in the
register ADAT.
Figure 3 shows where the result bits of an analog-to-digital conversion come
from:
15 13 0
ADAT
0 0 MSB LSB
0118h
Range Resistor Decode Capacitor Array
MUX
12-Bit Conversion
14-Bit Conversion
Figure 3. Sources of the Conversion Result
4 SLAA045