Table Of ContentAdvanced CMOS Cell Design
Authors’ Profi les
Etienne Sicard is currently professor at National Institute of Applied
Sciences (INSA) of Toulouse, Department of Electrical and Computer
Engineering. He has been a visiting professor at the Department of
Electronics, Carleton University, Ottawa, Canada, since 2004. Prior to this,
he was Professor of Electronics at the Department of Physics, University
of Balearic Islands, Spain.
Etienne received his BS (1984) and PhD (1987) in Electrical Engineering
from the University of Toulouse while working in the laboratory LAAS
of Toulouse. Upon being awarded the Monbusho scholarship he worked
at Osaka University during 1988-89.
His research interests include several aspects of CAD tools for the design of integrated circuits, including
signal integrity in deep sub-micron CMOS ICs and electromagnetic compatibility.
Etienne is the author of several books, and software of micro-electronics (Microwind,Dsch) and speech
therapy (Vocalab). He also has to his credit several technical papers on electromagnetic compatibility of
CMOS integrated circuits.
A member of the French SEE and the IEEE EMC society, Etienne was elected, in 2006, the distinguished
IEEE lecturer for EMC of IMCs. He can be reached at: [email protected]
Sonia Delmas Bendhia is Assistant Professor at INSA-Toulouse,
Department of Electrical and Computer Engineering, where she teaches
digital electronics, IC testing and reliability, analog and RF CMOS design.
She is on the INSA Studies Directorate Board that organizes transversal
educational courses, and is also in charge of promoting IT in teaching.
Sonia holds an engineering diploma (1995) and a PhD (1998) in Electronic
Design from INSA, Toulouse, France. Her research interests include
signal integrity in deep sub-micron CMOS ICs and electromagnetic
compatibility of ICs.
She has authored several technical papers on signal integrity and EMC,
and has also contributed to three books. She can be reached at [email protected]
Copyright © 2007 by The McGraw-Hill Companies, Inc. Click here for terms of use.
Advanced CMOS Cell Design
Etienne Sicard
Professor
INSA Electronic Engineering School of Toulouse, France
Sonia Delmas Bendhia
Assistant Professor
INSA Electronic Engineering School of Toulouse, France
McGraw-Hill
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Vinay, Bhupesh, Brijesh and Tarun
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Contents
Preface xi
Acknowledgments xiii
Abbreviations and Symbols xv
1. Technology Scale-down 1
1.1 Recent Trends in CMOS Technology 1
1.2 Introducing the 90 nm Technology 5
References 12
2. Embedded Memories 13
2.1 The World of Memory 13
2.2 RAM Memory 15
2.3 RAM Array 18
2.4 Dynamic RAM Memory 23
2.5 EEPROM 24
2.6 Flash Memories 29
2.7 Ferroelectric RAM Memories 31
2.8 Memory Interface 34
References 34
Exercises 35
3. A Very-Simple-Microprocessor 36
3.1 Introduction 36
3.2 Instructions 38
3.3 Program Memory 39
3.4 Executing Instructions 40
3.5 Basic Block Design 45
3.6 Conclusion 65
References 66
Exercises 66
viii Contents
4. Field-Programmable Gate Array 67
4.1 Introduction 67
4.2 Confi gurable Logic Circuits 69
4.3 Programmable Logic Block 77
4.4 Interconnection Between Blocks 79
4.5 Conclusion 90
References 90
Exercises 90
5. Radio-Frequency Circuits 93
5.1 Target Radio-Frequencies 93
5.2 Inductor 94
5.3 Power Amplifi er 102
5.4 Oscillators 114
5.5 Phase-Lock Loop 125
5.6 Frequency Converter 137
5.7 Sub-sampling Frequency Converter 153
5.8 Conclusion 153
References 155
Exercises 155
6. Converters and Sensors 157
6.1 Introduction 157
6.2 Digital-Analog Converter Architectures 158
6.3 Sample and Hold Circuits 170
6.4 Analog-Digital Converter Architectures 176
6.5 Temperature Sensor 184
6.6 Image Sensors 186
6.7 Conclusion 191
References 191
Exercises 191
7. Input/Output Interfacing 192
7.1 Power Supply 192
7.2 The Bonding Pad 193
7.3 The Pad Ring 196
7.4 Input Structures 201
Contents ix
7.5 Digital Output Structures 216
7.6 Pull-up, Pull-down 228
7.7 Low Voltage Differential Swing 230
7.8 Power Clamp 232
7.9 Core/Pad Limitation 232
7.10 I/O Pad Description Using IBIS 234
7.11 Connecting to the Package 236
7.12 Signal Propagation Between Integrated Circuits 239
7.13 Conclusion 241
References 242
Exercises 243
8. Silicon on Insulator 244
8.1 Introduction 244
8.2 SOI Technology Issues 251
8.3 SOI Device Model 253
8.4 SOI Design 254
8.5 The Tera-Hertz MOS Device 255
8.6 Conclusion 257
References 257
Exercices 257
9. Future and Conclusion 258
9.1 Predicting the Unpredictable 258
9.2 Conclusion 259
References 260
Appendix A: Design Rules 261
Lambda Units 261
Layout Design Rules 262
Pads 266
Electrical Extraction Principles 266
Node Capacitance Extraction 267
Resistance Extraction 270
Simulation Parameters 272
Technology Files for DSCH 275
x Contents
Appendix B: MICROWIND31 Program Operation and Commands 277
Getting Started 277
List of Commands in MICROWIND31 277
Appendix C: DSCH31 Logic Editor Operation and Commands 318
Getting Started 318
Commands 318
Appendix D: Quick Reference Sheet 330
MICROWIND31 Menus 330
MICROWIND3.1 Simulation Menu 335
DSCH3.1 Menus 335
Silicon Tool 337
List of Files 339
File Organization 339
Appendix E: Interface to WinSpice 340
About WinSpice3 340
SPICE Syntax 340
Generate a SPICE File with DSCH3.1 345
Generate a SPICE File with MICROWIND3.1 348
References 355
Glossary 356
Index 361
Preface
Our fi rst book, Basics of CMOS Cell Design, covered integrated circuit technology scale down, the
MOS device model, layout and performance perspectives. It also included an extensive study of basic
gates, interconnect and analog cells. We introduced basic cell design and simulation using user-friendly
educational tools, Microwind and Dsch, developed by us.
Advanced CMOS Cell Design takes the discussion further and illustrates how Microwind and Dsch versions
3.1 can be used to solve design problems. The book begins with an introduction to novel concepts in
nano-scale technology, with a focus on 90 nm CMOS generation. In Chapter 2, various kinds of memories
are discussed. Chapter 3 uses the medium of a project to explain microprocessor architecture, at the logic
level. We would like to reiterate that this chapter would not have been possible without the able assistance
and guidance of Dr Mafuz Aziz.
The subject of Chapter 4 is fi eld programmable gate arrays, from a switch level. In Chapter 5 RF analog
cells are described, including extensive details of mixers, voltage-controlled oscillators, phase-lock-loop
and power amplifi ers. The focus of Chapter 6 is on principles of analog-to-digital, digital-to-analog
converters; the chapter also introduces CMOS sensors. Input-output interfacing principles are detailed
in Chapter 7, including an in-depth study of I/O structures and technology refi nements. Silicon insulator
technology is described in Chapter 8.
Appendix A explains design rules, while details of all Microwind and Dsch commands are provided in
Appendix B and C respectively. A quick reference sheet of the companion tools is provided in Appendix D.
Students and practising electronic engineers will fi nd this a useful reference to learn the practical aspects
of CMOS cell design.
We welcome feedback, suggestions for improvements, and comments on anything that could have been
done better.
About Microwind and Dsch
The exercises, samples in this book require extensive use of the software tools Microwind and Dsch
versions 3.1. A lite version of these tools, all schematic and layout fi les of the examples in the book can
be downloaded from: http://www.microwind.org
The URL to download the latest version of these tools is http://www.microwind.net
ETIENNE SICARD
[email protected]
SONIA DELMAS BENDHIA
[email protected]
Copyright © 2007 by The McGraw-Hill Companies, Inc. Click here for terms of use.
