Procedural Texture Mapping on FPG As Andy G. Ye

72 Pages·2000·3.25 MB·English

Procedural Texture Mapping on FPG As
Andy G. Ye
A thesis submitted in conformity with the rquirements
for the degree of Master of Applied Science in
the Graduate Department of Electrical and Computer Engineering,
University of Toronto
@ Copyright by Andy G. Ye 1999
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Procedural Texture Mapping on FPGAs
Andy G. Ye
Master of Applied Science, 1999
the Graduate Depart ment of Electrical and Corn puter Engineering
University of Toronto
Abstract
Procedural textures can be effectively used to enhance the visual realism of computer rendered
images. Procedural textures can provide higher realism for 3-D objects than traditional hardware
texture mapping methods which use memory to store 2-D texture images. This thesis investigates
a new method of hardware texture mapping in which texture images are synthesized using FPGAs.
This method is very efficient for texture mapping procedural textures of more than two input
variables. By synthesizing these textures on the fly, the large amount of memory required to store
their multidimensional texture images is eliminated, making texture mapping of 3-D textures and
parameterized textures feasible in hardware. This thesis shows that using FPGAs, procedural
textures can be synthesized at high speed, with a srnaIl hardware cost. Data on the performance
and the hardware cost of synthesizing procedural textures in FPGAs are presented. This thesis
also presents the FPGA implementatione of six Perlin noise based 3-D procedural textures.
Acknowledgments
1 would like to thank my supervisor, Professor David Lewis, for al1 the guidance and technical
advice. His guidance has made this two years a remarkable learning experience for me.
1 would like to thank Dave Galloway for laying the ground work by designing a 2-D texture
mapping system on the TM-2. 1 also would like to thank him for al1 the TM-2 software and
hardware support that he has provided.
1 would like to thank Marcus van Ierssel for designing the VGA interface card and maintaining
and constantly improving the TM-2 hardware.
1 also would like to thank Michiel van de Panne, James Stewart, Jonathan Rose, Vaughn Betz,
Qiang Wang, and Yaska Sanka for their technical help and advice.
1 am tremendously grateful to my parents for their support.
Finally 1 would like to thank al1 the people who have worked in LP392 in the past two years
for creating such a great research and learning environment.
Contents
1 Introduction
2 Background and Motivation 3
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 Fractal Geometry 3
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Procedurai Texture Mapping 5
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 AItera 10K50 FPGA Architecture 6
. . . . . . . . . . . . . . . . . . . . . . .
2.4 FPGA Based Custom Computing Machines 9
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.5 Goals and Outlines 10
3 3-D Rendering System 12
. . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 World to Screen Space Transformation 15
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.1 Clipping Algorithm 15
. . . . . . . . . . . . . . . . . . . . . . . . .
3.1.2 Perspective Projection Algorithm 18
. . . . . . . . . . . . . . . . .
3.1.3 Solid Texture Parameter Calculation Algorithm 18
....................
3.1.4 TriangleQuad Transformation Algorithm 22
. . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Screen to Texture Space Transformation 26
. . . . . . . . . . . . . . . . . . . . .
3.2.1 Instruction Fetching and Decoding Unit 27
........................
3.2.2 Quad to Scan-iîne Conversion Unit 29
. . . . . . . . . . . . . . . . . . . . . .
3.2.3 Scan-iine to Pixel Conversion Unit 33
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Procedural Texture Generator 35
........................................
3.4 FrameBuffer 36
4 FPGA Implementations of Procedural Texture Algorit hms 37
. . . . . . . . . . . . . . . . . . . . . . . . . .
4.1 Fractals and the Perlin Noise Function 37
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1.1 Fractals 37
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1.2 Perlin Noise Function 39
. . . . . . . . . . . . . . . . . . . . . . .
4.2 Perlin Noise Based 3-0 Procedural Textures 43
. . . . . . . . . . . . . . . . . . . . . . . . . .
4.2.1 Solid Type Procedural Textures 43
. . . . . . . . . . . . . . . . . . . . . . . . . .
4.2.2 Gas Type Procedural Textures 49
5 Performance and Hardware Cost 54
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.1 Performance 54
. . . . . . . . . .
5.2 Hardware Cost in Comparison to Memory Based Texture Mapping 55
5.3 SingleChip Graphic Accelerator with On-Chip Support for Perlin Noise based Pr*
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
cedural Texture Mapping 56
0 Conclusions and Future Work
List of Figures
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 Altera 10K50 Architecture 7
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Lo@c Element Block Diagrarn 7
. . . . . . . . . . . . . . . . .
2.3 Logic Elements Configured for Arithmetie Operations 8
. . . . .
2.4 FPGA Based Custorn Cornputer Machine for Procedural Texture Mapping 10
. . . . . . . . . . . . . . . . . . .
3.1 3-D Rendering System Using Procedural Textures 12
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Experimental Setup 13
. . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Partition of the Hardware Resources 14
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.4 View Volume 16
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.5 Clipping Algorithm 17
. . . . . . . . . . . . . . . . . . . . . . . . . .
3.6 Decomposing a Polygon into Triangles 17
. . . . . . . . . . . . . . . . . . . . .
3.7 Screen Space to Texture Space Transformation 18
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.8 Two Intersecting Triangles 22
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.9 Quads 23
. . . . . . . . . . . . . . . . . . . . . .
3.10 Scan-line Conversion frorn Triangles to Quads 24
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.11 Triangle to Quad Transformation 25
. . . . . . . . . . . . . . . . . . . . . . . . . .
3.12 Major Functional Blocks of STST Unit 26
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.13 STST Unit Instruction Format 27
. . . . . . . . . . . . . . . . . . . . . . . . .
3.14 Instruction Fetching and Decoding Unit 29
. . . . . . . . . . . . . . . . . . . . . . . . . . .
3.15 Decompoaing a Quad into Scan-lines 30
. . . . . . . . . . . . . . . .
3.16 Incremental Aigorithm for Quad to Scan-line Conversion 31
.......................
3.17 Datapath for Quad to Scan-line Conversion 32
................
3.18 Incremental Aigorithm for Scan-line to Pixel Conversion 34
. . . . . . . . . . . . . . . . . . . . . . .
3.19 Datapath for Scan-line to Pixel Conversion 35
. . . . . . . . . . . . . . . . . . .
3.20 110 Interface of the Procedural Texture Generator 35
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.21 FrameBuffer 36
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1 One Dimensiond Fractal Function 38
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 F'ractal Function Hardware 38
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3 Perlin Noise Function Hardware 40
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.4 Linear Interpolation Unit 40
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.5 Random Number Generator 42
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.6 Marble Interna1 Structure 43
. . . . . . . . .
4.7 Procedural Texture Generator Configuration for the Marble Texture 44
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.8 Marble Texture Mapped Cube 44
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.9 Wood Internd Structure 45
. . . . . . . . . .
4.10 Procedural Texture Generator Configuration for the Wood Texture 46
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.11 Wood Texture Mapped Cube 46
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.12 Brick Wall Pattern 47
. . . . . . . . . .
4.13 Procedural Texture Generator Configuration for the Brick Texture 48
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.14 Brick Texture Mapped Cube 48
. . . . . . . . . . .
4.15 Procedural Texture Generator Configuration for the Fog Texture 50
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.16 A SIide of Fog Texture 50
. . . . . . . . . .
4.17 Procedural Texture Generator Configuration for the Cloud Texture 51
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.18 A Slide of Cloud Texture 52
. . . . . . . . . . . . .
4.19 Procedura Texture Generator Configuration for Fire Texture 52
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.20 A Sfide of Fire Texture 53
. . . . . . . . . . . . . . .
5.1 ASIC+FPGA Procedural Texture Mapping Organization 57
vii
List of Tables
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 STST Unit Instructions 28
. . . . . . . . . . . . . . .
5.1 Area Cost of Implernenting Procedural Texture Generator 55
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2 ASIC+FPGA Performance 57
. . . . . . . . . . . . . . .
5.3 Area cost of FPGA Hardware in ASIC+FPGA Approach 58
Chapter 1
Introduction
In many computer graphic applications, polygon meshes are used to model geometrical surfaces.
Texture mapping increases the level of surface detail of polygon meshea by rnapping twc+dirnensional
texture images on to the meshes. In common graphic cards, the 2-D texture images are pre-
computed and stored in memory on the cards. Procedural texture mapping extends the concept
of texture mapping by determining the surface coloring of polygon meshes using computer al-
gorithms. These procedural texture algorithms typically model the structures of materiais like
concrete, wood and marble. They can be defined in 3-D space and be parameterized using input
variables defining additional attributes other than the texture coordinates. The main advantages
of procedural textures ov2r conventional 2-D textures are much enhanced visual realism, reduced
storage requirement, enhanced ease of use and user controllability.
Procedural texture mapping has become an important method of generating visually redis-
tic images in many graphic applications. The computation, however, is often timeconsuming.
Procedurd texture algorithms, when executed in software, often cannot achieve the real time per-
formance demanded by rnany computer animation applications. While 2-D textures can be stored
in RAM, 3-D textures require excessive memory. There are no efficient methods of performing
texture mapping using three-dimensional or parameterized procedural textures using fixed hard-
ware. The primary reason for this is the variety of procedural textures, which makes it dificult
to design a single, efficient hardwired implementation for synthesizing ail textures. Other reasons
include the complexity of many procedural texture algorithms, and the ongoing development of
new algorithms. A hardwired accelerator not only would be difficult to design to support al1 the