Phase adjustment apparatus and method for a memory device signaling system

83 Pages·2015·5.42 MB·English

US007668276B2
(12) United States Patent (10) Patent N0.: US 7,668,276 B2
Hampel et a]. (45) Date of Patent: Feb. 23, 2010
(54) PHASE ADJUSTMENT APPARATUS AND (56) References Cited
METHOD FOR A MEMORY DEVICE
U.S. PATENT DOCUMENTS
SIGNALING SYSTEM
3,753,232 A 8/1973 Sporer ...................... .. 713/600
(75) Inventors: Craig E. Hampel, San Jose, CA (US); (Continued)
Richard E. Perego, San Jose, CA (US); FOREIGN PATENT DOCUMENTS
Stefanos S. Sidiropoulos, Palo Alto, CA
GB 2355571 A 4/2001
(US); Ely K. Tsern, Los Altos, CA (US);
(Continued)
Fredrick A. Ware, Los Altos Hills, CA
(Us) OTHER PUBLICATIONS
Abdelrahman, Accessed Jul. 3, 2002, “Scheduling of wavefront par
(73) Assignee: Rambus Inc., Los Altos, CA (US)
allelism 0n scalable shared-memory multiprocessors,” IEEEXp/ore,
http://ieeexp10re.ieee.0rg.
Notice: Subject to any disclaimer, the term of this
(Continued)
patent is extended or adjusted under 35
U.S.C. 154(b) by 1419 days. Primary ExamineriChieh M Fan
Assistant ExamineriEva Y Puente
(21) Appl. No.: 10/278,708 (74) Attorney, Agent, or FirmiMorgan, Lewis & Bockius
LLP
(22) Filed: Oct. 22, 2002
(57) ABSTRACT
(65) Prior Publication Data
Apparatus and methods are disclosed for adjusting phase of
US 2003/0117864 A1 Jun. 26, 2003 data signals to compensate for phase-offset variations
between devices during normal operation. The phase of data
Related U.S. Application Data signals are adjusted individually in each transmit data unit
and receive data unit across multiple data slices with a com
(60) Provisional application No. 60/343,905, ?led on Oct.
mon set of phase vector clock signals and a corresponding
22, 2001, provisional application No. 60/376,947,
clock cycle count signal. The transmission of signal informa
?led on Apr. 30, 2002.
tion between a ?rst device (such as a memory controller) and
a second device (such as a memory component) occurs with
(51) Int. Cl.
out errors even when the accumulated delays between the ?rst
H04L 25/00 (2006.01) device and second device change by a half symbol time inter
(52) U.S. Cl. ..................... .. 375/371; 375/141; 375/354; val or more during operation of the system. The apparatus
375/355; 375/226; 327/258; 327/231; 327/239; reduces the circuitry required, such as phase-lock-loops, for
331/100; 331/34 individually adjusting the phase of each transmit data unit and
(58) Field of Classi?cation Search ............... .. 375/371, receive data unit across multiple data slices, which in turn
375/354, 376, 375, 141, 355, 226; 713/400; results in reduction in complexity and cost of the system.
714/700; 327/231, 258, 239; 331/100, 34
See application ?le for complete search histo ry. 26 Claims, 44 Drawing Sheets
2500
US 7,668,276 B2
Page 2
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