Table Of ContentTABLE OF CONTENTS
Chairman's Introduction
Program Chairman's Introduction
Program Committee
Reviewers
Session Chairpersons
K1: Invisible laws and public myths of programming
Keynote speaker: W.M. Turski
Massively parallel computers: past, present and future
Keynote speaker: D.H. Schaefer
ESPRIT basic research: secure tomorrow's innovation
Keynote speaker: G. Metakides
Topics on computer architecture
Session Chairman: E. Sanchez (CH)
Improving the division instruction of application-specific RISCS
M. Lois Anido (BR)
Micro-instruction placement by simulated annealing
E.S.T. Fernandes (BR), V.C. Barbosa (BR), A.F. de Souza (BR), N.Q. Vascon-
celos (BR)
Compilation techniques for a high level language processor
B.W. Watson (NL), W.J. Withagen (NL), M.P.J. Stevens (NL)
Multiprocessors
Session Chairman: B. Lent (CH)
A communication mechanism and its implementation in the Multi-SIMD
Massively Parallel Machine SPHINX
S. Bouaziz (F), E. Pissaloux (F), A. Mérigot (F), F. Devos (F)
MULTIPLUS: a modular high-performance multiprocessor
J.S. Aude (BR), A.J.O. Cruz (BR), A.C. Pachezo Jr. (BR), A.M. Meslin (BR),
G. Bronstein (BR), G.P. Azevedo (BR), N.R. Figueira (BR), R.P. Azevedo (BR),
S.C. Oliveira (BR)
A shared memory architecture for parallel cyclic reference counting
R.D. Lins (BR)
Optimization of high speed digital circuits
Session Chairman: K. Eshraghian (AU)
Accurate extraction of interconnect capacitances by adaptive mixed F.E.M
L. Ferragut (E), R. Montenegro (E), G. Winter (E), A. Nafez (E)
Optimization and architectural evaluation of regular combinatoric structures
V. Eisele (D), D. Schmitt-Landsiedel (D)
Speed-area-power optimization for DCFL and SDCFL class of logic using ring
notation
K. Eshraghian (AU), R. Sarmiento (E), P.P. Carballo (E), A. Nanez (E)
Object oriented VLSI design
Session Chairman: L. Jozwiak (NL)
VLSI integrated circuit design representation in an object-oriented CAD
environment
W. Wrona (PL), A. Pawlak (D)
Object-oriented modelling in digital circuit CAD systems
C. Chariton (UK), P. Leng (UK), M. Rivers (UK)
Object oriented system analysis for VLSI
Y.C. Hu (NL), A.C. Verschueren (NL), M.P.J. Stevens (NL)
Design and testing of real-time systems
Session Chairman: J. Karjalainen (SF)
A comparison of temporal Petrinet techniques in the specification and design of
hard real-time systems
J.S. Sagoo (UK), D.J. Holding (UK)
Minimizing the maximum lateness in real-time computations with extended
deadlines
P. Tu (USA), K.-J. Lin (USA)
A simulation-based system for testing real-time embedded software in the host
environment
H. Honka (SF), M. Kattilakoski (SF)
Operating systems issues in parallel processing
Session Chairman: S. Winter (UK)
An analysis of communication and multiprogramming in the Helios operating
system
F. Hemery (F), D. Lazure (F), E. Delattre (F), J.F. Mehaut (F)
Interprocess communication with multicast support in DMINIX operating
system
S. Rong Tsai (CHT), R. Jing Chen (CHT)
An efficient routing strategy to support process migration
F. Delaplace (F), J.L. Giavitto (F)
Hardware building blocks
Session Chairman: K. Kuchcinski (S)
Use of mathematical procedures for the task of power measurement and the
corresponding VLSI-realization
R. Rauscher (D), V. Gruppe (D)
3D hardware packages for parallel architectures
J.-L. Bechennec (F), F. Capello (F), D. Etiemble (F)
Design of a custom DRAM storage unit coupled to i486(tm)
J.-L. Peter (F)
VLSI synthesis
Session Chairman: H.P. Zima (A)
A hardware allocator guided by cost functions
J. Septién (E), D. Mozos (E), R. Hermida (E), F. Tirado (E)
Data path synthesis from a microcontroller instruction set specification in
MicroSyn
H.G. Hack (D), F. Krohm (D), Y. Manoli (D)
Scheduling in a continuous area-time design space
J. Cortadella (E), R.M. Badia (E), E. Ayguadé (E)
CMOS implementation of the IBM ESA/390
Session Chairman: N. Roethe (D)
A CMOS implementation of the ESA/390 mainframe architecture
N. Roethe (D), U. Wille (D)
Data consistency in a multiprocessor system with ‘store in’ cache concept
G. Doettling (D)
The clock, test and maintenance control chip of the IBM ES/9221
D. Schmunkamp (D), C.W. Starke (D)
A VLSI-CAD system for efficient design of CMOS/390 processors
A. Tietz (D), J. Koehl (D)
Fault tolerant parallel systems
Session Chairman: P. Milligan (UK)
Fault tolerance for highly parallel computers
M. Dal Cin (D)
Fault tolerant aspects of a dynamic dataflow architecture - PATTSY
V.L. Narasimhan (AU), T. Downs (AU)
Towards an optimal combination of error detection mechanisms
A. Steininger (A), H. Schweinzer (A)
Advances in object oriented design
Session Chairman: K. Klockner (D)
An object oriented approach to data persistence
M. Ancona (1), G. Nani (1), M. Paci (1)
Language and runtime support for distributed object groups
A. Schill (D)
Implementation and design of PVD: an interactive protocol specification and
validation environment
K.C. Huang (CHT), W.S. Hsieh (CHT), C.S. Lu (CHT), M.S. Yang (CHT), T.S.
Nain (CHT), |. Lin (CHT)
The design and implementation of VOOM: a parallel virtual object oriented ma-
A.T. Balou (UK), A.N. Refenes (UK)
Architectural synthesis
Session Chairman: A. Ndfez (E)
A design concept for verified concurrent controllers
M. Schafer (D), G. Klein-Hessling (D)
A Prolog-based design environment for the high-level synthesis of application-
specific architectures
P. Tsanakas (GR), G. Papakonstantinou (GR), S. Kaxiras (GR)
An architectural design support environment for high-performance digital sys-
S. Antoniazzi (1), M. Mastretti (1)
Task level behavioral hardware description
L.P.M. Benders (NL), M.P.J. Stevens (NL)
Image processing
Session chairman: F. Vajda (H)
An intelligent sensor integrated preprocessing facility for neural networks
J. Buddefeld (D), K.E. Grosspietsch (D), B.J. Hosticka (D), R. Klinke (D), G.
Wagner (D)
Multiprocessor based image coding
V. Silva (P), L. Cruz (P), F. Lopes (P), A. Rodrigues (P), L. de Sa (P)
The determination of angular values and parameters in flat surfaces: from the
mathematical approach to the CORDIC architecture
C. Alippi (UK)
Fault tolerant parallel software
Session Chairman: M. Dal Cin (D)
A stable transactional memory for building robust object oriented programs
G. Muller (F), B. Rochat (F), P. Sanchez (F)
Software fault tolerance in concurrent ADA programs
A. Clematis (1), V. Gianuzzi (1)
Software fault tolerance in concurrent systems: conversation placement using
G.F. Carpenter (UK), A.M. Tyrrell (UK)
Program development environments
Session Chairman: P. Milligan (UK)
Visual languages, their definition and application in system development
S. El-Kassas (NL)
An integrated software environment for large-scale Occam programming
V.C. Barbosa (BR), L.M. de A. Drummond (BR), A.L. H. Hellmuth (BR)
An integrated framework for the design of distributed programming environ-
M.A. Ruz Fernandez (E), G. Le6én Serrano (E), M.V. Elbal Diaz (E)
VLSI design and routing
Session Chairman: A. Pawlak (D)
From a high level description of an IC to silicium: don’t lose design intent
F. Calvo Torre (E)
Strategy of one and half layer routing
M. Servit (CS), J. Schmidt (CS)
A placing and routing tool implemented in Prolog
N.A. Kyrloglou (GR), S. Koutroubinas (GR), A. Koyandis (GR), C.E. Goutis
(GR)
Image recognition
Session Chairman: S. Karkanis (GR)
Histological image understanding by error backpropagation
A.N. Refenes (UK), C. Alippi (UK)
Knowledge-based segmentation using morphological filters
J. Neejarvi (SF), V. Fischer (CS), S. Alenius (SF), Y. Neuvo (SF)
An image distance measure insensitive to amplitude and mean value variations ..
R. Jezieniecki (E), E. Rovaris (E)
Parallel program development
Session Chairman: H.P. Zima (A)
Parallelising C + + -programs for transputer systems
T. Ungerer (D)
Implementing Prolog on a DAP/multi-transputer computer
P. Kacsuk (UK)
Simulation and visualization tools for linked-based parallel architectures
E. Luque (E), R. Suppi (E), J. Sorribes (E), M.A. Mayosky (AR), M.A. Senar (E)
Session Chairman: R. Peha Mari (E)
Towards a development environment for fifth generation systems
H. Sorensen (IR), T.A. Delaney (IR), W.P. Kenneally (IR), S.J.M. Murphy (IR),
F.B. O'Flaherty (IR), A.B. O'Mahony (IR), D.M.J. Power (IR)
Prolog on a RISC: implementation and evaluation
G. Berger Sabbatel (F), A. Jemai (F)
Issues in the implementation of Prolog, and their optimization
H.C.R. Lock (D), A. Martins (F)
Hardware Description Languages
Session Chairman: A. Pawlak (D)
A higher level of behavioural specification: an example in interval temporal
R.D. Dowsing (UK), R. Elliot (UK)
OPART: a hardware-description language for test generation
J. Sziray (H), Z. Nagy (H)
Formalizing the design-trajectory of sequential machines
R.J. Huis in ‘t Veld (NL)
Digital signal processing
Session Chairman: E.v. Puttkamer (D)
An applicative real-time language for DSP-programming supporting asynchro-
nous data-flow concepts
A. Knoll (D), M. Freericks (D)
Temporal control improvement of hidden Markov models for automatic speech
recognition
C. Dours-Senac (F)
Array processor for LS FIR system identification
S.S. Nikolaidis (GR), O.G. Koufopaviou (USA), S. Theodoridis (GR), C.E. Gou-
tis (GR)
DSP-architecture design with Petri-net based simulator
K. Rautiola (SF), P. Jokitalo (SF)
Interconnection networks for multiprocessors
Session Chairman: E.L. Zapata (E)
Control policies for interconnected distributed systems via an HIPPI switch
|. Chlamtac (USA), A. Ganz (USA), M.G. Kienzle (USA)
A regular interconnection network
C.S. Yang (CHT) W.S. Hsieh (CHT), D.C. Lou (CHT), J.S. Tzeng (CHT)
A reconfigurable modular fault tolerant generalized Boolean N-Cube network ...
C.S. Yang (CHT), S.Y. Wu (CHT), K.C. Huang (CHT)
On hardware for generating routes in KAUTZ digraphs
G.J.M. Smit (NL), P.J.M. Havinga (NL), P.G. Jansen (NL), F. de Boer (NL), B.
Molenkamp (NL)
System design
Session Chairman: G. Leon (E)
Software life cycle management based on a phase distinction method
F. Lehner (A)
Software quality management
E. Wallmiller (CH)
Transnet: a method for transformational development of embedded software
K. Sacha (P)
A Modula-2 like systems programming language and its implementation
J. Miranda (E), J. Fortes (E)
VLSI design tools
Session Chairman: M.P.J. Stevens (NL)
GAF: a portable standard-cell floating point adder generator using the CXgen
function library
A. Compan (F), P. Debaud (F), V. Delorme (F), J.A. Francois (F), H. Mehrez
(F), F. Pécheux (F)
TVA: a timing verifier with analytic temporal modelling
D. Navarro (E), A Roy (E), M. Robert (F), D. Deschacht (F), D. Auvergne (F)
LISAS-simulation tool for regular networks of finite state machines
T. Miuller-Wipperfurth (A), H. Hellwagner (D), F. Pichler (A)
An efficient method for sequential general decomposition of sequential ma-
L. Jozwiak (NL), J.C. Kolsteren (NL)
The ESPRIT-PATRICIA project
Session Chairman: G. Musgrave (UK)
The need for a core method
E.M. Mayger (UK), M.D. Francis (UK), R.L. Harris (UK), G. Musgrave (UK),
M.P. Fourman (UK)
The PATRICIA testability analysis tool
M. Hadjinicolaeu (UK), N. Burgess (UK), D. Sciuto (1), G. Buonanno (1),
P. Cavalloro (1), G. Zaza (1)
DFG: a graph based approach for algorithmic flow driven architecture synthesis.
A. Antola (1), F. Distante (1)
CAD for verified hardware design via category theory
R. Zimmer (UK), A. McDonald (UK), R. Holte (CAN)
Control applications
Session Chairman: L. Mezzalira (1)
A combined fuzzy and classical PID controller
D.P. Kwok (HK), P. Wang (HK), C.K. Li (HK)
A multiprocessor bus system with cyclic data exchange for the field of control
and signal processing
H. Schweinzer (A), G. Stadibauer (A)
Concept for a self-calibrating floatingpoint-converter for audio-applications .....
R. Mitterbauer (A)
Network communication protocols
Session Chairman: J. Tiberghien (B)
A fast method of protocol validation using reduced stable state exploration
technique
W.S. Hsieh (CHT), T.S. Nain (CHT), M.S. Yang (CHT), C.S. Lu (CHT), K.C.
Huang (CHT)
Deriving protocol specifications from service specifications including param-
M. Kapus-Kolar (YU)
On the specification and implementation of X.25 using CSP and Occam
S.P. Van Trees (USA), O. Frieder (USA)
Database systems
Session Chairman: G. Leon (E)
Global checkpointing scheme for heterogeneous distributed database systems...
J.T. Lim (ROK), S.C. Moon (ROK)
Algorithms for inference control
A. Kameas (GR), P. Fitsilis (GR), G. Pavlides (GR)
Efficient access method for multi-dimensional complex objects in spatial data-
bases: BR tree
B.Y. Hwang (ROK), B.W. Kim (ROK), S.C. Moon (ROK)
VLSI testing and fault modelling |
Session Chairman: H. Painke (D)
Multiple stuck-at faults detection in CMOS combinational gates
G. Buonanno (I), F. Lombardi (USA), D. Sciuto (1), Y.-N. Shen (USA)
Detection of multiple stuck-on/stuck-open faults by single faults test sets in
MOS transistor networks
F. Darlay (CH)
Mixed level test generation for high fault coverage
U. Hubner (D), H. Hinsen (D), M. Hofebauer (D), H.T. Vierhaus (D)
Quality Control
Session Chairman: G. Ciccarella (1)
Design and implementation of a distributed real-time expert-system for fault di-
agnosis in modular manufacturing systems
E. Brenner (A), J. Grabner (A), M. Moosburger (A), G. Otschko (A), K. Schlogl
(A), P. Seifter (A), J. Song (A), Ch. Steger (A), R. Weiss (A)
Quality control in textile industry via machine vision
|. Erény (H), J. Pongracz (H)
Evaluation of parallel systems
Session Chairman: D.R. Wilson (UK)
Parallel solution of state-estimation on an IBM ring network
Y. Wallach (USA), E. Yaprak (USA)
Performance evaluation of transputer systems with linear algebra problems
A. Fernandez (E), J.M. Llaberia (E), J.J. Navarro (E), M. Valero-Garcia (E)
Testing methods
Session Chairman: F. Distante (1)
Testability measure with reconvergent fanout analysis and its applications
X. Gu (S), K. Kuchcinski (S), Z. Peng (S)
Remarks on the use of Reed-Solomon codes in signature analysis
A. Pataricza (H)
VLSI testing and fault modelling II
Session Chairman: H. Painke (D)
A new approach on fault list handling for faster fault elimination and direct test
vector generation
M.J. Aguado (E), J.L. Conesa (E), E. de la Torre (E), J. Uceda (E)
Analysis of failure data collected from a TMR microprocessor controller
G.A.S. Wingate (UK), C. Preece (UK)
Session Chairpersons’ addresses
Author index
Subject index
