Hardware Security Primitives

356 Pages·2022·8.578 MB·English

by  Mark Tehranipoor, Nitin Pundir, Nidish Vashistha, Farimah Farahmandi

Mark Tehranipoor
Nitin Pundir
Nidish Vashistha
Farimah Farahmandi
Hardware
Security
Primitives
Hardware Security Primitives
Mark Tehranipoor • Nitin Pundir (cid:129)
Nidish Vashistha (cid:129) Farimah Farahmandi
Hardware Security Primitives
MarkTehranipoor NitinPundir
UniversityofFlorida UniversityofFlorida
Gainesville,FL,USA Gainesville,FL,USA
NidishVashistha FarimahFarahmandi
UniversityofFlorida UniversityofFlorida
Gainesville,FL,USA Gainesville,FL,USA
ISBN978-3-031-19184-8 ISBN978-3-031-19185-5 (eBook)
https://doi.org/10.1007/978-3-031-19185-5
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Dedicatedto:
MarkTehranipoor:Mystudents
NitinPundir:Theopportunities Igot
NidishVashistha:Myfamilyandfriends
FarimahFarahmandi:Mymentor
Dr.Tehranipoor,students,andfamily
Preface
Inthismodernworldofhighlyconnectedelectronicdevicesandonlineclouddata
storage, a user can access any sort of information anytime and anywhere with the
help of smart devices. Besides storing users’ personal information, these devices
also store proprietary data such as encryption keys, soft intellectual property, and
confidential information to perform artificial intelligence specialized tasks such
as an autopilot for self-driving cars. The presence of confidential and intellectual
informationonhardwaredevicesmakesthemalucrativetargetforhackers’attacks.
An adversary can compromise the security of these hardware devices, hijack
information to achieve financial gains, and steal intellectual property to perform
reverse engineering for manufacturing counterfeit cloned devices. Besides these
cloned counterfeits, recycled and refurbished devices can be sold as new ones.
These recycled devices cause a revenue loss to manufacturers and pose safety
issues due to their reduced life span and reliability. Hence, these devices need to
be secured from these attacks. One of the possible solutions to ensure hardware
security is to physically embed secure circuits for device authentication, random
passkeygeneration,andanti-counterfeitingdetection.Thesecircuitshaveaunique
signatureasanalogoustohumanretinal/fingerimprintsandDNA.Thesesignatures
are random, hard to predict, and nearly impossible to clone. Hence, it prevents
unauthorized access to data and ensures reliable hardware platforms for secure
communications, device authentication, and defense against many software and
hardwarerisksandattacks.Physicallyunclonablefunctions(PUFs)andTrueRan-
domNumberGenerators(TRNGs)arewidelyusedashardwaresecurityprimitives
to secure hardware devices and counterfeit detection. Therefore, it is necessary to
understandtheirtypes,applications,andfunctionsforsecuringhardwaredevices.
Thisbookwillbeacomprehensivereferenceforcircuitsandsystemsdesigners,
graduate students, academics, and industrial researchers interested in hardware
securityandtrust.Itwillincludecontributionsfromexpertsandresearchersinthe
field of secure hardware design and assurance. In addition, this book will cover
varioussecurityprimitives,designconsiderationsforasecureSoCdesign,andtheir
applicationsincounterfeithardwaredetection.
vii
viii Preface
Thisvolumewillprovidethemostcomprehensivecoverageofvarioushardware
security primitives, their roles in hardware assurance and supply chain from the
integratedcircuittothepackagelevel.Chapters1–7coverdifferenttypesofphysical
unclonable functions (PUFs), which are fundamental components to hardware
security. Chapter 8 discusses true random number generators (TRNSs) developed
byexploitingtheentropyinhardwaremanufacturing.Chapter9discusseshardware
security primitives developed using emerging technologies other than CMOS,
such as carbon nanotubes. Chapters 10 and 11 present various techniques for
hardwarecamouflagingandwatermarking,respectively.Chapter12coversvarious
lightweightcryptographicalgorithmsthatcanbealternativestoPUFsonresource-
constraintdevices.Chapter13discussesgrowingvirtualproofofrealitytoprovide
securitybasedonblockchainandsmartcontracts.Chapter14coversanalogsecurity,
usually neglected during hardware security discussions. Chapters 15, 16, and 17
covervariousICandpackagelevelmethodsfortempering,counterfeit,andrecycled
detection. Finally, Chaps.18 and 19 cover various side-channel and fault-injection
resistantprimitivesforsecurityincryptographichardware.
Gainesville,FL,USA MarkTehranipoor
Gainesville,FL,USA NitinPundir
Gainesville,FL,USA NidishVashistha
Gainesville,FL,USA FarimahFarhmandi
July2022
Acknowledgments
This work would not have been possible without the assistance of individuals
affiliated with the Florida Institute for Cyber Security (FICS) Research at the
University of Florida. We appreciate their persistent work, review, and scientific
contributionsinseveralchapters:
UpomaDas,Chap.1
RasheedKibria,Chap.2
NurunN.Mondol,Chap.3
Md.LatifurRahmanandMd.SaadUlHaque,Chap.4
PanthaProtimSarker,Chap.5
ShamsTarekandAzimUddin,Chap.6
SouravRoy,Chap.7
UpomaDas,Chap.8
LitonKumarBiswas,Chap.9
NasminAlam,Chap.10
ShuvagataSahaandHasanAl-Shaikh,Chap.11
AmitMazumderShuvo,Chap.12
RasheedKibria,Chap.13
RuiGuo,Chap.14
RuiGuo,Chap.15
MdKawserBeparyandDipayanSaha,Chap.16
SajibGhoshandMridhaMdMashahedurRahman,Chap.17
MohammadShafkatM.Khan,Chap.18
TanvirRahman,Chap.19
Inaddition,wewouldliketothankErikaClesiandDr.DhwaniMehtafortheirhelp
inreviewingthebook.
ix
Contents
1 IntrinsicRacetrackPUF................................................... 1
1.1 Introduction........................................................... 1
1.2 Background........................................................... 2
1.2.1 PUFPerformanceMetrics.................................. 4
1.3 RacetrackPUF........................................................ 5
1.3.1 ArbiterPUF................................................. 5
1.3.2 Ring-OscillatorPUF........................................ 7
1.3.3 ClockPUF................................................... 8
1.3.4 AdvancementinClassicalPUF............................ 10
1.4 Conclusions........................................................... 15
References.................................................................... 15
2 Intrinsic-TransientPUF ................................................... 17
2.1 Introduction........................................................... 17
2.2 Background........................................................... 18
2.3 DesignStrategyandApplications................................... 19
2.3.1 PUFDesignforFPGA-BasedEmbeddedSystems ....... 19
2.3.2 TransientEffectRingOscillator-BasedPUF.............. 21
2.3.3 GlitchPUF.................................................. 23
2.3.4 TERO-PUFonSRAMFPGAs............................. 25
2.3.5 TERO-PUFinIoTs......................................... 28
2.4 Conclusions........................................................... 30
References.................................................................... 30
3 DirectIntrinsicCharacterizationPUF................................... 33
3.1 Introduction........................................................... 33
3.2 CellularNeuralNetworkPUF....................................... 34
3.3 PowerDistributionPUF.............................................. 37
3.4 QUALPUF............................................................ 39
3.5 Via-PUF............................................................... 42
xi
xii Contents
3.6 ThresholdVoltagePUF .............................................. 45
3.6.1 Conclusions................................................. 46
References.................................................................... 46
4 VolatileMemory-BasedPUF.............................................. 49
4.1 Introduction........................................................... 49
4.2 Background........................................................... 51
4.2.1 PUFPerformanceEvaluationMetrics..................... 51
4.3 ComparativeAnalysisofVolatileMemory-BasedPUF............ 52
4.3.1 BistableRingPUF.......................................... 52
4.3.2 DRAM-BasedIntrinsicPUF............................... 53
4.3.3 MECCAPUF............................................... 55
4.3.4 IntrinsicRowhammerPUF................................. 57
4.3.5 SRAMRandomAddressError-BasedChipID
Generation .................................................. 58
4.4 Conclusions........................................................... 60
References.................................................................... 60
5 ExtrinsicDirectCharacterizationPUF .................................. 63
5.1 Introduction........................................................... 63
5.2 Background........................................................... 64
5.2.1 PUFPreliminaries.......................................... 64
5.2.2 ChallengesofDirectExtrinsicCharacterization.......... 65
5.3 ExtrinsicDirectCharacterizationPUF.............................. 66
5.3.1 ALILEDiode-BasedPUF.................................. 66
5.3.2 Nano-Electro-Mechanical-BasedPUF .................... 68
5.3.3 CarbonNanotube-BasedPUF.............................. 70
5.3.4 MEMsAccelerometerSensor-BasedPUF ................ 71
5.3.5 Capacitor-BasedPUF ...................................... 74
5.4 Conclusions........................................................... 77
References.................................................................... 77
6 HybridExtrinsicRadioFrequencyPUF................................. 81
6.1 Introduction........................................................... 81
6.2 Background........................................................... 83
6.2.1 ThreatModel ............................................... 83
6.2.2 Challenges .................................................. 84
6.3 RadioPUFinIoTSecurity .......................................... 84
6.4 PUF-EmbeddedRFID................................................ 87
6.5 RFIDTagsasCertificatesofAuthenticity .......................... 88
6.6 PUFinAmbientWorld .............................................. 90
6.7 RadioFrequency-DNA............................................... 92
6.8 Conclusions........................................................... 93
References.................................................................... 94