Engineering Applications of FPGAs: Chaotic Systems, Artificial Neural Networks, Random Number Generators, and Secure Communication Systems

230 Pages·2016·19.67 MB·English

by  Esteban Tlelo-Cuautle

Esteban Tlelo-Cuautle
José de Jesús Rangel-Magdaleno
Luis Gerardo de la Fraga
Engineering
Applications
of FPGAs
Chaotic Systems, Artificial Neural
Networks, Random Number Generators,
and Secure Communication Systems
Engineering Applications of FPGAs
Esteban Tlelo-Cuautle
é ú
Jos de Jes s Rangel-Magdaleno
Luis Gerardo de la Fraga
Engineering Applications
of FPGAs
fi
Chaotic Systems, Arti cial Neural Networks,
Random Number Generators, and Secure
Communication Systems
123
Esteban Tlelo-Cuautle LuisGerardo dela Fraga
INAOE Computer Science Department
Tonantzintla, Puebla CINVESTAV-IPN
Mexico Mexico City
Mexico
JosédeJesús Rangel-Magdaleno
Department ofElectronics
INAOE
Tonantzintla, Puebla
Mexico
ISBN978-3-319-34113-2 ISBN978-3-319-34115-6 (eBook)
DOI 10.1007/978-3-319-34115-6
LibraryofCongressControlNumber:2016939064
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Preface
Field-programmablegatearrays(FPGAs)wereinventedin1984byRossFreeman.
Basically,itisasemiconductorconsistingofprogrammablelogicblocksthatcanbe
usedtoreproducesimplefunctionsuptoacomplexsystemonachip(SoC).Themain
advantagesoftheFPGAsare:theycanbereprogrammed,havelowdevelopmentand
acquisitioncosts,andtheirapplicationisagoodoptioniftheproductisnotinhigh
numbers.Thatway,FPGAsaregainingtheattentionofresearchesforthedevelop-
ment of applications in a wide variety offields, for example, medicine, communi-
cations, signal processing, avionics, space, finance, military, electronics, and other
areasthatexploittheirflexibilityandcapabilityofbeingreprogrammed/configured.
Configurability for engineering applications makes FPGA very crucial in initial
stagesforanyembeddedproject.Someanalogcircuitsandanydigitalcircuitcanbe
implemented using FPGA, so the possibilities are endless. However, applications
foundonrecentarticlesandbooksdidnotdetailtherealizationsfromthemodelto
the physical synthesis. That way, this book details engineering applications of
FPGAsfrom mathematical modelsdescriptions toVHDLprogramming issues and
hardware implementation of applications involving chaos theory.
The reader can find insights on FPGA-based implementations for chaos gener-
ators, artificial neural networks (ANNs), random number generators (RNGs), and
master–slave synchronization of chaotic oscillators to implement a secure com-
munication system for image transmission. The plus of this book is focused on
providing VHDL programming guidelines and issues, along with co-simulation
examples with Active-HDL and Simulink. In addition, we list some challenges on
applying different kinds of numerical methods, problems on optimizing chaotic
systems, selection of an ANN topology, its training, improvements on designing
activation functions, data supply using serial communication with a computer,
generation of random number generators from chaos theory, realization of chaotic
secure communication systems, and other open problems for future research.
vii
viii Preface
In summary, this book details FPGA realizations for:
(cid:129) Chaos generators, which are described from their mathematical models, are
characterized by their maximum Lyapunov exponent, and are implemented
using minimal FPGA resources.
(cid:129) Artificial neural networks (ANNs), discussing some topologies, different
learning techniques, kinds of activation functions, and issues on choosing the
length of the digital words being processed. One ANN topology is applied to
chaotic time series prediction.
(cid:129) Random number generators (RNGs), which are designed using different chaos
generators, in the continuous-time and discrete-time domains. The RNGs are
characterized by their maximum Lyapunov exponent and entropy, and are
evaluated through NIST tests.
(cid:129) Optimized chaotic oscillators are synchronized in a master–slave topology that
is used to implement a secure communication system to process black and
white, and grayscale images.
Some chapters discuss computer arithmetic issues to minimize hardware
resources and to reduce errors, before synthesizing the FPGA realization. At the
end,thereadercaninferopenlinesforfutureresearchnotonlyinareaswherechaos
generators, ANNs, random number generators, and secure communications are
required,butalsotoextendthepresentedmaterialtootherproblemsinengineering.
Acknowledgments
The authors acknowledge the pretty good help of the graduate students at INAOE
forpreparingsimulationsandexperiments.Theyare:AnaDaliaPano-Azucenaand
Antonio de Jesus Quintas-Valles.
Special acknowledgments to CONACyT-Mexico for funding support under
projects 168357 and 237991.
ix
Contents
1 Introduction to Field-Programmable Gate Arrays. . . . . . . . . . . . . . 1
1.1 FPGA Architectures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Blocks Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2.1 Logic Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2.2 Lookup Tables (LUTs) . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.2.3 I/O Blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.3 Programming Environments . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.3.1 Vivado. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.3.2 Quartus II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
1.3.3 Aldec Active-HDL . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
1.4 Computer Arithmetic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
1.4.1 Fixed Point Numbers. . . . . . . . . . . . . . . . . . . . . . . . . . . 29
1.4.2 Operations with 2’ Complement Numbers . . . . . . . . . . . . 30
1.4.3 Floating-Point Numbers. . . . . . . . . . . . . . . . . . . . . . . . . 31
2 VHDL. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.1 A Brief History of VHDL . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.2 VHDL Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.3 Levels of Abstraction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2.3.1 Behavioral Description. . . . . . . . . . . . . . . . . . . . . . . . . . 36
2.3.2 Data Flow Description. . . . . . . . . . . . . . . . . . . . . . . . . . 39
2.3.3 Structural Description . . . . . . . . . . . . . . . . . . . . . . . . . . 42
2.4 Modules Description Examples. . . . . . . . . . . . . . . . . . . . . . . . . 46
2.4.1 Combinational Circuits . . . . . . . . . . . . . . . . . . . . . . . . . 46
2.4.2 Sequential Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
3 Matlab-Simulink Co-Simulation. . . . . . . . . . . . . . . . . . . . . . . . . . . 61
3.1 Co-Simulation Active-HDL/Matlab-Simulink . . . . . . . . . . . . . . . 61
3.2 Co-Simulation Xilinx System Generator/Matlab-Simulink. . . . . . . 67
3.3 Co-Simulation Altera DSP Builder/Matlab-Simulink . . . . . . . . . . 72
xi
xii Contents
4 Chaos Generators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
4.1 On Piecewise-Linear (PWL) Functions. . . . . . . . . . . . . . . . . . . . 77
4.1.1 Saturated Function Series as PWL Function . . . . . . . . . . . 77
4.1.2 Chua’s Diode as PWL Function . . . . . . . . . . . . . . . . . . . 78
4.1.3 Sawtooth as PWL Function . . . . . . . . . . . . . . . . . . . . . . 79
4.2 On the Simulation of Chaos Generators for FPGA
Implementation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.2.1 One-Step Methods for Simulating the Generation
of 2-Scrolls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
4.3 Symmetric and Nonsymmetric PWL Functions . . . . . . . . . . . . . . 84
4.3.1 Symmetric PWL Function . . . . . . . . . . . . . . . . . . . . . . . 85
4.3.2 Nonsymmetric PWL Function. . . . . . . . . . . . . . . . . . . . . 87
4.3.3 VHDL Simulation and Computer Arithmetic Issues. . . . . . 87
4.4 VHDL Code Generation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
4.5 Bifurcation Diagrams. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
4.6 Multi-scroll Chaotic Attractors with High MLE and Entropy. . . . . 94
4.6.1 Lyapunov Exponents. . . . . . . . . . . . . . . . . . . . . . . . . . . 103
4.6.2 Evaluation of Entropy . . . . . . . . . . . . . . . . . . . . . . . . . . 109
4.7 Generating a 50-Scrolls Chaotic Attractor at 66 MHz. . . . . . . . . . 111
5 Artificial Neural Networks for Time Series Prediction. . . . . . . . . . . 117
5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
5.2 Generating Chaotic Time Series Using FPGAs . . . . . . . . . . . . . . 118
5.3 ANN Design Issues. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
5.3.1 ANN Topology Selection. . . . . . . . . . . . . . . . . . . . . . . . 124
5.3.2 ANN Training . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
5.3.3 Weights Updating by Batches and Incremental
Methods. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
5.3.4 On the Activation Function in the Last Layer
of the ANN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
5.3.5 Time Series Prediction of Chaotic Signals
with Different MLE. . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
5.4 FPGA-Based ANN for Time-Series Prediction
of Chaotic Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
5.4.1 FPGA Realization of the Hyperbolic Tangent Activation
Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
5.5 Serial Communication Protocol: PC-FPGA. . . . . . . . . . . . . . . . . 144
6 Random Number Generators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
6.1 Generating Pseudorandom Binary Sequences . . . . . . . . . . . . . . . 151
6.2 Numerical Method for Solving a Chaotic Dynamical System . . . . 151
6.3 Double-Scroll and Multi-scroll Chaos Generators. . . . . . . . . . . . . 152
6.3.1 Chua’s Chaotic Oscillator. . . . . . . . . . . . . . . . . . . . . . . . 152
6.3.2 Saturated Function Series-Based Chaotic Oscillator. . . . . . 153