Data Book

260 Pages·2017·14.5 MB·English

Data Book

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USER-CONFIGURABLE
LOGIC
DATABOOK
September 1988
(I)
The following are trademarks of Altera Corporation: A+PLUS,
LogicMap, LogiCaps, MacroMunching, TURBO-BIT, SALSA,
ADLlB, SAM+PLUS, PLDS-SAM, PLS-SAM, SAMSIM, ASMILE,
PLDS2, PLS4, PLS2, PLCAD, PLE, ASAp, EP300, EP310, EP512,
EP600, EP610, EP900, EP91 0, EP1200, EP1210, EP1800, EP1810,
EPS448, EPB1400, EPB2001, EPB2002, EPM5016, EPM5024,
EPM5032, EPM5064, EPM5127, EPM5128, SAM, BUSTER, MCMAP,
MAX, and MAX+PLUS. A+PLUS design elements and Mnemonics
are Altera Corporation copyright. IBM is a registered trademark of
International Business Machines, Inc. PS/2 and Micro Channel
are trademarks of International Business Machines, Inc. CHMOS
is a trademark of Intel Corporation. PC-CAPS is a tradmark of
Personal CAD Systems Inc. Dash is a trademark of FutureNet
Corporation. PAL is a trademark of Monolithic Memories Inc.
MS-DOS is a trademark of Microsoft Corporation. WordStar is a
trademark of MicroPro Corporation. Altera reserves the right to
make changes in the devices or the device specifications identi
fied in this document without notice. Altera advises its customers
to obtain the latest version of device specifications to verify,
before placing orders, that the information being relied upon by
the customer is current. Altera warrants performance of its semi
conductor products to current speCifications in accordance with
Altera's standard warranty. Testing and other quality control
techniques are utilized to the extent Altera deems such testing
necessary to support this warranty. Unless mandated by govern
ment requirements, specific testing of all parameters of each
device is not necessarily performed. In the absence of written
agreement to the contrary, Altera assumes no liability for Altera
applications assistance, customers product design, or infringe
ment of patents or copyrights of third parties by or arising from
use of semiconductor devices described herein. Nor does Altera
warrant or represent that any patent right, copyright, or other
intellectual property right of Altera covering or relating to any
combination, machine, or process in which such semiconductor
devices might be or are used.
Altera's products are not authorized for use as critical compo
nents in life support devices or systems without the express
written approval of the president of Altera Corporation. As used
herein:
1. Life support devices or systems are devices or systems which,
(a) are intended for surgical implant into the body, or (b)
support or sustain life, and whose failure to perform, when
properly used in accordance with instructions for use provided
in the labeling, can be reasonably expected to result in a
significant injury to the user.
2. A critical component is any component of a life support device
or system whose failure to perform can be reasonably expected
to cause the failure of the life support device or system, or to
affect its safety or effectiveness.
ALTERA cannot assume any responsibility for any circuits shown
or represented that they are free from patent infringement.
Products contained within are covered by one or more
of the following U. S. patents: #4,609,986; #4,677,318; #4,617,479;
#4,713,792; #4,328,565; #4,361,847; #4,409,723; #4,639,893;
#4,649,520; and the following foreign patents: England: #2,072,384;
#2,073,487; West Germany: #3,103,160; and Japan: #1,279,100.
Additional Patents Pending.
Copyright @1985, 1986, 1987, 1988
ALTERA Corporation
0888103 DFGG
ALTERA CORPORATION
3525 MONROE STREET,
P.O. BOX 58163
SANTA CLARA, CA 95052-8163
[phone]
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SECTION 1: Introduction to Altera Page No.
• SECTION 1 TABLE OF CONTENTS 1
• ALPHA-NUMERIC INDEX 2
• INTRODUCTION TO ALTERA 3
• ALTERA EPLD DESIGN ENVIRONMENT 7
• DEVICE SELECTOR GUIDE 8
SECTION 2: EPLD Datasheets Page No.
• SECTION 2 TABLE OF CONTENTS 9
• HIGH DENSITY EPLDs 10-36
• LOW DENSITY EPLDs 37-80
• FUNCTION SPECIFIC EPLDs 81-135
• MULTIPLE ARRAY MATRIX (MAX) EPLDs 136-161
• DESIGN RECOMMENDATIONS 162
SECTION 3: Development Systems Page No.
• SECTION 3 TABLE OF CONTENTS 163
• DEVELOPMENT SYSTEMS 165-171
• DEVELOPMENT SOFTWARE 172-220
• PROGRAMMING HARDWARE 221-222
SECTION 4: General Information Page No.
• SECTION 4 TABLE OF CONTENTS 223
• APPLICATIONS LITERATURE 224-225
• ORDERING INFORMATION 226
• QUALITY PROGRAMS 227-237
• PACKAGE OUTLINES 238-244
• THERMAL DATA 245
• SALES OFFICES 246-252
(iii)
HOW TO USE THIS
DATABOOK
This databook provides technical datasheets for
Altera EPLD and Development Tool products. If you
are already familiar with Altera EPLDs and the asso
ciated design support versus other semicustom logic
alternatives, you can go right to the product data in
Section 2. On the other hand, if you're venturing into
EPLDs or semicustom logic for the first time, you may
choose to acquaint yourself with Section 1 which
includes some brief history and a discussion of the
technology issues and alternatives in the application
specific market.
To place an order, go directly to the Appendices
in Section 4 for ordering information, package out
lines, or distributor locations.
If this data book doesn't answer your technical
questions, please call our applications HOT-LINE
(408) 984-2805 extension 102, and we will help
you directly.
For Application Notes and design guideline
information, refer to the Altera Applications
Handbook.
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INTRODUCTION TO ALTERA PAGE NO.
Alpha-Numeric Index .................................... 2
Introduction to Altera .................................... 3
Altera EPLD Design Environment ......................... 7
Device Selector Guide ................................... 8
EPLDs DEVELOPMENT TOOLS
PRODUCT PAGE PRODUCT PAGE
EPB1400 ................................. 81 PLAESW ................................. 219
EPB1400-2 ............................... 81 PLDCAD-SUPREME ...................... 167
EPB2001 ................................. 118 PLDS-ENCORE .......................... 166
EPB2002 ................................. 118 PLDS-MAX ............................... 168
EPM5016 ................................. 146 PLDS-MCMAP ........................... 170
EPM5024 ................. . . . . . . . . . . . . . . . 145 PLDS-SAM ............................... 169
EPM5032 .... . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151 PLDS2 ................................... 171
EPM5032-2 ............................... 151 PLE3-12 .................................. 221
EPM5064 ................................ 143 PLE40 ................................... 178
EPM5127 .•.......•....................... 150 PLEJ1210 ................................ 222
EPM5128 ................................. 150 PLED1400 ................................ 222
EPS448-16 ............................... 105 PLEJ1400 ................................ 222
EPS448-20 •.............................. 105 PLEG1800 ................................ 222
EPS448-25 ............................... 105 PLEJ1800 ................................ 222
EP1800 .................................. 20 PLEJ2001 ................................ 222
EP1800-2 ................................. 20 PLED448 ................................. 222
EP1800-3 ................................. 20 PLEJ448 ................................. 222
EP1810-45 ................................ 10 PLED5032 ................................ 222
EP1810-55 ................................ 10 PLEJ5032 ................................ 222
EP310 ................................... 75 PLED512 ................................. 222
EP310-2 .................................. 75 PLEJ512 ................................. 222
EP310-3 .................................. 75 PLEJ5128 .............................' ... 222
EP320 ................................... 63 PLEG5128 ................................ 222
EP320-1 .................................. 63 PLED600 ................................. 222
EP320-2 ................................. 63 PLEJ600 ................................. 222
EP512-25 ................................. 50 PLED900 ................................. 222
EP512-30 ................................. 50 PLEJ900 ................................. 222
EP512-35 ................................. 50 PLFSIM .................................. 199
EP600 ................................... 46 PLSLlB-TTL .............................. 186
EP600-3 ................................. 46 PLS-MAX ................................ 203
EP610-25 .......................... ~ . . . .. . 37 PLS-MCKIT .............................. 215
EP610-30 ..........•.......•.............. 37 PLS-SAM ................................ 211
EP610-35 ................................. 37 PLS2 .................................... 172
EP610-40 ................................. 37 PLSME .................................. 196
EP900 ................................... 33 PLSTART ................................ 216
EP900-2 ................................. 33
EP900-3 ................................. 33
EP910-30 ................................. 24
EP910-35 ................................. 24
EP910-40 ................................. 24
EP910-45 ................................. 24
A critical factor in the rapid, worldwide accep
tance of Altera's user configurable ICs has been
the availability of low cost, easy to use software
and hardware development tools. Available on both
IBM PC compatible and PS/2 computer platforms,
Altera's tools provide everything required to design,
debug and program custom logic functions in the
user's facility.
At the heart of these software tools are propri
etary design processors based on logic synthesis
techniques which automatically translate the user's
input into programming patterns for the minimum
device necessary to accomplish the task. A variety
of design entry methods is offered including state
machine and schematic capture using high level
Altera Corporation was founded in 1983 to pro TTL MacroFunction building blocks as well as
vide an alternative solution to custom masked primitive gate elements. Simulation and interface
gate arrays for the design of high-density logic programs to third party CAE products are also
functions. The founders of Altera believed that the available.
problems of high development costs, long lead The unique characteristic of EPLD technology
times, lack of design iteration flexibility and dedi is the very fast design turnaround times which can
cated inventory could be eliminated through the be achieved. Design processing is fast. A typical
use of standard, user configurable (or program 1000 gate design will compile in less than 2 minutes
mable) components. and devices can be programmed in seconds. This,
coupled with the erasable and reprogrammable
features of an EPLD, allows multiple hardware I
iterations to be evaluated in a single day, if
necessary.
By combining CMOS and EPROM erasable cell
technologies Altera created the industry's first
Erasable Programmable Logic Device (EPLD). This Altera believes that these development tools are
led to the introduction of a full family of EPLDs a critical factor for the advancement of user config
spanning the range from 300 to over 2000 gates. urable semiconductor technology. In order that
These products provided a convenient, low cost component utility and ultimately designer efficiency
means of integrating dozens of TTL and CMOS be maximized, the semiconductor device and the
SSIIMSI devices into a handful of packages. software must be developed in parallel and concert.
Today Altera offers EPLDs to solve many com If one is subordinated to the other, the total prod
mon board and system integration needs. These uct combination will suffer. In line with this belief,
User Configurable logic devices are divided into Altera has invested in approximately equal sized
two architectural categories based on a funda R&D staffs in the areas of Software Development
mental design decision-should the device archi and Integrated Circuit Design.
tecture yield maximum flexibility for general One benefit of this approach is that when Altera
purpose logic replacement or be specialized to introduces a new product to the market place,
solve a specific system design task: software and hardware support are in place on the
1) General Purpose EPLDs-provide ideal inte day of introduction. This level of support and
gration densities for random logic replacement service is unique in the industry.
from PAL replacement to thousands of gates. Two Altera also works closely with the leading third
basic families of devices are available. The EP party vendors to assure its customers the avail
Series is based on a conventional AND-OR archi ability of appropriate tools for the production
tecture. The EPM Series uses a Multiple Array environment.
matriX (MAX) structure for register intensive Altera's products are sold by manufacturers rep
applications. resentatives and major electronic distributors
2) Function Specific EPLDs-provide integration throughout the world. Cypress Semiconductor,
of specific system design tasks. These function Intel Corporation, Texas Instruments and others
specific EPLDs are further divided into product are licensed second sources for many of the Altera
families according to their specific system design products described in this catalog.
focus: Families optimized for high performance
controller/complex state machines, custom peri
pheral designs and Micro Channel interface appli
cations are available today.
3
• Full Custom
• Standard Cell Library
• Gate Array
• User Configurable (Programmable)
To achieve improved system performance in the
The first three choices are custom masked and
marketplace, more and more manufacturers have
are not wholly satisfactory for system designers
sought higher levels of integration (functional
and manufacturers due to several problems:
density) for the electronic components in their
• Development lead times are relatively long,
products. This has led to various forms of custom
requiring from 6 to 20 weeks for the fastest
chips that require lengthy development lead times
solution.
and sizable design costs. The concept of User
Configurable Integrated Circuits is to provide the • Design costs are significant, varying from $10K
benefits of large scale integration without the to $40K as a minimum.
drawbacks of custom chips. • Inventory is dedicated which is expensive and
A few of the most significant benefits of large prohibits adequate second sourcing.
scale logic integration are: • Semiconductor distributors have difficulty par
• Lower manufacturing costs ticipating in this business-thus limiting wide
• Lower power spread use.
• Higher reliability • None of these solutions address the fundamental
issue that engineering is inherently an inter
• Proprietary design protection
active process. Design changes in midstream
• Additional features
are not allowed due to lead time and inventory
As end users of semiconductors moved to higher constraints.
and higher levels of integration, chip designers
As a result of these restrictions, many designers
found it increasingly difficult to define larger and
are still reluctant to switch from standard logic to
larger common "building blocks" of logic. These
appl ication-specific log ic.
difficulties led to the emergence of the user
Attempts to eliminate these restrictions have led
defined Application-Specific Integrated Circuit
to an increasing interest in user configurable or
(ASIC), sometimes more accurately described. ~s programmable logic devices. The concept of user
the User Specific (USIC) or Customer Specific
configurable logic is to provide the designer with
(CSIC) devices.
the benefits of custom LSI chips from standard
The options presently available for customer
products. The benefits of such parts include off
specific logic are:
the-shelf availability, minimal design costs, multiple
sourcing from distributors and manufacturers, and
flexible, interchangeable inventory.
Figure 1. Altera User-Configurable Logic Families
GENERAL -PURPOSE EPLDs
EP-SERIES SAM BUSTER
EP310, 320, 512, 600, 610 EPS448 EPB1400
EP 900, 910, 1210
EP 1800, 1810
MPU PERIPHERAL
LOGIC
RANDOM CONTROL
MEMORY
LOGIC LOGIC
BUS
INTERFACE
GENERAL -PURPOSE EPLDs MICRO CHANNEL
EPM-SERIES INTERFACE
EPM 5016, 5024, 5032
EPB2001
EPM 5064, 5127
EPB2002
EPM 5128
4