AnySP: Anytime Anywhere Anyway Signal Processing

28 Pages·2014·1.75 MB·English

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AnySP: Anytime Anywhere
Anyway Signal Processing
Mark Woh1, Sangwon Seo1, Scott Mahlke1,Trevor Mudge1,
Chaitali Chakrabarti2, Krisztian Flautner3

University of Michigan – ACAL1
Arizona State University2
ARM, Ltd.3
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TThhee OMlodd Meronb Mileo bPihleo nPeh one
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Video Recordin•  g F uture phones are becoming more complex
•  Richer applications require much more
Video Editing
requirements
•  How do phones handle this now?
Higher Data Rates
3D Rendering
Advanced Image Processing
Photos From - http://www.engadget.com/2009/06/10/iphone-3g-s-supports-opengl-es-2-0-but-3g-only-supports-1-1/
http://www.apple.com/iphone
University of Michigan - ACAL
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Inside Today’s Smart Phones
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Inside the OMAP3430 Application Processor
Inside the X-Gold 608 (Representation of QCOM)
University of Michigan - ACAL
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Power/Performance Requirements for Multiple Systems
4

10000

4G Wireless

s) 1000 IBM Cell
p

o

G

(

e Different applications have different power/performance

c
Mobile HD
n SODA characteristics!
a 100 Video ( 90n m)
m
SODA
r Im agine
o (65nm)

f
r 3G Wireless
e We need to design keeping each application in mind!

P

10
(Not GPP but Domain Specific Processor)

VIRAM Pentium M

TI C6X

1

0.1 1 Power (W atts ) 10 100
University of Michigan - ACAL
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The Applications
Is there anything we can learn from the
applications themselves?
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H.264 Basics
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Standard Basis
Patterns
5
3
2
Inverse
Transform
Reconstructed
Macroblock
Residual Data
Basis Coefficients
Form
Reconstructed
Prediction
Macroblock
Decoded Block
Modules Algorithms Power Profiling* k
c
Deblockinog Filter
Entropy decoder Context-adaptive VLD l
B
4%
Inverse Transform 4x4 integer kernel d
Prediction
e
Half: 6-tap filter d
Motion Based on
Quarter: 6-tap / bilinear filter 29% o
Compensation c
Eighth: 4-tap filter e Neighbors
D
Intra Prediction Directional spatial prediction 10%
Current Future
Deblocking Filte“rPasInt”-l oForpa amdaepstive filter 34% Current Uncoded
Frame Frames
Misc Kernels 23% Block
Motion Compensation
T.-A. Liu, T.-M. Lin, S. -Z. Wang, et al. “A low-power dual-mode video decoder for mobile applications,” Intra-Prediction
IEEE Communications Magazine, volume 44, issue 8, pp.119-126, Aug. 2006.
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4G Wireless Basics
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Transmitted
Channel Encoder S/P Data
Ant D/A Guard
IFFT
Insertion (LDPC)
Modulator
Demodulator
Channel
Symbol Estimator
Timing / FFT
Guard
Detect
MIMO Channel
Recovered
Decoder Decoder
Data
(LDPC)
(STBC)
Ant A/D
§  Three kernels make up the majority of the
work
§  FFT – Extract Data from Signals
§  STBC – Combine Data into More Reliable Stream
§  LDPC – Error Correction on Data Stream
University of Michigan - ACAL
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Mobile Signal Processing Algorithm Characteristics
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SIMD
  Scalar
  Overhead
  SIMD
 Width
  Amount

Algorithm

Workload
 (%)
  Workload
 (%)
  Workload
 (%)
  (Elements)
  of
 TLP

FFT
  75
  5
  20
  1024
  Low

G
STBC
  81
  5
  14
  4
  High

4
LDPC
  49
  18
  33
  96
  Low

Deblocking
 Filter
  72
  13
  15
  8
  Medium

  SIMD comes at a cost!
4
6 Intra-­‐PredicMon
  85
  5
  10
  16
  Medium

2 • Register File Power
. Inverse
 Transform
  80
  5
  15
  8
  High

H
MoMon
 Compensa•M Dona
  ta M7o5
 vement/A5
 lignment1 0C
  ost 8
  High

SIMD architectures have to deal with this!
§  Algorithms have different SIMD widths
§  From very large to very small
§  Though SIMD width varies all algorithms can exploit it
§  Large percentage of work can be SIMDized
§  Larger SIMD width tend to have less TLP
University of Michigan - ACAL
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Only the instructions shown in red are MMX
computations. All other instructions are simply
supporting these computations.
Pentium III – SIMD code for Discrete Cosine Transform (DCT)

lea ebx, DWORD PTR [ebp+128] load/address overhead
mov DWORD PTR [esp+28], ebx load/address overhead
$B1$2:
xor eax, eax address overhead
move dx, ecx address overhead
lea edi, DWORD PTR [ecx+16] load/address overhead
mov DWORD PTR [esp+24], ecx load/address overhead
$B1$3:
movq mm1, MMWORD PTR [ebp] load overhead
pxor mm0, mm0 initialization overhead
pmaddwd mm1, MMWORD PTR [eax+esi] True Computation
movq mm2, MMWORD PTR [ebp+8] load overhead
pmaddwd mm2, MMWORD PTR [eax+esi+8] True Computation
add eax, 16address overhead
paddw mm1, mm0 True Computation
paddw mm2, mm1 True Computation
movq mm0, mm2 load related overhead
psrlq mm2, 32 SIMD reduction overhead
povd ecx, mm0 SIMD load overhead
movd ebx, mm2 SIMD load overhead
add ecx, ebx SIMD conversion Overhead
mov WORD PTR [edx], cx store overhead
add edx, 2 address overhead
cmp edi, edx branch related overhead
jg $B1$3 loop branch overhead
$B1$4:
move cx, DWORD PTR [esp+24] load/address overhead
add ebp, 16 address overhead
add ecx, 16 address overhead
move ax, DWORD PTR [esp+28] load/address overhead
cmp eax, ebp branch related overhead
jg $B1$2 loop branch overhead

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